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| author | Dapeng Mi <dapeng1.mi@linux.intel.com> | 2026-08-24 16:27:24 +0800 |
|---|---|---|
| committer | Peter Zijlstra <peterz@infradead.org> | 2026-09-02 13:10:45 +0200 |
| commit | 74d55a827e31bc8a75fbc530951c6266d043ecc0 (patch) | |
| tree | 64cbe1eaf9952ba1acefaea99af406f0550322c9 /arch/x86/include/uapi/asm | |
| parent | 3807f6996a0bd9515ff69f3040d6e47f7b20e7a5 (diff) | |
| download | linux-next-74d55a827e31bc8a75fbc530951c6266d043ecc0.tar.gz linux-next-74d55a827e31bc8a75fbc530951c6266d043ecc0.zip | |
perf/x86: Support OPMASK sampling using sample_simd_pred_reg_* fields
Support sampling of OPMASK registers via the sample_simd_pred_reg_*
fields.
Each OPMASK register consists of 1 u64 word. Current x86 hardware
supports 8 OPMASK registers. The perf_simd_reg_value() function is
responsible for outputting OPMASK value to userspace.
Additionally, sample_simd_pred_reg_qwords should be set to 1 to indicate
OPMASK sampling.
OPMASK sampling will be enabled in a subsequent patch that sets
PERF_PMU_CAP_SIMD_REGS.
Co-developed-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://patch.msgid.link/20260824082731.1013973-17-dapeng1.mi@linux.intel.com
Diffstat (limited to 'arch/x86/include/uapi/asm')
| -rw-r--r-- | arch/x86/include/uapi/asm/perf_regs.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/x86/include/uapi/asm/perf_regs.h b/arch/x86/include/uapi/asm/perf_regs.h index b88d0b6822fd..61aec60623f1 100644 --- a/arch/x86/include/uapi/asm/perf_regs.h +++ b/arch/x86/include/uapi/asm/perf_regs.h @@ -62,14 +62,19 @@ enum { PERF_X86_SIMD_YMM_REGS = 16, PERF_X86_SIMD_ZMM_REGS = 32, PERF_X86_SIMD_VEC_REGS_MAX = PERF_X86_SIMD_ZMM_REGS, + + PERF_X86_SIMD_OPMASK_REGS = 8, + PERF_X86_SIMD_PRED_REGS_MAX = PERF_X86_SIMD_OPMASK_REGS, }; +#define PERF_X86_SIMD_PRED_MASK __GENMASK(PERF_X86_SIMD_PRED_REGS_MAX - 1, 0) #define PERF_X86_SIMD_VEC_MASK __GENMASK_ULL(PERF_X86_SIMD_VEC_REGS_MAX - 1, 0) #define PERF_X86_H16ZMM_BASE 16 enum { /* 1 qword = 8 bytes */ + PERF_X86_OPMASK_QWORDS = 1, PERF_X86_XMM_QWORDS = 2, PERF_X86_YMM_QWORDS = 4, PERF_X86_ZMM_QWORDS = 8, |