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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2026-04-17 08:53:23 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2026-04-17 08:53:23 -0700 |
| commit | d730905bc3c0075275b2d109cd971735274b98c0 (patch) | |
| tree | b7e06f8b9e345d401d653495745cefc9f918e284 /arch/mips/include | |
| parent | a10e80be6343cbdaabe80f82cbd640fe3772d102 (diff) | |
| parent | 15513eefac7ca68602e9de9853f5e671bf7b4eef (diff) | |
| download | linux-next-d730905bc3c0075275b2d109cd971735274b98c0.tar.gz linux-next-d730905bc3c0075275b2d109cd971735274b98c0.zip | |
Merge tag 'mips_7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux
Pull MIPS updates from Thomas Bogendoerfer:
- Support for Mobileye EyeQ6Lplus
- Cleanups and fixes
* tag 'mips_7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (30 commits)
MIPS/mtd: Handle READY GPIO in generic NAND platform data
MIPS/input: Move RB532 button to GPIO descriptors
MIPS: validate DT bootargs before appending them
MIPS: Alchemy: Remove unused forward declaration
MAINTAINERS: Mobileye: Add EyeQ6Lplus files
MIPS: config: add eyeq6lplus_defconfig
MIPS: Add Mobileye EyeQ6Lplus evaluation board dts
MIPS: Add Mobileye EyeQ6Lplus SoC dtsi
clk: eyeq: Add Mobileye EyeQ6Lplus OLB
clk: eyeq: Adjust PLL accuracy computation
clk: eyeq: Skip post-divisor when computing PLL frequency
pinctrl: eyeq5: Add Mobileye EyeQ6Lplus OLB
pinctrl: eyeq5: Use match data
reset: eyeq: Add Mobileye EyeQ6Lplus OLB
MIPS: Add Mobileye EyeQ6Lplus support
dt-bindings: soc: mobileye: Add EyeQ6Lplus OLB
dt-bindings: mips: Add Mobileye EyeQ6Lplus SoC
MIPS: dts: loongson64g-package: Switch to Loongson UART driver
mips: pci-mt7620: rework initialization procedure
mips: pci-mt7620: add more register init values
...
Diffstat (limited to 'arch/mips/include')
| -rw-r--r-- | arch/mips/include/asm/mach-au1x00/gpio-au1000.h | 2 | ||||
| -rw-r--r-- | arch/mips/include/asm/mach-au1x00/gpio-au1300.h | 1 |
2 files changed, 0 insertions, 3 deletions
diff --git a/arch/mips/include/asm/mach-au1x00/gpio-au1000.h b/arch/mips/include/asm/mach-au1x00/gpio-au1000.h index d820b481ac56..e6306f6820e6 100644 --- a/arch/mips/include/asm/mach-au1x00/gpio-au1000.h +++ b/arch/mips/include/asm/mach-au1x00/gpio-au1000.h @@ -40,8 +40,6 @@ #define AU1000_GPIO2_INTENABLE 0x10 #define AU1000_GPIO2_ENABLE 0x14 -struct gpio; - static inline int au1000_gpio1_to_irq(int gpio) { return MAKE_IRQ(1, gpio - ALCHEMY_GPIO1_BASE); diff --git a/arch/mips/include/asm/mach-au1x00/gpio-au1300.h b/arch/mips/include/asm/mach-au1x00/gpio-au1300.h index 43d44f384f97..b12f37262cfa 100644 --- a/arch/mips/include/asm/mach-au1x00/gpio-au1300.h +++ b/arch/mips/include/asm/mach-au1x00/gpio-au1300.h @@ -12,7 +12,6 @@ #include <asm/io.h> #include <asm/mach-au1x00/au1000.h> -struct gpio; struct gpio_chip; /* with the current GPIC design, up to 128 GPIOs are possible. |