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authorAlexandre Belloni <alexandre.belloni@bootlin.com>2026-08-08 18:44:20 +0200
committerAlexandre Belloni <alexandre.belloni@bootlin.com>2026-08-08 18:44:20 +0200
commit7855656ffb8e3a15cb0f2b58b2e0fca8055e42df (patch)
tree5dea539b1e1a1d37ce616b91331389b5bd2fcd9d /arch/arm
parentb8b3f6e9747b0acfa4625f243d0f222aa8a4f53a (diff)
parent23da74833df803c5e8bea71feb878173764ef121 (diff)
downloadlinux-next-7855656ffb8e3a15cb0f2b58b2e0fca8055e42df.tar.gz
linux-next-7855656ffb8e3a15cb0f2b58b2e0fca8055e42df.zip
Merge tag 'qcom-arm64-for-7.3' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt
Qualcomm Arm64 DeviceTree updates for v7.3 Introduce DeviceTree support for the Shikra SoC, its GCC and RPM clock controllers, CQM, CQS, and IQS SoM platforms, and their evaluation boards. Document the Hawi and Maili SoCs. Add the Eliza CQS SoM and EVK platforms, the QCS8550 RB5 Gen 2, Vicharak Axon Mini, HONOR MagicBook Art 14, Microsoft Surface Pro 12, Xiaomi 12 Lite, Motorola Edge 30, Sony Xperia M2, and Motorola Moto G2 device trees. Extend Eliza support with USB, SD card, touchscreen, PMIC, interconnect, thermal, CPU and LLCC bandwidth-monitor, QUPv3, and ADSP GPR descriptions. Expand Glymur support with GPU, camera and EVA clock controllers, LPASS audio, CoreSight, PCIe, USB, IMEM and PIL memory regions, power domains, thermal cooling, and CRD peripherals. Add SoCCP, PMIC regulator, TRNG, and CPU-capacity descriptions. Add display, IPA, camera, USB, audio, crypto, TRNG, CoreSight, and thermal support to the Kaanapali, Milos, Hamoa, and related platforms. Add embedded controller support for Hamoa and Glymur boards. Improve networking-platform descriptions with IPQ PCIe port, PHY, clock, PWM, regulator, and interrupt updates. Update CTCU, display, Iris, audio, camera, PCIe, USB-C, power-domain, memory-region, and thermal descriptions across established Qualcomm platforms. Correct bindings and DeviceTree validation for Qualcomm compatible strings, legacy fallback compatibles, node naming and formatting, address ranges, clock specifiers, reserved memory, regulators, GPIOs, and peripheral wiring. * tag 'qcom-arm64-for-7.3' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (244 commits) arm64: dts: qcom: eliza: Describe the ADSP GPR node arm64: dts: qcom: eliza-evk: Add support for USB and SD card dt-bindings: arm: qcom-soc: Allow WSA88xx speaker compatible dt-bindings: arm: qcom-soc: Validate nodes with fallbacks dt-bindings: arm: qcom-soc: Document more of existing legacy style compatibles dt-bindings: arm: qcom-soc: Include Eliza, Kaanapali and others in SoC names arm64: dts: qcom: eliza: Enable cpufreq cooling devices arm64: dts: qcom: glymur: add SoCCP DT node arm64: dts: qcom: glymur: fix SoCCP memory mappings arm64: dts: qcom: mahua: Add QREF regulator supplies to TCSR arm64: dts: qcom: glymur: Add QREF regulator supplies to TCSR arm64: dts: qcom: glymur: Add CX power domain to GCC arm64: dts: qcom: glymur: Drop fake PCIe phy 3B arm64: dts: qcom: glymur: add TRNG node arm64: dts: qcom: glymur: enable ETR and CTCU devices arm64: dts: qcom: glymur: Add PCIe port compatibles and ports arm64: dts: qcom: smb2370: Disable SMB2370_2 by default arm64: dts: qcom: eliza-mtp: Enable touchscreen arm64: dts: qcom: purwa-iot-som: enable video arm64: dts: qcom: purwa: Override Iris clocks and operating points ... Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/qcom/qcom-apq8064-pins.dtsi2
-rw-r--r--arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi4
-rw-r--r--arch/arm/boot/dts/qcom/qcom-mdm9615-wp8548.dtsi2
-rw-r--r--arch/arm/boot/dts/qcom/qcom-msm8974.dtsi2
-rw-r--r--arch/arm/boot/dts/qcom/qcom-sdx65-mtp.dts2
5 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/qcom/qcom-apq8064-pins.dtsi b/arch/arm/boot/dts/qcom/qcom-apq8064-pins.dtsi
index e53de709e9d1..e95da761234b 100644
--- a/arch/arm/boot/dts/qcom/qcom-apq8064-pins.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-apq8064-pins.dtsi
@@ -87,7 +87,7 @@
function = "gsbi7";
};
- gsbi7_uart_4pins: gsbi7_uart_4pins-state {
+ gsbi7_uart_4pins: gsbi7-uart-4pins-state {
pins = "gpio82", "gpio83", "gpio84", "gpio85";
function = "gsbi7";
};
diff --git a/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi
index adedcc6da1da..1a278503d340 100644
--- a/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi
@@ -591,7 +591,7 @@
nss_common: syscon@3000000 {
compatible = "syscon";
- reg = <0x03000000 0x0000FFFF>;
+ reg = <0x03000000 0x0000ffff>;
};
usb3_0: usb@100f8800 {
@@ -1241,7 +1241,7 @@
qsgmii_csr: syscon@1bb00000 {
compatible = "syscon";
- reg = <0x1bb00000 0x000001FF>;
+ reg = <0x1bb00000 0x000001ff>;
};
lcc: clock-controller@28000000 {
diff --git a/arch/arm/boot/dts/qcom/qcom-mdm9615-wp8548.dtsi b/arch/arm/boot/dts/qcom/qcom-mdm9615-wp8548.dtsi
index 0dd52cac0e2e..7206a33da279 100644
--- a/arch/arm/boot/dts/qcom/qcom-mdm9615-wp8548.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-mdm9615-wp8548.dtsi
@@ -15,7 +15,7 @@
memory@48000000 {
device_type = "memory";
- reg = <0x48000000 0x7F00000>;
+ reg = <0x48000000 0x7f00000>;
};
};
diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi
index 95be1d2e214f..06c0af0aa317 100644
--- a/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi
@@ -1866,7 +1866,7 @@
};
};
- spi8_default: spi8_default-state {
+ spi8_default: spi8-default-state {
mosi-pins {
pins = "gpio45";
function = "blsp_spi8";
diff --git a/arch/arm/boot/dts/qcom/qcom-sdx65-mtp.dts b/arch/arm/boot/dts/qcom/qcom-sdx65-mtp.dts
index 07c10c84eefa..2c0590617ac4 100644
--- a/arch/arm/boot/dts/qcom/qcom-sdx65-mtp.dts
+++ b/arch/arm/boot/dts/qcom/qcom-sdx65-mtp.dts
@@ -55,7 +55,7 @@
regulator-max-microvolt = <3700000>;
};
- vreg_bob_3p3: pmx65_bob {
+ vreg_bob_3p3: pmx65-bob-regulator {
compatible = "regulator-fixed";
regulator-name = "vreg_bob_3p3";
regulator-min-microvolt = <3300000>;