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authorAntony Kurniawan Soemardi <linux@smankusors.com>2026-08-03 02:03:46 +0700
committerBjorn Andersson <andersson@kernel.org>2026-09-27 17:55:58 -0500
commit852f2692b8ecb8ea48595ed24ade3b44cfc3f4ae (patch)
treea221b2cd8c9ebca8a6c5981e12cb96668268f156 /arch/arm/boot
parent542991a1d77e5fea5263c2406773a0cd09a8ec48 (diff)
downloadlinux-next-852f2692b8ecb8ea48595ed24ade3b44cfc3f4ae.tar.gz
linux-next-852f2692b8ecb8ea48595ed24ade3b44cfc3f4ae.zip
ARM: dts: qcom: msm8960: add RPM clock controller and fix USB clocks
The RPM clock controller manages clocks shared between the application processor and the RPM firmware, including fabric and bus clocks required by several peripherals. With the RPM clock controller now available in the device tree, the USB controller must explicitly declare its dependency on RPM_DAYTONA_FABRIC_CLK. Without this declaration, the clock framework would consider it unused and disable it, breaking USB functionality. This also corrects the previous misuse of USB_HS1_XCVR_CLK as the core clock. The XCVR clock is in fact used for PHY/reset handling rather than as the main core clock. A similar issue has been observed on APQ8064, where missing the RPM fabric clock dependency leads to broken USB. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Antony Kurniawan Soemardi <linux@smankusors.com> Link: https://patch.msgid.link/20260803-msm8960-wifi-v4-2-5ffa27aea39d@smankusors.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/qcom/qcom-msm8960.dtsi19
1 files changed, 17 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi
index fd28401cebb5..6ead9fec557a 100644
--- a/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi
@@ -5,6 +5,7 @@
#include <dt-bindings/clock/qcom,gcc-msm8960.h>
#include <dt-bindings/reset/qcom,gcc-msm8960.h>
#include <dt-bindings/clock/qcom,lcc-msm8960.h>
+#include <dt-bindings/clock/qcom,rpmcc.h>
#include <dt-bindings/mfd/qcom-rpm.h>
#include <dt-bindings/soc/qcom,gsbi.h>
@@ -98,6 +99,16 @@
interrupt-names = "ack",
"err",
"wakeup";
+
+ rpmcc: clock-controller {
+ compatible = "qcom,rpmcc-apq8064",
+ "qcom,rpmcc";
+ #clock-cells = <1>;
+ clocks = <&pxo_board>,
+ <&cxo_board>;
+ clock-names = "pxo",
+ "cxo";
+ };
};
ssbi: ssbi@500000 {
@@ -507,8 +518,12 @@
reg = <0x12500000 0x200>,
<0x12500200 0x200>;
interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc USB_HS1_XCVR_CLK>, <&gcc USB_HS1_H_CLK>;
- clock-names = "core", "iface";
+ clocks = <&rpmcc RPM_DAYTONA_FABRIC_CLK>,
+ <&gcc USB_HS1_H_CLK>,
+ <&gcc USB_HS1_XCVR_CLK>;
+ clock-names = "iface",
+ "core",
+ "fs";
assigned-clocks = <&gcc USB_HS1_XCVR_CLK>;
assigned-clock-rates = <60000000>;
resets = <&gcc USB_HS1_RESET>;