Merge tag 'pci-v7.2-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci

Pull pci updates from Bjorn Helgaas:
 "Enumeration:

   - Remove MPS/MRRS Kconfig settings (CONFIG_PCIE_BUS_*) that worked
     around a WiFi device defect; use a quirk or boot-time
     "pci=pcie_bus_tune_*" kernel parameter instead (Bjorn Helgaas)

   - Always lift 2.5GT/s restriction in PCIe failed link retraining to
     avoid clamping a link to 2.5GT/s after hot-plug changes the device
     (Maciej W. Rozycki)

   - Request bus reassignment when not probe-only to fix an enumeration
     regression on Marvell CN106XX and possibly other DT-based systems
     (Ratheesh Kannoth)

   - Fix procfs race between pci_proc_init() and pci_bus_add_device()
     that resulted in 'proc_dir_entry ... already registered' warnings
     and pointer corruption (Krzysztof Wilczyński)

   - Fix sysfs race that causes 'duplicate filename' warnings and boot
     panics by converting PCI resource files to static attributes
     (Krzysztof Wilczyński)

   - Expose sysfs 'resourceN_resize' attributes only on platforms with
     PCI mmap (Krzysztof Wilczyński)

   - Require CAP_SYS_ADMIN to write to sysfs 'resourceN_resize'
     attributes (Krzysztof Wilczyński)

   - Add security_locked_down(LOCKDOWN_PCI_ACCESS) to alpha PCI resource
     mmap path to match the generic path (Krzysztof Wilczyński)

   - Use kstrtobool() to parse the 'rom' attribute input to avoid the
     unexpected behavior of enabling the ROM when writing '0' with no
     trailing newline (Krzysztof Wilczyński)

  Resource management:

   - Improve resource claim logging for debuggability (Ilpo Järvinen)

   - Clean up several uses of const parameters (Ilpo Järvinen)

   - Check option ROM header signatures and lengths before accessing to
     avoid page faults and alignment faults (Guixin Liu)

  ASPM:

   - Don't reconfigure ASPM when entering low-power D-state; only do it
     when returning back to D0 (Carlos Bilbao)

  Power management:

   - During suspend, set power state to 'unknown' for all devices, not
     just those with drivers (Lukas Wunner)

   - Skip restoring Resizable BARs and VF Resizable BARs if device
     doesn't respond to config reads, to avoid invalid array accesses
     (Marco Nenciarini)

   - Add pci_suspend_retains_context() so drivers can tell whether
     devices retain internal state across suspend/resume, since some
     platforms reset devices on suspend; use this in nvme to avoid
     issues on Qcom RCs (Manivannan Sadhasivam)

  Power control:

   - Only to power on/off devices that actually support power control to
     avoid poking at incompatible devices mentioned in DT (Manivannan
     Sadhasivam)

  Virtualization and resets:

   - Log device readiness timeouts as errors, not warnings, because the
     device is likely unusable in this case (Bjorn Helgaas)

   - Wait for device readiness after soft reset (D3hot ->
     D0uninitialized transition), when the device may respond with
     Request Retry Status (RRS) if it needs more time to initialize
     (Bjorn Helgaas)

   - Drop unnecessary retries when restoring BARs because resets should
     now already include all required delays (Lukas Wunner)

   - Avoid FLR for MediaTek MT7925 WiFi, where FLR fails after a VM
     terminates uncleanly (Jose Ignacio Tornos Martinez)

   - Avoid SBR for Qualcomm WCN6855/WCN7850 WiFi, SDX62/SDX65 modems,
     which seem not to support it correctly (Jose Ignacio Tornos
     Martinez)

  Peer-to-peer DMA:

   - Prevent P2PDMA as well as CPU access to non-mappable BARs, e.g.,
     s390 ISM BARs (Matt Evans)

   - Add Intel QAT, DSA, IAA devices to whitelist (Lukas Wunner)

  Endpoint framework:

   - Add endpoint controller APIs for use by function drivers to
     discover auxiliary blocks like DMA engines (Koichiro Den)

   - Remember DesignWare eDMA engine base/size and expose them via the
     EPC aux-resource API (Koichiro Den)

   - Add endpoint embedded doorbell fallback, used if MSI allocation
     fails (Koichiro Den)

   - Validate BAR index and remove dead BAR read in endpoint doorbell
     test (Carlos Bilbao)

   - Unwind MSI/MSI-X vectors if NTB initialization fails part-way
     through (Koichiro Den)

   - Cache sleepable pci_irq_vector() value at ISR setup to avoid
     calling it from hardirq context (Koichiro Den)

   - Call sleepable pci_epc_raise_irq() from a work item instead of
     atomic context, e.g., when setting bits in NTB peer doorbells in
     the ntb_peer_db_set() path (Koichiro Den)

   - Report 0-based vNTB doorbell vector to account for link event 0 and
     historically skipped slot 1 (Koichiro Den)

   - Prevent configfs writes to vNTB db_count and other values that are
     already in use after EPC attach (Koichiro Den)

   - Account for vNTB db_valid reserved slots (link event 0 and
     historically skipped slot 1) so they don't appear as valid
     doorbells (Koichiro Den)

   - Implement vNTB .db_vector_count()/mask() for doorbells so clients
     can use multiple vectors and avoid thundering herds (Koichiro Den)

   - Report 0-based NTB doorbell vector to account for link event 0 and
     historically skipped slot 1 (Koichiro Den)

   - Fix doorbell bitmask and IRQ vector handling to clear only
     specified bits, use the correct vector for non-contiguous Linux IRQ
     numbers, and validate incoming vectors (Koichiro Den)

   - Implement NTB .db_vector_count()/mask() for doorbells so clients
     can use multiple vectors (Koichiro Den)

  Native PCIe controller infrastructure:

   - Add pci_host_common_link_train_delay() for the mandatory delay
     after > 5GT/s Link training completes and use it for cadence HPA,
     j721e, LGA; dwc; aardvark, mediatek-gen3, rzg3s (Hans Zhang)

   - Protect root bus removal with rescan lock in altera, brcmstb,
     cadence, dwc, iproc, mediatek, plda, rockchip to prevent
     use-after-free or crashes when racing with sysfs rescan or hotplug
     (Hans Zhang)

   - Add pci_host_common_parse_ports() for use by any native driver to
     parse Root Port properties (per-Link features like width, speed,
     PHY, power and reset control, etc should be described in Root Port
     stanzas, not the host bridge; currently only reset GPIOs
     implemented) (Sherry Sun)

  New native PCIe controller drivers:

   - Add DT binding and driver for UltraRISC DP1000 PCIe controller
     (Xincheng Zhang, Jia Wang)

  Altera PCIe controller driver:

   - Do not dispose of the parent IRQ mapping, which belongs to the
     parent interrupt controller (Mahesh Vaidya)

   - Fix chained IRQ handler ordering issue and resource leaks on probe
     failure (Mahesh Vaidya)

  AMD MDB PCIe controller driver:

   - Assert PERST# on shutdown so any connected Endpoints are held in
     reset during shutdown (Sai Krishna Musham)

  Amlogic Meson PCIe controller driver:

   - Propagate devm_add_action_or_reset() failure to fix probe error
     path (Shuvam Pandey)

   - Add .remove() callback to deinitialize the host bridge and power
     off the PHY (Shuvam Pandey)

  Broadcom iProc PCIe controller driver:

   - Restore .map_irq() assignment; its removal broke INTx on the iproc
     platform bus driver (Mark Tomlinson)

  Broadcom STB PCIe controller driver:

   - No change, but products using certain WiFi devices may be affected
     by removal of CONFIG_PCIE_BUS_* (see above)

  Freescale i.MX6 PCIe controller driver:

   - Move IMX6SX_GPR12_PCIE_TEST_POWERDOWN handling into the core reset
     functions (Richard Zhu)

   - Assert PERST# before enabling regulators to ensure that even if
     power is enabled, endpoint stays inactive until REFCLK is stable
     (Sherry Sun)

   - Parse reset properties in Root Port nodes (falling back to host
     bridge) to help support Key E connectors and the pwrctrl framework
     (Sherry Sun)

   - Configure i.MX95 REF_USE_PAD before PHY reset (Richard Zhu)

   - Assert i.MX95 ref_clk_en after reference clock stabilizes (Richard
     Zhu)

   - Integrate new pwrctrl API for DTs with Root Port-level power
     supplies (Sherry Sun)

  Intel Gateway PCIe controller driver:

   - Enable clock before PHY init for correct ordering (Florian Eckert)

   - Add .start_link() callback so the driver works again (Florian
     Eckert)

   - Stop overwriting the ATU base address discovered by
     dw_pcie_get_resources() (Florian Eckert)

   - Add DT 'atu' region since this is hardware-specific, and fall back
     to driver default if lacking (Florian Eckert)

  Loongson PCIe controller driver:

   - Ignore downstream devices only on internal bridges to avoid
     Loongson hardware issue (Rong Zhang)

   - Quirk old Loongson-3C6000 bridges that advertise incorrect
     supported link speeds (Ziyao Li)

  Marvell MVEBU PCIe controller driver:

   - Use fixed-width interrupt masks to avoid truncation in 64-bit
     builds (Rosen Penev)

  MediaTek PCIe controller driver:

   - Use FIELD_PREP() to fix incorrect operator precedence in
     PCIE_FTS_NUM_L0 (Li RongQing)

   - Fix IRQ domain leak when port fails to enable (Manivannan
     Sadhasivam)

   - Use actual physical address for MSI message address instead of
     virt_to_phys() (Manivannan Sadhasivam)

   - Add EcoNet EN7528 to DT binding (Caleb James DeLisle)

  MediaTek PCIe Gen3 controller driver:

   - Deassert PCIE_PHY_RSTB so REFCLK is stable for at least 100ms
     (PCIE_T_PVPERL_MS) before deasserting PERST# (Jian Yang)

   - Add .shutdown() to assert PERST# before powering down device (Jian
     Yang)

   - Do full device power down on removal, including asserting PERST#,
     when removing driver (Chen-Yu Tsai)

   - Fix a 'failed to create pwrctrl devices' error message that was
     inadvertently skipped (Chen-Yu Tsai)

  NVIDIA Tegra194 PCIe controller driver:

   - Program the DesignWare PORT_AFR L1 entrance latency based on the
     'aspm-l1-entry-delay-ns' DT property (Manikanta Maddireddy)

  Qualcomm PCIe controller driver:

   - Add Eliza SoC compatible in DT binding (Krishna Chaitanya Chundru)

   - Set max OPP during resume so DBI register accesses don't fail with
     NoC errors (Qiang Yu)

   - Add pci_host_common_d3cold_possible() to determine whether
     downstream devices are already in D3hot and wakeup-enabled devices
     are capable of generating PME from D3cold (Krishna Chaitanya
     Chundru)

   - Add .get_ltssm() callback to get the LTSSM status without DBI,
     since DBI may be inaccessible after PME_Turn_Off (Krishna Chaitanya
     Chundru)

   - Power down PHY via PARF_PHY_CTRL before disabling rails/clocks to
     avoid power leakage (Krishna Chaitanya Chundru)

   - Decide whether suspend should put the link in L2 and power down
     using pci_host_common_d3cold_possible() instead of checking whether
     ASPM L1 is enabled (Krishna Chaitanya Chundru)

   - Add qcom D3cold support to tear down interconnect bandwidth and OPP
     votes (Krishna Chaitanya Chundru)

   - Handle unsupported mixed PERST#/PHY DT configurations, e.g., PHY in
     RP node while PERST# is in the RC node, but warn about the DT issue
     (Qiang Yu)

   - Program T_POWER_ON based on DT 't-power-on-us' property in case
     hardware advertises incorrect values (Krishna Chaitanya Chundru)

   - Disable ASPM L0s for SA8775P (Shawn Guo)

   - Initialize DWC MSI lock for firmware-managed ECAM hosts, which
     don't use the dw_pcie_host_init() path that initializes the lock
     (Yadu M G)

  Renesas RZ/G3S PCIe controller driver:

   - Add RZ/V2N DT support (Lad Prabhakar)

  SOPHGO PCIe controller driver:

   - Add 'dma-coherent' DT property for sg2042-pcie driver (Han Gao)

  Synopsys DesignWare PCIe controller driver:

   - Apply ECRC TLP Digest workaround for all DesignWare cores prior to
     5.10a, not just 4.90a and 5.00a (Manikanta Maddireddy)

   - Use common struct dw_pcie 'mode' rather than duplicating it in
     artpec6, dra7xx, dwc-pcie, and keembay driver structs (Hans Zhang)

   - Use DEFINE_SHOW_ATTRIBUTE for ltssm_status debugfs to reduce
     boilerplate and fix a seq_file memory leak by including a
     .release() callback (Hans Zhang)

   - Fix a signedness bug in fault injection test code (Dan Carpenter)

   - Avoid NULL pointer dereference when tearing down debugfs for
     controller that lacks RAS DES capability (Shuvam Pandey)

  MicroSemi Switchtec management driver:

   - Add Gen6 Device IDs (Ben Reed)

  Miscellaneous:

   - Remove unused gpio.h include from amd-mdb, designware-plat, fu740,
     visconti drivers (Andy Shevchenko)

   - Fix typos in documentation (josh ziegler)

   - Use FIELD_MODIFY() instead of open-coding it (Hans Zhang)"

* tag 'pci-v7.2-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci: (168 commits)
  PCI/sysfs: Use kstrtobool() to parse the ROM attribute input
  PCI/sysfs: Limit BAR resize attribute scope to platforms with PCI mmap
  PCI/sysfs: Remove pci_create_legacy_files() and pci_sysfs_init()
  PCI/sysfs: Convert legacy I/O and memory attributes to static definitions
  PCI/sysfs: Add __weak pci_legacy_has_sparse() helper
  alpha/PCI: Compute legacy size in pci_mmap_legacy_page_range()
  PCI: Add macros for legacy I/O and memory address space sizes
  PCI/sysfs: Remove pci_{create,remove}_sysfs_dev_files()
  alpha/PCI: Convert resource files to static attributes
  alpha/PCI: Add static PCI resource attribute macros
  alpha/PCI: Remove WARN from __pci_mmap_fits() and __legacy_mmap_fits()
  alpha/PCI: Fix __pci_mmap_fits() overflow for zero-length BARs
  alpha/PCI: Use PCI resource accessor macros
  alpha/PCI: Use BAR index in sysfs attr->private instead of resource pointer
  alpha/PCI: Add security_locked_down() check to pci_mmap_resource()
  PCI/sysfs: Limit pci_sysfs_init() late_initcall compile scope
  PCI/sysfs: Add stubs for pci_{create,remove}_sysfs_dev_files()
  PCI/sysfs: Warn about BAR resize failure in __resource_resize_store()
  PCI/sysfs: Convert PCI resource files to static attributes
  PCI/proc: Fix race between pci_proc_init() and pci_bus_add_device()
  ...

2 files changed, 221 insertions, 180 deletions

diff --git a/arch/alpha/include/asm/pci.h b/arch/alpha/include/asm/pci.h
index 6c04fcbdc8ed..ad5d1391e1fa 100644
--- a/arch/alpha/include/asm/pci.h
+++ b/arch/alpha/include/asm/pci.h
@@ -84,8 +84,17 @@ extern int pci_legacy_write(struct pci_bus *bus, loff_t port, u32 val,
 extern int pci_mmap_legacy_page_range(struct pci_bus *bus,
 				      struct vm_area_struct *vma,
 				      enum pci_mmap_state mmap_state);
-extern void pci_adjust_legacy_attr(struct pci_bus *bus,
-				   enum pci_mmap_state mmap_type);
+extern bool pci_legacy_has_sparse(struct pci_bus *bus,
+				  enum pci_mmap_state type);
 #define HAVE_PCI_LEGACY	1
 
+extern const struct attribute_group pci_dev_resource_attr_group;
+extern const struct attribute_group pci_dev_resource_sparse_attr_group;
+extern const struct attribute_group pci_dev_resource_dense_attr_group;
+
+#define ARCH_PCI_DEV_GROUPS		\
+	&pci_dev_resource_attr_group,	\
+	&pci_dev_resource_sparse_attr_group,	\
+	&pci_dev_resource_dense_attr_group,
+
 #endif /* __ALPHA_PCI_H */
diff --git a/arch/alpha/kernel/pci-sysfs.c b/arch/alpha/kernel/pci-sysfs.c
index 3048758304b5..94dbc470cd6c 100644
--- a/arch/alpha/kernel/pci-sysfs.c
+++ b/arch/alpha/kernel/pci-sysfs.c
@@ -11,8 +11,7 @@
  */
 
 #include <linux/sched.h>
-#include <linux/stat.h>
-#include <linux/slab.h>
+#include <linux/security.h>
 #include <linux/pci.h>
 
 static int hose_mmap_page_range(struct pci_controller *hose,
@@ -36,20 +35,18 @@ static int hose_mmap_page_range(struct pci_controller *hose,
 static int __pci_mmap_fits(struct pci_dev *pdev, int num,
 			   struct vm_area_struct *vma, int sparse)
 {
+	resource_size_t len = pci_resource_len(pdev, num);
 	unsigned long nr, start, size;
 	int shift = sparse ? 5 : 0;
 
+	if (!len)
+		return 0;
+
 	nr = vma_pages(vma);
 	start = vma->vm_pgoff;
-	size = ((pci_resource_len(pdev, num) - 1) >> (PAGE_SHIFT - shift)) + 1;
+	size = ((len - 1) >> (PAGE_SHIFT - shift)) + 1;
 
-	if (start < size && size - start >= nr)
-		return 1;
-	WARN(1, "process \"%s\" tried to map%s 0x%08lx-0x%08lx on %s BAR %d "
-		"(size 0x%08lx)\n",
-		current->comm, sparse ? " sparse" : "", start, start + nr,
-		pci_name(pdev), num, size);
-	return 0;
+	return start < size && size - start >= nr;
 }
 
 /**
@@ -68,26 +65,25 @@ static int pci_mmap_resource(struct kobject *kobj,
 			     struct vm_area_struct *vma, int sparse)
 {
 	struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
-	struct resource *res = attr->private;
+	int barno = (unsigned long)attr->private;
 	enum pci_mmap_state mmap_type;
 	struct pci_bus_region bar;
-	int i;
+	int ret;
 
-	for (i = 0; i < PCI_STD_NUM_BARS; i++)
-		if (res == &pdev->resource[i])
-			break;
-	if (i >= PCI_STD_NUM_BARS)
-		return -ENODEV;
+	ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
+	if (ret)
+		return ret;
 
-	if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(res->start))
+	if (pci_resource_is_mem(pdev, barno) &&
+	    iomem_is_exclusive(pci_resource_start(pdev, barno)))
 		return -EINVAL;
 
-	if (!__pci_mmap_fits(pdev, i, vma, sparse))
+	if (!__pci_mmap_fits(pdev, barno, vma, sparse))
 		return -EINVAL;
 
-	pcibios_resource_to_bus(pdev->bus, &bar, res);
+	pcibios_resource_to_bus(pdev->bus, &bar, pci_resource_n(pdev, barno));
 	vma->vm_pgoff += bar.start >> (PAGE_SHIFT - (sparse ? 5 : 0));
-	mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
+	mmap_type = pci_resource_is_mem(pdev, barno) ? pci_mmap_mem : pci_mmap_io;
 
 	return hose_mmap_page_range(pdev->sysdata, vma, mmap_type, sparse);
 }
@@ -106,34 +102,26 @@ static int pci_mmap_resource_dense(struct file *filp, struct kobject *kobj,
 	return pci_mmap_resource(kobj, attr, vma, 0);
 }
 
-/**
- * pci_remove_resource_files - cleanup resource files
- * @pdev: pci_dev to cleanup
- *
- * If we created resource files for @dev, remove them from sysfs and
- * free their resources.
- */
-void pci_remove_resource_files(struct pci_dev *pdev)
-{
-	int i;
-
-	for (i = 0; i < PCI_STD_NUM_BARS; i++) {
-		struct bin_attribute *res_attr;
-
-		res_attr = pdev->res_attr[i];
-		if (res_attr) {
-			sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
-			kfree(res_attr);
-		}
-
-		res_attr = pdev->res_attr_wc[i];
-		if (res_attr) {
-			sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
-			kfree(res_attr);
-		}
-	}
+#define __pci_dev_resource_attr(_bar, _name, _suffix, _mmap)		\
+static const struct bin_attribute					\
+pci_dev_resource##_bar##_suffix##_attr = {				\
+	.attr = { .name = __stringify(_name), .mode = 0600 },		\
+	.private = (void *)(unsigned long)(_bar),			\
+	.mmap = (_mmap),						\
 }
 
+#define pci_dev_resource_attr(_bar)					\
+	__pci_dev_resource_attr(_bar, resource##_bar,,			\
+			    pci_mmap_resource_dense)
+
+#define pci_dev_resource_sparse_attr(_bar)				\
+	__pci_dev_resource_attr(_bar, resource##_bar##_sparse, _sparse,	\
+			    pci_mmap_resource_sparse)
+
+#define pci_dev_resource_dense_attr(_bar)				\
+	__pci_dev_resource_attr(_bar, resource##_bar##_dense, _dense,	\
+			    pci_mmap_resource_dense)
+
 static int sparse_mem_mmap_fits(struct pci_dev *pdev, int num)
 {
 	struct pci_bus_region bar;
@@ -141,7 +129,7 @@ static int sparse_mem_mmap_fits(struct pci_dev *pdev, int num)
 	long dense_offset;
 	unsigned long sparse_size;
 
-	pcibios_resource_to_bus(pdev->bus, &bar, &pdev->resource[num]);
+	pcibios_resource_to_bus(pdev->bus, &bar, pci_resource_n(pdev, num));
 
 	/* All core logic chips have 4G sparse address space, except
 	   CIA which has 16G (see xxx_SPARSE_MEM and xxx_DENSE_MEM
@@ -153,109 +141,10 @@ static int sparse_mem_mmap_fits(struct pci_dev *pdev, int num)
 	return bar.end < sparse_size;
 }
 
-static int pci_create_one_attr(struct pci_dev *pdev, int num, char *name,
-			       char *suffix, struct bin_attribute *res_attr,
-			       unsigned long sparse)
-{
-	size_t size = pci_resource_len(pdev, num);
-
-	sprintf(name, "resource%d%s", num, suffix);
-	res_attr->mmap = sparse ? pci_mmap_resource_sparse :
-				  pci_mmap_resource_dense;
-	res_attr->attr.name = name;
-	res_attr->attr.mode = S_IRUSR | S_IWUSR;
-	res_attr->size = sparse ? size << 5 : size;
-	res_attr->private = &pdev->resource[num];
-	return sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
-}
-
-static int pci_create_attr(struct pci_dev *pdev, int num)
-{
-	/* allocate attribute structure, piggyback attribute name */
-	int retval, nlen1, nlen2 = 0, res_count = 1;
-	unsigned long sparse_base, dense_base;
-	struct bin_attribute *attr;
-	struct pci_controller *hose = pdev->sysdata;
-	char *suffix, *attr_name;
-
-	suffix = "";	/* Assume bwx machine, normal resourceN files. */
-	nlen1 = 10;
-
-	if (pdev->resource[num].flags & IORESOURCE_MEM) {
-		sparse_base = hose->sparse_mem_base;
-		dense_base = hose->dense_mem_base;
-		if (sparse_base && !sparse_mem_mmap_fits(pdev, num)) {
-			sparse_base = 0;
-			suffix = "_dense";
-			nlen1 = 16;	/* resourceN_dense */
-		}
-	} else {
-		sparse_base = hose->sparse_io_base;
-		dense_base = hose->dense_io_base;
-	}
-
-	if (sparse_base) {
-		suffix = "_sparse";
-		nlen1 = 17;
-		if (dense_base) {
-			nlen2 = 16;	/* resourceN_dense */
-			res_count = 2;
-		}
-	}
-
-	attr = kzalloc(sizeof(*attr) * res_count + nlen1 + nlen2, GFP_ATOMIC);
-	if (!attr)
-		return -ENOMEM;
-
-	/* Create bwx, sparse or single dense file */
-	attr_name = (char *)(attr + res_count);
-	pdev->res_attr[num] = attr;
-	retval = pci_create_one_attr(pdev, num, attr_name, suffix, attr,
-				     sparse_base);
-	if (retval || res_count == 1)
-		return retval;
-
-	/* Create dense file */
-	attr_name += nlen1;
-	attr++;
-	pdev->res_attr_wc[num] = attr;
-	return pci_create_one_attr(pdev, num, attr_name, "_dense", attr, 0);
-}
-
-/**
- * pci_create_resource_files - create resource files in sysfs for @pdev
- * @pdev: pci_dev in question
- *
- * Walk the resources in @dev creating files for each resource available.
- *
- * Return: %0 on success, or negative error code
- */
-int pci_create_resource_files(struct pci_dev *pdev)
-{
-	int i;
-	int retval;
-
-	/* Expose the PCI resources from this device as files */
-	for (i = 0; i < PCI_STD_NUM_BARS; i++) {
-
-		/* skip empty resources */
-		if (!pci_resource_len(pdev, i))
-			continue;
-
-		retval = pci_create_attr(pdev, i);
-		if (retval) {
-			pci_remove_resource_files(pdev);
-			return retval;
-		}
-	}
-	return 0;
-}
-
 /* Legacy I/O bus mapping stuff. */
 
-static int __legacy_mmap_fits(struct pci_controller *hose,
-			      struct vm_area_struct *vma,
-			      unsigned long res_size, int sparse)
+static int __legacy_mmap_fits(struct vm_area_struct *vma,
+			      unsigned long res_size)
 {
 	unsigned long nr, start, size;
 
@@ -263,13 +152,7 @@ static int __legacy_mmap_fits(struct pci_controller *hose,
 	start = vma->vm_pgoff;
 	size = ((res_size - 1) >> PAGE_SHIFT) + 1;
 
-	if (start < size && size - start >= nr)
-		return 1;
-	WARN(1, "process \"%s\" tried to map%s 0x%08lx-0x%08lx on hose %d "
-		"(size 0x%08lx)\n",
-		current->comm, sparse ? " sparse" : "", start, start + nr,
-		hose->index, size);
-	return 0;
+	return start < size && size - start >= nr;
 }
 
 static inline int has_sparse(struct pci_controller *hose,
@@ -290,36 +173,22 @@ int pci_mmap_legacy_page_range(struct pci_bus *bus, struct vm_area_struct *vma,
 	int sparse = has_sparse(hose, mmap_type);
 	unsigned long res_size;
 
-	res_size = (mmap_type == pci_mmap_mem) ? bus->legacy_mem->size :
-						 bus->legacy_io->size;
-	if (!__legacy_mmap_fits(hose, vma, res_size, sparse))
+	res_size = (mmap_type == pci_mmap_mem) ? PCI_LEGACY_MEM_SIZE :
+						 PCI_LEGACY_IO_SIZE;
+	if (sparse)
+		res_size <<= 5;
+
+	if (!__legacy_mmap_fits(vma, res_size))
 		return -EINVAL;
 
 	return hose_mmap_page_range(hose, vma, mmap_type, sparse);
 }
 
-/**
- * pci_adjust_legacy_attr - adjustment of legacy file attributes
- * @bus: bus to create files under
- * @mmap_type: I/O port or memory
- *
- * Adjust file name and size for sparse mappings.
- */
-void pci_adjust_legacy_attr(struct pci_bus *bus, enum pci_mmap_state mmap_type)
+bool pci_legacy_has_sparse(struct pci_bus *bus, enum pci_mmap_state type)
 {
 	struct pci_controller *hose = bus->sysdata;
 
-	if (!has_sparse(hose, mmap_type))
-		return;
-
-	if (mmap_type == pci_mmap_mem) {
-		bus->legacy_mem->attr.name = "legacy_mem_sparse";
-		bus->legacy_mem->size <<= 5;
-	} else {
-		bus->legacy_io->attr.name = "legacy_io_sparse";
-		bus->legacy_io->size <<= 5;
-	}
-	return;
+	return has_sparse(hose, type);
 }
 
 /* Legacy I/O bus read/write functions */
@@ -370,3 +239,166 @@ int pci_legacy_write(struct pci_bus *bus, loff_t port, u32 val, size_t size)
 	}
 	return -EINVAL;
 }
+
+pci_dev_resource_attr(0);
+pci_dev_resource_attr(1);
+pci_dev_resource_attr(2);
+pci_dev_resource_attr(3);
+pci_dev_resource_attr(4);
+pci_dev_resource_attr(5);
+
+pci_dev_resource_sparse_attr(0);
+pci_dev_resource_sparse_attr(1);
+pci_dev_resource_sparse_attr(2);
+pci_dev_resource_sparse_attr(3);
+pci_dev_resource_sparse_attr(4);
+pci_dev_resource_sparse_attr(5);
+
+pci_dev_resource_dense_attr(0);
+pci_dev_resource_dense_attr(1);
+pci_dev_resource_dense_attr(2);
+pci_dev_resource_dense_attr(3);
+pci_dev_resource_dense_attr(4);
+pci_dev_resource_dense_attr(5);
+
+static inline enum pci_mmap_state pci_bar_mmap_type(struct pci_dev *pdev,
+						    int bar)
+{
+	return pci_resource_is_mem(pdev, bar) ? pci_mmap_mem : pci_mmap_io;
+}
+
+static inline umode_t __pci_resource_attr_is_visible(struct kobject *kobj,
+						     const struct bin_attribute *a,
+						     int bar)
+{
+	struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
+
+	if (!pci_resource_len(pdev, bar))
+		return 0;
+
+	return a->attr.mode;
+}
+
+static umode_t pci_dev_resource_is_visible(struct kobject *kobj,
+					   const struct bin_attribute *a,
+					   int bar)
+{
+	struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
+	struct pci_controller *hose = pdev->sysdata;
+
+	if (has_sparse(hose, pci_bar_mmap_type(pdev, bar)))
+		return 0;
+
+	return __pci_resource_attr_is_visible(kobj, a, bar);
+}
+
+static umode_t pci_dev_resource_sparse_is_visible(struct kobject *kobj,
+						  const struct bin_attribute *a,
+						  int bar)
+{
+	struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
+	struct pci_controller *hose = pdev->sysdata;
+	enum pci_mmap_state type = pci_bar_mmap_type(pdev, bar);
+
+	if (!has_sparse(hose, type))
+		return 0;
+
+	if (type == pci_mmap_mem && !sparse_mem_mmap_fits(pdev, bar))
+		return 0;
+
+	return __pci_resource_attr_is_visible(kobj, a, bar);
+}
+
+static umode_t pci_dev_resource_dense_is_visible(struct kobject *kobj,
+						 const struct bin_attribute *a,
+						 int bar)
+{
+	struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
+	struct pci_controller *hose = pdev->sysdata;
+	enum pci_mmap_state type = pci_bar_mmap_type(pdev, bar);
+	unsigned long dense_base;
+
+	if (!has_sparse(hose, type))
+		return 0;
+
+	if (type == pci_mmap_mem && !sparse_mem_mmap_fits(pdev, bar))
+		return __pci_resource_attr_is_visible(kobj, a, bar);
+
+	dense_base = (type == pci_mmap_mem) ? hose->dense_mem_base :
+					      hose->dense_io_base;
+	if (!dense_base)
+		return 0;
+
+	return __pci_resource_attr_is_visible(kobj, a, bar);
+}
+
+static inline size_t __pci_dev_resource_bin_size(struct kobject *kobj,
+						 int bar, bool sparse)
+{
+	struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
+	size_t size = pci_resource_len(pdev, bar);
+
+	return sparse ? size << 5 : size;
+}
+
+static size_t pci_dev_resource_bin_size(struct kobject *kobj,
+					const struct bin_attribute *a,
+					int bar)
+{
+	return __pci_dev_resource_bin_size(kobj, bar, false);
+}
+
+static size_t pci_dev_resource_sparse_bin_size(struct kobject *kobj,
+					       const struct bin_attribute *a,
+					       int bar)
+{
+	return __pci_dev_resource_bin_size(kobj, bar, true);
+}
+
+static const struct bin_attribute *const pci_dev_resource_attrs[] = {
+	&pci_dev_resource0_attr,
+	&pci_dev_resource1_attr,
+	&pci_dev_resource2_attr,
+	&pci_dev_resource3_attr,
+	&pci_dev_resource4_attr,
+	&pci_dev_resource5_attr,
+	NULL,
+};
+
+static const struct bin_attribute *const pci_dev_resource_sparse_attrs[] = {
+	&pci_dev_resource0_sparse_attr,
+	&pci_dev_resource1_sparse_attr,
+	&pci_dev_resource2_sparse_attr,
+	&pci_dev_resource3_sparse_attr,
+	&pci_dev_resource4_sparse_attr,
+	&pci_dev_resource5_sparse_attr,
+	NULL,
+};
+
+static const struct bin_attribute *const pci_dev_resource_dense_attrs[] = {
+	&pci_dev_resource0_dense_attr,
+	&pci_dev_resource1_dense_attr,
+	&pci_dev_resource2_dense_attr,
+	&pci_dev_resource3_dense_attr,
+	&pci_dev_resource4_dense_attr,
+	&pci_dev_resource5_dense_attr,
+	NULL,
+};
+
+const struct attribute_group pci_dev_resource_attr_group = {
+	.bin_attrs = pci_dev_resource_attrs,
+	.is_bin_visible = pci_dev_resource_is_visible,
+	.bin_size = pci_dev_resource_bin_size,
+};
+
+const struct attribute_group pci_dev_resource_sparse_attr_group = {
+	.bin_attrs = pci_dev_resource_sparse_attrs,
+	.is_bin_visible = pci_dev_resource_sparse_is_visible,
+	.bin_size = pci_dev_resource_sparse_bin_size,
+};
+
+const struct attribute_group pci_dev_resource_dense_attr_group = {
+	.bin_attrs = pci_dev_resource_dense_attrs,
+	.is_bin_visible = pci_dev_resource_dense_is_visible,
+	.bin_size = pci_dev_resource_bin_size,
+};