summaryrefslogtreecommitdiff
path: root/Documentation/devicetree
diff options
context:
space:
mode:
authorMark Brown <broonie@kernel.org>2026-07-26 21:52:14 +0100
committerMark Brown <broonie@kernel.org>2026-07-26 21:52:14 +0100
commit9c2921b68e266f52ebfffc3fa31c62ed96437c51 (patch)
tree22cb42233828a0bf1fd4ee1dd3af9cc7b1ae4faf /Documentation/devicetree
parentc64ed6d2698bde8d64fc37dfa200a3ec5e0a08b8 (diff)
parentff6aa34f0c7b597384fa211ba75e68600901037e (diff)
downloadlinux-next-9c2921b68e266f52ebfffc3fa31c62ed96437c51.tar.gz
linux-next-9c2921b68e266f52ebfffc3fa31c62ed96437c51.zip
Merge branch 'i2c/i2c-next' of https://git.kernel.org/pub/scm/linux/kernel/git/andi.shyti/linux.git
Diffstat (limited to 'Documentation/devicetree')
-rw-r--r--Documentation/devicetree/bindings/i2c/altr,softip-i2c-v1.0.yaml62
-rw-r--r--Documentation/devicetree/bindings/i2c/i2c-altera.txt39
-rw-r--r--Documentation/devicetree/bindings/i2c/i2c-axxia.txt30
-rw-r--r--Documentation/devicetree/bindings/i2c/lsi,api2c.yaml52
-rw-r--r--Documentation/devicetree/bindings/i2c/qcom,sa8255p-geni-i2c.yaml64
5 files changed, 178 insertions, 69 deletions
diff --git a/Documentation/devicetree/bindings/i2c/altr,softip-i2c-v1.0.yaml b/Documentation/devicetree/bindings/i2c/altr,softip-i2c-v1.0.yaml
new file mode 100644
index 000000000000..d04570680c05
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/altr,softip-i2c-v1.0.yaml
@@ -0,0 +1,62 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/i2c/altr,softip-i2c-v1.0.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Altera I2C Controller
+
+maintainers:
+ - Thor Thayer <thor.thayer@linux.intel.com>
+ - Chaitanya Sabnis <chaitanya.msabnis@gmail.com>
+
+description:
+ Altera's synthesizable logic block I2C Controller for use in Altera's FPGAs.
+
+allOf:
+ - $ref: /schemas/i2c/i2c-controller.yaml#
+
+properties:
+ compatible:
+ const: altr,softip-i2c-v1.0
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ fifo-size:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: Size of the RX and TX FIFOs in bytes.
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ i2c@80000 {
+ compatible = "altr,softip-i2c-v1.0";
+ reg = <0x80000 0x40>;
+ interrupt-parent = <&intc>;
+ interrupts = <0 43 4>;
+ clocks = <&clk_0>;
+ clock-frequency = <100000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ fifo-size = <4>;
+
+ eeprom@51 {
+ compatible = "atmel,24c32";
+ reg = <0x51>;
+ pagesize = <32>;
+ };
+ };
diff --git a/Documentation/devicetree/bindings/i2c/i2c-altera.txt b/Documentation/devicetree/bindings/i2c/i2c-altera.txt
deleted file mode 100644
index 767664f448ec..000000000000
--- a/Documentation/devicetree/bindings/i2c/i2c-altera.txt
+++ /dev/null
@@ -1,39 +0,0 @@
-* Altera I2C Controller
-* This is Altera's synthesizable logic block I2C Controller for use
-* in Altera's FPGAs.
-
-Required properties :
- - compatible : should be "altr,softip-i2c-v1.0"
- - reg : Offset and length of the register set for the device
- - interrupts : <IRQ> where IRQ is the interrupt number.
- - clocks : phandle to input clock.
- - #address-cells = <1>;
- - #size-cells = <0>;
-
-Recommended properties :
- - clock-frequency : desired I2C bus clock frequency in Hz.
-
-Optional properties :
- - fifo-size : Size of the RX and TX FIFOs in bytes.
- - Child nodes conforming to i2c bus binding
-
-Example :
-
- i2c@100080000 {
- compatible = "altr,softip-i2c-v1.0";
- reg = <0x00000001 0x00080000 0x00000040>;
- interrupt-parent = <&intc>;
- interrupts = <0 43 4>;
- clocks = <&clk_0>;
- clock-frequency = <100000>;
- #address-cells = <1>;
- #size-cells = <0>;
- fifo-size = <4>;
-
- eeprom@51 {
- compatible = "atmel,24c32";
- reg = <0x51>;
- pagesize = <32>;
- };
- };
-
diff --git a/Documentation/devicetree/bindings/i2c/i2c-axxia.txt b/Documentation/devicetree/bindings/i2c/i2c-axxia.txt
deleted file mode 100644
index 7d53a2b79553..000000000000
--- a/Documentation/devicetree/bindings/i2c/i2c-axxia.txt
+++ /dev/null
@@ -1,30 +0,0 @@
-LSI Axxia I2C
-
-Required properties :
-- compatible : Must be "lsi,api2c"
-- reg : Offset and length of the register set for the device
-- interrupts : the interrupt specifier
-- #address-cells : Must be <1>;
-- #size-cells : Must be <0>;
-- clock-names : Must contain "i2c".
-- clocks: Must contain an entry for each name in clock-names. See the common
- clock bindings.
-
-Optional properties :
-- clock-frequency : Desired I2C bus clock frequency in Hz. If not specified,
- the default 100 kHz frequency will be used. As only Normal and Fast modes
- are supported, possible values are 100000 and 400000.
-
-Example :
-
-i2c@2010084000 {
- compatible = "lsi,api2c";
- device_type = "i2c";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x20 0x10084000 0x00 0x1000>;
- interrupts = <0 19 4>;
- clocks = <&clk_per>;
- clock-names = "i2c";
- clock-frequency = <400000>;
-};
diff --git a/Documentation/devicetree/bindings/i2c/lsi,api2c.yaml b/Documentation/devicetree/bindings/i2c/lsi,api2c.yaml
new file mode 100644
index 000000000000..2d1c3069c3a3
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/lsi,api2c.yaml
@@ -0,0 +1,52 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/i2c/lsi,api2c.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: LSI Axxia I2C Controller
+
+maintainers:
+ - Anders Berg <anders.berg@lsi.com>
+ - Chaitanya Sabnis <chaitanya.msabnis@gmail.com>
+
+allOf:
+ - $ref: /schemas/i2c/i2c-controller.yaml#
+
+properties:
+ compatible:
+ const: lsi,api2c
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ const: i2c
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ i2c@10084000 {
+ compatible = "lsi,api2c";
+ reg = <0x10084000 0x1000>;
+ interrupts = <0 19 4>;
+ clocks = <&clk_per>;
+ clock-names = "i2c";
+ clock-frequency = <400000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
diff --git a/Documentation/devicetree/bindings/i2c/qcom,sa8255p-geni-i2c.yaml b/Documentation/devicetree/bindings/i2c/qcom,sa8255p-geni-i2c.yaml
new file mode 100644
index 000000000000..a61e40b5cbc1
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/qcom,sa8255p-geni-i2c.yaml
@@ -0,0 +1,64 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/i2c/qcom,sa8255p-geni-i2c.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm SA8255p QUP GENI I2C Controller
+
+maintainers:
+ - Praveen Talari <praveen.talari@oss.qualcomm.com>
+
+properties:
+ compatible:
+ const: qcom,sa8255p-geni-i2c
+
+ reg:
+ maxItems: 1
+
+ dmas:
+ maxItems: 2
+
+ dma-names:
+ items:
+ - const: tx
+ - const: rx
+
+ interrupts:
+ maxItems: 1
+
+ power-domains:
+ maxItems: 2
+
+ power-domain-names:
+ items:
+ - const: power
+ - const: perf
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - power-domains
+
+allOf:
+ - $ref: /schemas/i2c/i2c-controller.yaml#
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/dma/qcom-gpi.h>
+
+ i2c@a90000 {
+ compatible = "qcom,sa8255p-geni-i2c";
+ reg = <0xa90000 0x4000>;
+ interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma0 0 0 QCOM_GPI_I2C>,
+ <&gpi_dma0 1 0 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
+ power-domains = <&scmi0_pd 0>, <&scmi0_dvfs 0>;
+ power-domain-names = "power", "perf";
+ };
+...