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| author | Taniya Das <quic_tdas@quicinc.com> | 2025-07-02 14:34:26 +0530 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2025-07-16 23:12:06 -0500 |
| commit | 3590dfbdd1b3e4ceba0b7daed2a396f644c277c4 (patch) | |
| tree | 60e3adfc5457af28c5bd3f6b1327ecaf579d07e2 /Documentation/devicetree/bindings/clock | |
| parent | 9b47105f5434707eab065f65e7d35c62a51179f8 (diff) | |
| download | linux-next-3590dfbdd1b3e4ceba0b7daed2a396f644c277c4.tar.gz linux-next-3590dfbdd1b3e4ceba0b7daed2a396f644c277c4.zip | |
dt-bindings: clock: Add Qualcomm QCS615 Graphics clock controller
Add DT bindings for the Graphics clock on QCS615 platforms. Add the
relevant DT include definitions as well.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Link: https://lore.kernel.org/r/20250702-qcs615-mm-v10-clock-controllers-v11-6-9c216e1615ab@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/clock')
| -rw-r--r-- | Documentation/devicetree/bindings/clock/qcom,qcs615-gpucc.yaml | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/qcom,qcs615-gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,qcs615-gpucc.yaml new file mode 100644 index 000000000000..5f7d83d1a7be --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,qcs615-gpucc.yaml @@ -0,0 +1,49 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,qcs615-gpucc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Graphics Clock & Reset Controller on QCS615 + +maintainers: + - Taniya Das <quic_tdas@quicinc.com> + +description: | + Qualcomm graphics clock control module provides clocks, resets and power + domains on QCS615 Qualcomm SoCs. + + See also: include/dt-bindings/clock/qcom,qcs615-gpucc.h + +properties: + compatible: + const: qcom,qcs615-gpucc + + clocks: + items: + - description: Board XO source + - description: GPLL0 main branch source + - description: GPLL0 GPUCC div branch source + +allOf: + - $ref: qcom,gcc.yaml# + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,rpmh.h> + #include <dt-bindings/clock/qcom,qcs615-gcc.h> + + clock-controller@5090000 { + compatible = "qcom,qcs615-gpucc"; + reg = <0x5090000 0x9000>; + clocks = <&rpmhcc RPMH_CXO_CLK>, + <&gcc GPLL0>, + <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>; + + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; +... |
