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| author | Guixin Liu <kanie@linux.alibaba.com> | 2026-09-17 10:46:32 +0800 |
|---|---|---|
| committer | Dave Jiang <dave.jiang@intel.com> | 2026-09-18 08:11:04 -0700 |
| commit | ef71014055f7b4959e4cb023ca8a18258cb5641c (patch) | |
| tree | cf7c6153750f44951c0969c2e5307bfe60c26823 | |
| parent | bb26797c08d408ea7e8d3625045f0fe28714a425 (diff) | |
| download | linux-next-ef71014055f7b4959e4cb023ca8a18258cb5641c.tar.gz linux-next-ef71014055f7b4959e4cb023ca8a18258cb5641c.zip | |
cxl/region: Create node access attributes for CFMWS-only NUMA nodes
A NUMA node that only backs a CXL fixed memory window and is not
enumerated by SRAT has no memory_target in the HMAT code, so
hmat_callback() exits early at find_mem_target() and never creates
the node's accessN attributes:
/sys/devices/system/node/nodeX/accessN/initiators/* stays missing.
Commit debdce20c4f2 ("cxl/region: Deal with numa nodes not enumerated
by SRAT") had the CXL region notifier call node_set_perf_attrs()
directly for such nodes, but commit 2e454fb8056d ("cxl, acpi/hmat:
Update CXL access coordinates directly instead of through HMAT")
replaced it with node_update_perf_attrs(), which only updates
attributes that already exist and thus does nothing for these nodes.
Create the attributes with node_set_perf_attrs() when the node is not
backed by a real SRAT pxm.
Tested on a QEMU CXL topology with a CFMWS window not described by
SRAT or HMAT: node1/access0/initiators/{read,write}_{bandwidth,latency}
appear with the calculated coordinates once the region's first memory
block comes online.
Fixes: 2e454fb8056d ("cxl, acpi/hmat: Update CXL access coordinates directly instead of through HMAT")
Reviewed-by: Jonathan Cameron <jonathan.cameron@oss.qualcomm.com>
Signed-off-by: Guixin Liu <kanie@linux.alibaba.com>
Reviewed-by: Gregory Price (Meta) <gourry@gourry.net>
Reviewed-by: Alison Schofield <alison.schofield@intel.com>
Link: https://patch.msgid.link/20260917024632.1397380-1-kanie@linux.alibaba.com
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
| -rw-r--r-- | drivers/cxl/core/region.c | 15 |
1 files changed, 14 insertions, 1 deletions
diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c index 27e63e6dab7c..9a5fd3da539d 100644 --- a/drivers/cxl/core/region.c +++ b/drivers/cxl/core/region.c @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* Copyright(c) 2022 Intel Corporation. All rights reserved. */ +#include <linux/acpi.h> #include <linux/memregion.h> #include <linux/genalloc.h> #include <linux/debugfs.h> @@ -2630,7 +2631,19 @@ static bool cxl_region_update_coordinates(struct cxl_region *cxlr, int nid) for (int i = 0; i < ACCESS_COORDINATE_MAX; i++) { if (cxlr->coord[i].read_bandwidth) { - node_update_perf_attrs(nid, &cxlr->coord[i], i); + /* + * A CFMWS-only node (not backed by a real SRAT pxm) + * has no HMAT memory_target, so hmat_callback() + * never created the access attributes for it: + * create them here instead of only updating them. + * This is called at most once per node (see + * nodemask_region_seen), so the attributes are not + * created twice. + */ + if (!acpi_node_backed_by_real_pxm(nid)) + node_set_perf_attrs(nid, &cxlr->coord[i], i); + else + node_update_perf_attrs(nid, &cxlr->coord[i], i); cset++; } } |
