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| author | Eric Biggers <ebiggers@kernel.org> | 2026-05-31 12:17:38 -0700 |
|---|---|---|
| committer | Herbert Xu <herbert@gondor.apana.org.au> | 2026-06-12 09:56:26 +0800 |
| commit | be6498ca1cca9084330bdefb68ad8379d1ac5ea7 (patch) | |
| tree | 9574505def0ad8e079fdad6edc09d046cfebb8e8 | |
| parent | 5f1d444e084ce3e4619e38c45a8cc29e6fffb2bf (diff) | |
| download | linux-next-be6498ca1cca9084330bdefb68ad8379d1ac5ea7.tar.gz linux-next-be6498ca1cca9084330bdefb68ad8379d1ac5ea7.zip | |
hwrng: xilinx - Move xilinx-rng into drivers/char/hw_random/
Since this file just implements a hwrng driver, move it into
drivers/char/hw_random/. Rename the kconfig option accordingly as well.
Signed-off-by: Eric Biggers <ebiggers@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
| -rw-r--r-- | MAINTAINERS | 2 | ||||
| -rw-r--r-- | arch/arm64/configs/defconfig | 2 | ||||
| -rw-r--r-- | drivers/char/hw_random/Kconfig | 11 | ||||
| -rw-r--r-- | drivers/char/hw_random/Makefile | 1 | ||||
| -rw-r--r-- | drivers/char/hw_random/xilinx-trng.c (renamed from drivers/crypto/xilinx/xilinx-trng.c) | 0 | ||||
| -rw-r--r-- | drivers/crypto/Kconfig | 12 | ||||
| -rw-r--r-- | drivers/crypto/xilinx/Makefile | 1 |
7 files changed, 14 insertions, 15 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index afad0783395d..3036d80710af 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -29211,7 +29211,7 @@ XILINX TRNG DRIVER M: Mounika Botcha <mounika.botcha@amd.com> M: Harsh Jain <h.jain@amd.com> S: Maintained -F: drivers/crypto/xilinx/xilinx-trng.c +F: drivers/char/hw_random/xilinx-trng.c XILINX UARTLITE SERIAL DRIVER M: Peter Korsgaard <jacmet@sunsite.dk> diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index cbb0ffe0a9d3..6745189b1fbc 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -551,6 +551,7 @@ CONFIG_IPMI_SI=m CONFIG_HW_RANDOM=y CONFIG_HW_RANDOM_VIRTIO=y CONFIG_HW_RANDOM_HISI_TRNG=m +CONFIG_HW_RANDOM_XILINX=m CONFIG_TCG_TPM=y CONFIG_TCG_TIS=m CONFIG_TCG_TIS_SPI=m @@ -1956,7 +1957,6 @@ CONFIG_CRYPTO_DEV_FSL_DPAA2_CAAM=m CONFIG_CRYPTO_DEV_QCE=m CONFIG_CRYPTO_DEV_QCOM_RNG=m CONFIG_CRYPTO_DEV_TEGRA=m -CONFIG_CRYPTO_DEV_XILINX_TRNG=m CONFIG_CRYPTO_DEV_ZYNQMP_AES=m CONFIG_CRYPTO_DEV_ZYNQMP_SHA3=m CONFIG_CRYPTO_DEV_CCREE=m diff --git a/drivers/char/hw_random/Kconfig b/drivers/char/hw_random/Kconfig index 3ea74f208f06..a5bcef4a54ee 100644 --- a/drivers/char/hw_random/Kconfig +++ b/drivers/char/hw_random/Kconfig @@ -625,6 +625,17 @@ config HW_RANDOM_ROCKCHIP If unsure, say Y. +config HW_RANDOM_XILINX + tristate "Support for Xilinx True Random Generator" + depends on ZYNQMP_FIRMWARE || COMPILE_TEST + select CRYPTO_LIB_SHA512 + help + Xilinx Versal SoC driver provides kernel-side support for True Random Number + Generator and Pseudo random Number in CTR_DRBG mode as defined in NIST SP800-90A. + + To compile this driver as a module, choose M here: the module + will be called xilinx-trng. + endif # HW_RANDOM config UML_RANDOM diff --git a/drivers/char/hw_random/Makefile b/drivers/char/hw_random/Makefile index 3e655d6e116b..95b5adb49560 100644 --- a/drivers/char/hw_random/Makefile +++ b/drivers/char/hw_random/Makefile @@ -53,3 +53,4 @@ obj-$(CONFIG_HW_RANDOM_CN10K) += cn10k-rng.o obj-$(CONFIG_HW_RANDOM_POLARFIRE_SOC) += mpfs-rng.o obj-$(CONFIG_HW_RANDOM_ROCKCHIP) += rockchip-rng.o obj-$(CONFIG_HW_RANDOM_JH7110) += jh7110-trng.o +obj-$(CONFIG_HW_RANDOM_XILINX) += xilinx-trng.o diff --git a/drivers/crypto/xilinx/xilinx-trng.c b/drivers/char/hw_random/xilinx-trng.c index f615d5adddde..f615d5adddde 100644 --- a/drivers/crypto/xilinx/xilinx-trng.c +++ b/drivers/char/hw_random/xilinx-trng.c diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig index b94ba934e2d8..216a00bad5d7 100644 --- a/drivers/crypto/Kconfig +++ b/drivers/crypto/Kconfig @@ -699,18 +699,6 @@ config CRYPTO_DEV_TEGRA Select this to enable Tegra Security Engine which accelerates various AES encryption/decryption and HASH algorithms. -config CRYPTO_DEV_XILINX_TRNG - tristate "Support for Xilinx True Random Generator" - depends on ZYNQMP_FIRMWARE || COMPILE_TEST - select CRYPTO_LIB_SHA512 - select HW_RANDOM - help - Xilinx Versal SoC driver provides kernel-side support for True Random Number - Generator and Pseudo random Number in CTR_DRBG mode as defined in NIST SP800-90A. - - To compile this driver as a module, choose M here: the module - will be called xilinx-trng. - config CRYPTO_DEV_ZYNQMP_AES tristate "Support for Xilinx ZynqMP AES hw accelerator" depends on ZYNQMP_FIRMWARE || COMPILE_TEST diff --git a/drivers/crypto/xilinx/Makefile b/drivers/crypto/xilinx/Makefile index 9b51636ef75e..730feff5b5f2 100644 --- a/drivers/crypto/xilinx/Makefile +++ b/drivers/crypto/xilinx/Makefile @@ -1,4 +1,3 @@ # SPDX-License-Identifier: GPL-2.0-only -obj-$(CONFIG_CRYPTO_DEV_XILINX_TRNG) += xilinx-trng.o obj-$(CONFIG_CRYPTO_DEV_ZYNQMP_AES) += zynqmp-aes-gcm.o obj-$(CONFIG_CRYPTO_DEV_ZYNQMP_SHA3) += zynqmp-sha.o |