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| author | Abel Vesa <abel.vesa@oss.qualcomm.com> | 2026-09-24 15:06:36 +0300 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2026-10-13 09:49:42 -0500 |
| commit | b1a8564a6d18e8dd7f680df1e8f99fe8883e6575 (patch) | |
| tree | 9a30035b1bfe2a628997fc12b91515246cf19db1 | |
| parent | d4e4e1be4a47a7a44470ec2f0b51c28cd8cc470a (diff) | |
| download | linux-next-b1a8564a6d18e8dd7f680df1e8f99fe8883e6575.tar.gz linux-next-b1a8564a6d18e8dd7f680df1e8f99fe8883e6575.zip | |
clk: qcom: gcc-sdx65: Use common clock controller probe data
Move the always-on branch register offsets into a critical_cbcrs array
and move the register programming into the clk_regs_configure callback.
Use qcom_cc_probe() to perform the common initialization instead of
open-coding it in the driver's probe.
Assisted-by: LLM
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Link: https://patch.msgid.link/20260924-clk-qcom-rework-legacy-always-on-clocks-v2-24-1479443ee016@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
| -rw-r--r-- | drivers/clk/qcom/gcc-sdx65.c | 31 |
1 files changed, 19 insertions, 12 deletions
diff --git a/drivers/clk/qcom/gcc-sdx65.c b/drivers/clk/qcom/gcc-sdx65.c index 8cae11a0b2c0..b1ab265ba2c1 100644 --- a/drivers/clk/qcom/gcc-sdx65.c +++ b/drivers/clk/qcom/gcc-sdx65.c @@ -1551,7 +1551,25 @@ static const struct regmap_config gcc_sdx65_regmap_config = { .fast_io = true, }; +static const u32 gcc_sdx65_critical_cbcrs[] = { + 0x6d008, /* GCC_SYS_NOC_CPUSS_AHB_CLK */ +}; + +static void gcc_sdx65_regs_configure(struct device *dev, struct regmap *regmap) +{ + /* Keep some clocks always-on */ + regmap_update_bits(regmap, 0x6d008, BIT(21), BIT(21)); /* GCC_CPUSS_AHB_CLK */ + regmap_update_bits(regmap, 0x6d008, BIT(22), BIT(22)); /* GCC_CPUSS_GNOC_CLK */ +} + +static const struct qcom_cc_driver_data gcc_sdx65_driver_data = { + .clk_cbcrs = gcc_sdx65_critical_cbcrs, + .num_clk_cbcrs = ARRAY_SIZE(gcc_sdx65_critical_cbcrs), + .clk_regs_configure = gcc_sdx65_regs_configure, +}; + static const struct qcom_cc_desc gcc_sdx65_desc = { + .driver_data = &gcc_sdx65_driver_data, .config = &gcc_sdx65_regmap_config, .clks = gcc_sdx65_clocks, .num_clks = ARRAY_SIZE(gcc_sdx65_clocks), @@ -1569,18 +1587,7 @@ MODULE_DEVICE_TABLE(of, gcc_sdx65_match_table); static int gcc_sdx65_probe(struct platform_device *pdev) { - struct regmap *regmap; - - regmap = qcom_cc_map(pdev, &gcc_sdx65_desc); - if (IS_ERR(regmap)) - return PTR_ERR(regmap); - - /* Keep some clocks always-on */ - qcom_branch_set_clk_en(regmap, 0x6d008); /* GCC_SYS_NOC_CPUSS_AHB_CLK */ - regmap_update_bits(regmap, 0x6d008, BIT(21), BIT(21)); /* GCC_CPUSS_AHB_CLK */ - regmap_update_bits(regmap, 0x6d008, BIT(22), BIT(22)); /* GCC_CPUSS_GNOC_CLK */ - - return qcom_cc_really_probe(&pdev->dev, &gcc_sdx65_desc, regmap); + return qcom_cc_probe(pdev, &gcc_sdx65_desc); } static struct platform_driver gcc_sdx65_driver = { |