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authorFrank Li <Frank.Li@nxp.com>2026-09-28 15:47:55 -0400
committerFrank Li <Frank.Li@nxp.com>2026-09-28 15:47:55 -0400
commit5d034f17b24642b2a764c0e3a68b4c6937c9ba75 (patch)
tree9f6026a5cff8145b388e129cb58643aaee16bc44
parentbf184a29ad1b33bd8922029eb0ca3f2866007258 (diff)
parent8c40f32361d566c0882e9d92abab36256b268291 (diff)
downloadlinux-next-5d034f17b24642b2a764c0e3a68b4c6937c9ba75.tar.gz
linux-next-5d034f17b24642b2a764c0e3a68b4c6937c9ba75.zip
Merge branch 'imx/dt64' into for-next
Diffstat
-rw-r--r--Documentation/devicetree/bindings/arm/fsl.yaml30
-rw-r--r--arch/arm64/boot/dts/freescale/Makefile8
-rw-r--r--arch/arm64/boot/dts/freescale/imx8dxl-evk.dts14
-rw-r--r--arch/arm64/boot/dts/freescale/imx8dxl-sr-som.dtsi14
-rw-r--r--arch/arm64/boot/dts/freescale/imx8mm-var-dart.dtsi21
-rw-r--r--arch/arm64/boot/dts/freescale/imx8mn-solidsense-n8-compact.dts2
-rw-r--r--arch/arm64/boot/dts/freescale/imx8qm-mek.dts32
-rw-r--r--arch/arm64/boot/dts/freescale/imx8qxp-mek.dts20
-rw-r--r--arch/arm64/boot/dts/freescale/imx8ulp-evk.dts4
-rw-r--r--arch/arm64/boot/dts/freescale/imx91-lino-verdin-dahlia.dts24
-rw-r--r--arch/arm64/boot/dts/freescale/imx91-lino-verdin-dev.dts24
-rw-r--r--arch/arm64/boot/dts/freescale/imx91-lino.dtsi305
-rw-r--r--arch/arm64/boot/dts/freescale/imx91-toradex-osm-dev.dts22
-rw-r--r--arch/arm64/boot/dts/freescale/imx91-toradex-osm.dtsi303
-rw-r--r--arch/arm64/boot/dts/freescale/imx93-11x11-evk-common.dtsi4
-rw-r--r--arch/arm64/boot/dts/freescale/imx93-11x11-frdm-common.dtsi4
-rw-r--r--arch/arm64/boot/dts/freescale/imx93-14x14-evk.dts4
-rw-r--r--arch/arm64/boot/dts/freescale/imx93-9x9-qsb.dts4
-rw-r--r--arch/arm64/boot/dts/freescale/imx93-imx91-lino-common.dtsi536
-rw-r--r--arch/arm64/boot/dts/freescale/imx93-imx91-lino-verdin-common.dtsi175
-rw-r--r--arch/arm64/boot/dts/freescale/imx93-imx91-lino-verdin-dahlia-common.dtsi198
-rw-r--r--arch/arm64/boot/dts/freescale/imx93-imx91-lino-verdin-dev-common.dtsi216
-rw-r--r--arch/arm64/boot/dts/freescale/imx93-imx91-toradex-osm-common.dtsi526
-rw-r--r--arch/arm64/boot/dts/freescale/imx93-imx91-toradex-osm-dev-common.dtsi324
-rw-r--r--arch/arm64/boot/dts/freescale/imx93-lino-verdin-dahlia.dts24
-rw-r--r--arch/arm64/boot/dts/freescale/imx93-lino-verdin-dev.dts24
-rw-r--r--arch/arm64/boot/dts/freescale/imx93-lino.dtsi359
-rw-r--r--arch/arm64/boot/dts/freescale/imx93-toradex-osm-dev.dts22
-rw-r--r--arch/arm64/boot/dts/freescale/imx93-toradex-osm.dtsi357
-rw-r--r--arch/arm64/boot/dts/freescale/imx95-15x15-frdm.dts12
30 files changed, 3551 insertions, 61 deletions
diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml
index adf209b3b7cf..e563d96e4ff7 100644
--- a/Documentation/devicetree/bindings/arm/fsl.yaml
+++ b/Documentation/devicetree/bindings/arm/fsl.yaml
@@ -1528,6 +1528,21 @@ properties:
- fsl,imx91-11x11-frdm-s # FRDM i.MX91S Development Board
- const: fsl,imx91
+ - description: i.MX91 boards with Toradex Lino Modules and Verdin Adapter
+ items:
+ - enum:
+ - toradex,lino-imx91-verdin-dahlia # Lino iMX91 Module on Verdin Dahlia Board
+ - toradex,lino-imx91-verdin-dev # Lino iMX91 Module on Verdin Dev Board
+ - const: toradex,lino-imx91-verdin # Lino iMX91 Module on Verdin Adapter
+ - const: toradex,lino-imx91
+ - const: fsl,imx91
+
+ - description: i.MX91 boards with Toradex OSM Modules
+ items:
+ - const: toradex,osm-imx91-dev # OSM iMX91 Module on OSM Dev Board
+ - const: toradex,osm-imx91
+ - const: fsl,imx91
+
- description: i.MX93 based Boards
items:
- enum:
@@ -1539,6 +1554,21 @@ properties:
- fsl,imx93-wireless-frdm # i.MX93 and IW610G WLCSP (Wi-Fi + BLE + 802.15.4) SiP FRDM Board
- const: fsl,imx93
+ - description: i.MX93 boards with Toradex Lino Modules and Verdin Adapter
+ items:
+ - enum:
+ - toradex,lino-imx93-verdin-dahlia # Lino iMX93 Module on Verdin Dahlia Board
+ - toradex,lino-imx93-verdin-dev # Lino iMX93 Module on Verdin Dev Board
+ - const: toradex,lino-imx93-verdin # Lino iMX93 Module on Verdin Adapter
+ - const: toradex,lino-imx93
+ - const: fsl,imx93
+
+ - description: i.MX93 boards with Toradex OSM Modules
+ items:
+ - const: toradex,osm-imx93-dev # OSM iMX93 Module on OSM Dev Board
+ - const: toradex,osm-imx93
+ - const: fsl,imx93
+
- description: i.MX94 based Boards
items:
- enum:
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index 9971b34f7301..a09672b49709 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -851,6 +851,8 @@ dtb-$(CONFIG_ARCH_MXC) += imx91-11x11-frdm.dtb
dtb-$(CONFIG_ARCH_MXC) += imx91-11x11-frdm-s.dtb
imx91-11x11-evk-mqs-dtbs += imx91-11x11-evk.dtb imx9-mqs.dtbo
dtb-$(CONFIG_ARCH_MXC) += imx91-11x11-evk-mqs.dtb
+dtb-$(CONFIG_ARCH_MXC) += imx91-lino-verdin-dahlia.dtb
+dtb-$(CONFIG_ARCH_MXC) += imx91-lino-verdin-dev.dtb
dtb-$(CONFIG_ARCH_MXC) += imx91-phyboard-segin.dtb
imx91-9x9-qsb-can1-dtbs += imx91-9x9-qsb.dtb imx91-9x9-qsb-can1.dtbo
@@ -858,6 +860,8 @@ imx91-phyboard-segin-peb-av-18-dtbs += imx91-phyboard-segin.dtb imx91-phyboard-s
dtb-$(CONFIG_ARCH_MXC) += imx91-9x9-qsb-can1.dtb
dtb-$(CONFIG_ARCH_MXC) += imx91-phyboard-segin-peb-av-18.dtb
+dtb-$(CONFIG_ARCH_MXC) += imx91-toradex-osm-dev.dtb
+
dtb-$(CONFIG_ARCH_MXC) += imx91-tqma9131-mba91xxca.dtb
dtb-$(CONFIG_ARCH_MXC) += imx91-tqma9131-mba93xxca.dtb
@@ -895,6 +899,8 @@ dtb-$(CONFIG_ARCH_MXC) += imx93-14x14-evk.dtb
imx93-14x14-evk-mqs-dtbs += imx93-14x14-evk.dtb imx9-mqs.dtbo
dtb-$(CONFIG_ARCH_MXC) += imx93-14x14-evk-mqs.dtb
dtb-$(CONFIG_ARCH_MXC) += imx93-kontron-bl-osm-s.dtb
+dtb-$(CONFIG_ARCH_MXC) += imx93-lino-verdin-dahlia.dtb
+dtb-$(CONFIG_ARCH_MXC) += imx93-lino-verdin-dev.dtb
dtb-$(CONFIG_ARCH_MXC) += imx93-phyboard-nash.dtb
dtb-$(CONFIG_ARCH_MXC) += imx93-phyboard-segin.dtb
@@ -915,6 +921,8 @@ dtb-$(CONFIG_ARCH_MXC) += imx93-phyboard-segin-peb-eval-01.dtb
dtb-$(CONFIG_ARCH_MXC) += imx93-phyboard-segin-peb-wlbt-05.dtb
dtb-$(CONFIG_ARCH_MXC) += imx93-phycore-rpmsg.dtb
+dtb-$(CONFIG_ARCH_MXC) += imx93-toradex-osm-dev.dtb
+
dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba91xxca.dtb
dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba93xxca.dtb
dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba93xxla.dtb
diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts b/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts
index 0ede0c7ed422..71eff3efa6d3 100644
--- a/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts
@@ -29,7 +29,7 @@
clocks = <&clk_dummy>;
mbox-names = "tx", "rx", "rxdb";
mboxes = <&lsio_mu5 0 1 &lsio_mu5 1 1 &lsio_mu5 3 1>;
- memory-region = <&vdevbuffer>, <&vdev0vring0>, <&vdev0vring1>,
+ memory-region = <&vdev0buffer>, <&vdev0vring0>, <&vdev0vring1>,
<&vdev1vring0>, <&vdev1vring1>, <&rsc_table>;
power-domains = <&pd IMX_SC_R_M4_0_PID0>, <&pd IMX_SC_R_M4_0_MU_1A>;
fsl,resource-id = <IMX_SC_R_M4_0_PID0>;
@@ -65,32 +65,32 @@
linux,cma-default;
};
- vdev0vring0: memory0@90000000 {
+ vdev0vring0: vdev0vring0@90000000 {
reg = <0 0x90000000 0 0x8000>;
no-map;
};
- vdev0vring1: memory@90008000 {
+ vdev0vring1: vdev0vring1@90008000 {
reg = <0 0x90008000 0 0x8000>;
no-map;
};
- vdev1vring0: memory@90010000 {
+ vdev1vring0: vdev1vring0@90010000 {
reg = <0 0x90010000 0 0x8000>;
no-map;
};
- vdev1vring1: memory@90018000 {
+ vdev1vring1: vdev1vring1@90018000 {
reg = <0 0x90018000 0 0x8000>;
no-map;
};
- rsc_table: memory-rsc-table@900ff000 {
+ rsc_table: rsc-table@900ff000 {
reg = <0 0x900ff000 0 0x1000>;
no-map;
};
- vdevbuffer: memory-vdevbuffer@90400000 {
+ vdev0buffer: vdev0buffer@90400000 {
compatible = "shared-dma-pool";
reg = <0 0x90400000 0 0x100000>;
no-map;
diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-sr-som.dtsi b/arch/arm64/boot/dts/freescale/imx8dxl-sr-som.dtsi
index 93a0eb4d7f77..83d22ae373c3 100644
--- a/arch/arm64/boot/dts/freescale/imx8dxl-sr-som.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8dxl-sr-som.dtsi
@@ -26,7 +26,7 @@
clocks = <&clk_dummy>;
mboxes = <&lsio_mu5 0 1 &lsio_mu5 1 1 &lsio_mu5 3 1>;
mbox-names = "tx", "rx", "rxdb";
- memory-region = <&vdevbuffer>, <&vdev0vring0>, <&vdev0vring1>,
+ memory-region = <&vdev0buffer>, <&vdev0vring0>, <&vdev0vring1>,
<&vdev1vring0>, <&vdev1vring1>, <&rsc_table>;
power-domains = <&pd IMX_SC_R_M4_0_PID0>, <&pd IMX_SC_R_M4_0_MU_1A>;
fsl,entry-address = <0x34fe0000>;
@@ -103,32 +103,32 @@
linux,cma-default;
};
- vdev0vring0: memory0@90000000 {
+ vdev0vring0: vdev0vring0@90000000 {
reg = <0 0x90000000 0 0x8000>;
no-map;
};
- vdev0vring1: memory@90008000 {
+ vdev0vring1: vdev0vring1@90008000 {
reg = <0 0x90008000 0 0x8000>;
no-map;
};
- vdev1vring0: memory@90010000 {
+ vdev1vring0: vdev1vring0@90010000 {
reg = <0 0x90010000 0 0x8000>;
no-map;
};
- vdev1vring1: memory@90018000 {
+ vdev1vring1: vdev1vring1@90018000 {
reg = <0 0x90018000 0 0x8000>;
no-map;
};
- rsc_table: memory-rsc-table@900ff000 {
+ rsc_table: rsc-table@900ff000 {
reg = <0 0x900ff000 0 0x1000>;
no-map;
};
- vdevbuffer: memory-vdevbuffer@90400000 {
+ vdev0buffer: vdev0buffer@90400000 {
compatible = "shared-dma-pool";
reg = <0 0x90400000 0 0x100000>;
no-map;
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-var-dart.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-var-dart.dtsi
index 2324063f8fd9..c5f0e22f549b 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-var-dart.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-var-dart.dtsi
@@ -123,7 +123,7 @@
reg = <0>;
reset-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
reset-assert-us = <10000>;
- reset-deassert-us = <100000>;
+ reset-deassert-us = <200000>;
vddio-supply = <&reg_phy_vddio>;
};
};
@@ -138,6 +138,16 @@
sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
status = "okay";
+ st33ktpm2xi2c_som: tpm@2e {
+ compatible = "st,st33ktpm2xi2c", "tcg,tpm-tis-i2c";
+ reg = <0x2e>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_tpm_reset>;
+ label = "tpm";
+ /* active-low TPM reset line. */
+ reset-gpios = <&gpio4 31 GPIO_ACTIVE_LOW>;
+ };
+
pmic@4b {
compatible = "rohm,bd71847";
reg = <0x4b>;
@@ -305,6 +315,7 @@
assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
assigned-clock-rates = <1536000>;
fsl,sai-mclk-direction-output;
+ fsl,sai-synchronous-rx;
status = "okay";
};
@@ -446,13 +457,17 @@
MX8MM_IOMUXC_SAI3_RXFS_SAI3_RX_SYNC 0xd6
MX8MM_IOMUXC_SAI3_RXC_SAI3_RX_BCLK 0xd6
MX8MM_IOMUXC_SAI3_RXD_SAI3_RX_DATA0 0xd6
- MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6
- MX8MM_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6
MX8MM_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6
MX8MM_IOMUXC_SAI3_MCLK_SAI3_MCLK 0xd6
>;
};
+ pinctrl_tpm_reset: tpm-resetgrp {
+ fsl,pins = <
+ MX8MM_IOMUXC_SAI3_TXFS_GPIO4_IO31 0x19
+ >;
+ };
+
pinctrl_uart4: uart4grp {
fsl,pins = <
MX8MM_IOMUXC_ECSPI2_SCLK_UART4_DCE_RX 0x140
diff --git a/arch/arm64/boot/dts/freescale/imx8mn-solidsense-n8-compact.dts b/arch/arm64/boot/dts/freescale/imx8mn-solidsense-n8-compact.dts
index c8c6760524db..9b8b971c1a5c 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn-solidsense-n8-compact.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mn-solidsense-n8-compact.dts
@@ -226,8 +226,6 @@
reset-assert-us = <10>;
reset-deassert-us = <5000>;
reset-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
- adi,led-polarity = <GPIO_ACTIVE_LOW>;
- adi,link-st-polarity = <GPIO_ACTIVE_LOW>;
status = "disabled";
leds {
diff --git a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
index 9e49ac377162..1afa65bd955e 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
+++ b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
@@ -44,57 +44,57 @@
#size-cells = <2>;
ranges;
- vdev0vring0: memory@90000000 {
+ vdev0vring0: vdev0vring0@90000000 {
reg = <0 0x90000000 0 0x8000>;
no-map;
};
- vdev0vring1: memory@90008000 {
+ vdev0vring1: vdev0vring1@90008000 {
reg = <0 0x90008000 0 0x8000>;
no-map;
};
- vdev1vring0: memory@90010000 {
+ vdev1vring0: vdev1vring0@90010000 {
reg = <0 0x90010000 0 0x8000>;
no-map;
};
- vdev1vring1: memory@90018000 {
+ vdev1vring1: vdev1vring1@90018000 {
reg = <0 0x90018000 0 0x8000>;
no-map;
};
- rsc_table0: memory@900ff000 {
+ rsc_table0: rsc-table@900ff000 {
reg = <0 0x900ff000 0 0x1000>;
no-map;
};
- vdev2vring0: memory@90100000 {
+ vdev2vring0: vdev2vring0@90100000 {
reg = <0 0x90100000 0 0x8000>;
no-map;
};
- vdev2vring1: memory@90108000 {
+ vdev2vring1: vdev2vring1@90108000 {
reg = <0 0x90108000 0 0x8000>;
no-map;
};
- vdev3vring0: memory@90110000 {
+ vdev3vring0: vdev3vring0@90110000 {
reg = <0 0x90110000 0 0x8000>;
no-map;
};
- vdev3vring1: memory@90118000 {
+ vdev3vring1: vdev3vring1@90118000 {
reg = <0 0x90118000 0 0x8000>;
no-map;
};
- rsc_table1: memory@901ff000 {
+ rsc_table1: rsc-table@901ff000 {
reg = <0 0x901ff000 0 0x1000>;
no-map;
};
- vdevbuffer: memory@90400000 {
+ vdev0buffer: vdev0buffer@90400000 {
compatible = "shared-dma-pool";
reg = <0 0x90400000 0 0x100000>;
no-map;
@@ -105,17 +105,17 @@
no-map;
};
- dsp_vdev0vring0: memory@942f0000 {
+ dsp_vdev0vring0: vdev0vring0@942f0000 {
reg = <0 0x942f0000 0 0x8000>;
no-map;
};
- dsp_vdev0vring1: memory@942f8000 {
+ dsp_vdev0vring1: vdev0vring1@942f8000 {
reg = <0 0x942f8000 0 0x8000>;
no-map;
};
- dsp_vdev0buffer: memory@94300000 {
+ dsp_vdev0buffer: vdev0buffer@94300000 {
compatible = "shared-dma-pool";
reg = <0 0x94300000 0 0x100000>;
no-map;
@@ -456,7 +456,7 @@
mboxes = <&lsio_mu5 0 1
&lsio_mu5 1 1
&lsio_mu5 3 1>;
- memory-region = <&vdevbuffer>, <&vdev0vring0>, <&vdev0vring1>,
+ memory-region = <&vdev0buffer>, <&vdev0vring0>, <&vdev0vring1>,
<&vdev1vring0>, <&vdev1vring1>, <&rsc_table0>;
power-domains = <&pd IMX_SC_R_M4_0_PID0>, <&pd IMX_SC_R_M4_0_MU_1A>;
@@ -471,7 +471,7 @@
mboxes = <&lsio_mu6 0 1
&lsio_mu6 1 1
&lsio_mu6 3 1>;
- memory-region = <&vdevbuffer>, <&vdev2vring0>, <&vdev2vring1>,
+ memory-region = <&vdev0buffer>, <&vdev2vring0>, <&vdev2vring1>,
<&vdev3vring0>, <&vdev3vring1>, <&rsc_table1>;
power-domains = <&pd IMX_SC_R_M4_1_PID0>, <&pd IMX_SC_R_M4_1_MU_1A>;
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
index 857a6e512228..eb994f3e2872 100644
--- a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
+++ b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
@@ -27,7 +27,7 @@
mboxes = <&lsio_mu5 0 1
&lsio_mu5 1 1
&lsio_mu5 3 1>;
- memory-region = <&vdevbuffer>, <&vdev0vring0>, <&vdev0vring1>,
+ memory-region = <&vdev0buffer>, <&vdev0vring0>, <&vdev0vring1>,
<&vdev1vring0>, <&vdev1vring1>, <&rsc_table>;
power-domains = <&pd IMX_SC_R_M4_0_PID0>,
<&pd IMX_SC_R_M4_0_MU_1A>;
@@ -242,48 +242,48 @@
#size-cells = <2>;
ranges;
- vdev0vring0: memory@90000000 {
+ vdev0vring0: vdev0vring0@90000000 {
reg = <0 0x90000000 0 0x8000>;
no-map;
};
- vdev0vring1: memory@90008000 {
+ vdev0vring1: vdev0vring1@90008000 {
reg = <0 0x90008000 0 0x8000>;
no-map;
};
- vdev1vring0: memory@90010000 {
+ vdev1vring0: vdev1vring0@90010000 {
reg = <0 0x90010000 0 0x8000>;
no-map;
};
- vdev1vring1: memory@90018000 {
+ vdev1vring1: vdev1vring1@90018000 {
reg = <0 0x90018000 0 0x8000>;
no-map;
};
- rsc_table: memory@900ff000 {
+ rsc_table: rsc-table@900ff000 {
reg = <0 0x900ff000 0 0x1000>;
no-map;
};
- vdevbuffer: memory@90400000 {
+ vdev0buffer: vdev0buffer@90400000 {
compatible = "shared-dma-pool";
reg = <0 0x90400000 0 0x100000>;
no-map;
};
- dsp_vdev0vring0: memory@942f0000 {
+ dsp_vdev0vring0: vdev0vring0@942f0000 {
reg = <0 0x942f0000 0 0x8000>;
no-map;
};
- dsp_vdev0vring1: memory@942f8000 {
+ dsp_vdev0vring1: vdev0vring1@942f8000 {
reg = <0 0x942f8000 0 0x8000>;
no-map;
};
- dsp_vdev0buffer: memory@94300000 {
+ dsp_vdev0buffer: vdev0buffer@94300000 {
compatible = "shared-dma-pool";
reg = <0 0x94300000 0 0x100000>;
no-map;
diff --git a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
index 5fe58a025cfd..fdf3aab2224b 100644
--- a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
@@ -81,7 +81,7 @@
no-map;
};
- vdevbuffer: vdevbuffer@a8400000 {
+ vdev0buffer: vdev0buffer@a8400000 {
compatible = "shared-dma-pool";
reg = <0 0xa8400000 0 0x100000>;
no-map;
@@ -140,7 +140,7 @@
mboxes = <&mu 0 1>,
<&mu 1 1>,
<&mu 3 1>;
- memory-region = <&vdevbuffer>, <&vdev0vring0>, <&vdev0vring1>,
+ memory-region = <&vdev0buffer>, <&vdev0vring0>, <&vdev0vring1>,
<&vdev1vring0>, <&vdev1vring1>, <&rsc_table>;
status = "okay";
};
diff --git a/arch/arm64/boot/dts/freescale/imx91-lino-verdin-dahlia.dts b/arch/arm64/boot/dts/freescale/imx91-lino-verdin-dahlia.dts
new file mode 100644
index 000000000000..eb3a8cdcd08f
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx91-lino-verdin-dahlia.dts
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: GPL-2.0-only OR MIT
+/*
+ * Copyright (c) Toradex
+ *
+ * Lino iMX91 SoM on Lino-Verdin Adapter / Dahlia carrier board
+ *
+ * https://www.toradex.com/computer-on-modules/lino-arm-family/nxp-imx91
+ * https://www.toradex.com/products/carrier-board/dahlia-carrier-board-kit
+ */
+
+/dts-v1/;
+
+#include "imx91.dtsi"
+#include "imx91-lino.dtsi"
+#include "imx93-imx91-lino-verdin-common.dtsi"
+#include "imx93-imx91-lino-verdin-dahlia-common.dtsi"
+
+/ {
+ model = "Toradex Lino iMX91 on Verdin Adapter plus Dahlia Board";
+ compatible = "toradex,lino-imx91-verdin-dahlia",
+ "toradex,lino-imx91-verdin",
+ "toradex,lino-imx91",
+ "fsl,imx91";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx91-lino-verdin-dev.dts b/arch/arm64/boot/dts/freescale/imx91-lino-verdin-dev.dts
new file mode 100644
index 000000000000..a988897f3388
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx91-lino-verdin-dev.dts
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: GPL-2.0-only OR MIT
+/*
+ * Copyright (c) Toradex
+ *
+ * Lino iMX91 SoM on Lino-Verdin Adapter / Development carrier board
+ *
+ * https://www.toradex.com/computer-on-modules/lino-arm-family/nxp-imx91
+ * https://www.toradex.com/products/carrier-board/verdin-development-board-kit
+ */
+
+/dts-v1/;
+
+#include "imx91.dtsi"
+#include "imx91-lino.dtsi"
+#include "imx93-imx91-lino-verdin-common.dtsi"
+#include "imx93-imx91-lino-verdin-dev-common.dtsi"
+
+/ {
+ model = "Toradex Lino iMX91 on Verdin Adapter plus Development Board";
+ compatible = "toradex,lino-imx91-verdin-dev",
+ "toradex,lino-imx91-verdin",
+ "toradex,lino-imx91",
+ "fsl,imx91";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx91-lino.dtsi b/arch/arm64/boot/dts/freescale/imx91-lino.dtsi
new file mode 100644
index 000000000000..99d95694e910
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx91-lino.dtsi
@@ -0,0 +1,305 @@
+// SPDX-License-Identifier: GPL-2.0-only OR MIT
+/*
+ * Copyright (c) Toradex
+ *
+ * Lino iMX91 SoM
+ *
+ * https://www.toradex.com/computer-on-modules/lino-arm-family/nxp-imx91
+ */
+
+#include "imx91-pinfunc.h"
+#include "imx93-imx91-lino-common.dtsi"
+
+&iomuxc {
+ /* Lino CAN_1 */
+ pinctrl_can1: can1grp {
+ fsl,pins = <MX91_PAD_PDM_BIT_STREAM0__CAN1_RX 0x139e>, /* Lino P12 */
+ <MX91_PAD_PDM_CLK__CAN1_TX 0x139e>; /* Lino P10 */
+ };
+
+ /* Lino CAN_2 */
+ pinctrl_can2: can2grp {
+ fsl,pins = <MX91_PAD_GPIO_IO25__CAN2_TX 0x139e>, /* Lino S28 */
+ <MX91_PAD_GPIO_IO27__CAN2_RX 0x139e>; /* Lino S30 */
+ };
+
+ /* Lino ETH_1 RGMII */
+ pinctrl_eth1: eqosgrp {
+ fsl,pins = <MX91_PAD_ENET1_RD0__ENET_QOS_RGMII_RD0 0x1fe>, /* Lino P77 */
+ <MX91_PAD_ENET1_RD1__ENET_QOS_RGMII_RD1 0x1fe>, /* Lino P79 */
+ <MX91_PAD_ENET1_RD2__ENET_QOS_RGMII_RD2 0x1fe>, /* Lino P81 */
+ <MX91_PAD_ENET1_RD3__ENET_QOS_RGMII_RD3 0x1fe>, /* Lino P83 */
+ <MX91_PAD_ENET1_RXC__ENET_QOS_RGMII_RXC 0x1fe>, /* Lino P73 */
+ <MX91_PAD_ENET1_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x1fe>, /* Lino P75 */
+ <MX91_PAD_ENET1_TD0__ENET_QOS_RGMII_TD0 0x1fe>, /* Lino P97 */
+ <MX91_PAD_ENET1_TD1__ENET1_RGMII_TD1 0x1fe>, /* Lino P95 */
+ <MX91_PAD_ENET1_TD2__ENET_QOS_RGMII_TD2 0x1fe>, /* Lino P93 */
+ <MX91_PAD_ENET1_TD3__ENET_QOS_RGMII_TD3 0x1fe>, /* Lino P91 */
+ <MX91_PAD_ENET1_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x1fe>, /* Lino P89 */
+ <MX91_PAD_ENET1_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x1fe>; /* Lino P85 */
+ };
+
+ /* Lino ETH MDIO */
+ pinctrl_mdio: eqosmdiogrp {
+ fsl,pins = <MX91_PAD_ENET1_MDC__ENET1_MDC 0x1fe>, /* Lino P69 */
+ <MX91_PAD_ENET1_MDIO__ENET_QOS_MDIO 0x1fe>; /* Lino P67 */
+ };
+
+ /* Lino ETH_2 RGMII */
+ pinctrl_eth2: fecgrp {
+ fsl,pins = <MX91_PAD_ENET2_RD0__ENET2_RGMII_RD0 0x1fe>, /* Lino S77 */
+ <MX91_PAD_ENET2_RD1__ENET2_RGMII_RD1 0x1fe>, /* Lino S79 */
+ <MX91_PAD_ENET2_RD2__ENET2_RGMII_RD2 0x1fe>, /* Lino S81 */
+ <MX91_PAD_ENET2_RD3__ENET2_RGMII_RD3 0x1fe>, /* Lino S83 */
+ <MX91_PAD_ENET2_RXC__ENET2_RGMII_RXC 0x1fe>, /* Lino S71 */
+ <MX91_PAD_ENET2_RX_CTL__ENET2_RGMII_RX_CTL 0x1fe>, /* Lino S73 */
+ <MX91_PAD_ENET2_TD0__ENET2_RGMII_TD0 0x1fe>, /* Lino S99 */
+ <MX91_PAD_ENET2_TD1__ENET2_RGMII_TD1 0x1fe>, /* Lino S97 */
+ <MX91_PAD_ENET2_TD2__ENET2_RGMII_TD2 0x1fe>, /* Lino S93 */
+ <MX91_PAD_ENET2_TD3__ENET2_RGMII_TD3 0x1fe>, /* Lino S91 */
+ <MX91_PAD_ENET2_TXC__ENET2_RGMII_TXC 0x1fe>, /* Lino S87 */
+ <MX91_PAD_ENET2_TX_CTL__ENET2_RGMII_TX_CTL 0x1fe>; /* Lino S89 */
+ };
+
+ /* Lino GPIO_11 */
+ pinctrl_gpio_11: gpio1io10grp {
+ fsl,pins = <MX91_PAD_PDM_BIT_STREAM1__GPIO1_IO10 0x139e>; /* Lino P65 */
+ };
+
+ /* Lino SPI_2_CS as GPIO */
+ pinctrl_spi2_cs0_gpio: gpio1io11grp {
+ fsl,pins = <MX91_PAD_SAI1_TXFS__GPIO1_IO11 0x139e>; /* Lino S18 */
+ };
+
+ /* Lino GPIO_1 */
+ pinctrl_gpio1: gpio2io0grp {
+ fsl,pins = <MX91_PAD_GPIO_IO00__GPIO2_IO0 0x139e>; /* Lino P30 */
+ };
+
+ /* Lino GPIO_2 */
+ pinctrl_gpio2: gpio2io1grp {
+ fsl,pins = <MX91_PAD_GPIO_IO01__GPIO2_IO1 0x139e>; /* Lino P32 */
+ };
+
+ /* Lino SPI_1_CS as GPIO */
+ pinctrl_spi1_cs0_gpio: gpio2io12grp {
+ fsl,pins = <MX91_PAD_GPIO_IO12__GPIO2_IO12 0x139e>; /* Lino P58 */
+ };
+
+ /* Lino GPIO_3 */
+ pinctrl_gpio3: gpio2io17grp {
+ fsl,pins = <MX91_PAD_GPIO_IO17__GPIO2_IO17 0x139e>; /* Lino P34 */
+ };
+
+ /* Lino GPIO_4 */
+ pinctrl_gpio4: gpio2io22grp {
+ fsl,pins = <MX91_PAD_GPIO_IO22__GPIO2_IO22 0x139e>; /* Lino P36 */
+ };
+
+ /* Lino PWM_3 as GPIO */
+ pinctrl_pwm3_gpio: gpio2io23grp {
+ fsl,pins = <MX91_PAD_GPIO_IO23__GPIO2_IO23 0x139e>; /* Lino P5 */
+ };
+
+ /* Lino GPIO_5 */
+ pinctrl_gpio5: gpio2io24grp {
+ fsl,pins = <MX91_PAD_GPIO_IO24__GPIO2_IO24 0x139e>; /* Lino P38 */
+ };
+
+ /* Lino GPIO_6 */
+ pinctrl_gpio6: gpio3io26grp {
+ fsl,pins = <MX91_PAD_CCM_CLKO1__GPIO3_IO26 0x139e>; /* Lino P40 */
+ };
+
+ /* Lino GPIO_7 */
+ pinctrl_gpio7: gpio3io27grp {
+ fsl,pins = <MX91_PAD_CCM_CLKO2__GPIO3_IO27 0x139e>; /* Lino P42 */
+ };
+
+ /* Lino GPIO_9 */
+ pinctrl_gpio9: gpio4io14grp {
+ fsl,pins = <MX91_PAD_ENET2_MDC__GPIO4_IO14 0x139e>; /* Lino P46 */
+ };
+
+ /* Lino GPIO_10 */
+ pinctrl_gpio10: gpio4io15grp {
+ fsl,pins = <MX91_PAD_ENET2_MDIO__GPIO4_IO15 0x139e>; /* Lino P48 */
+ };
+
+ /* Lino GPIO_8 */
+ pinctrl_gpio8: gpio4io28grp {
+ fsl,pins = <MX91_PAD_CCM_CLKO3__GPIO4_IO28 0x139e>; /* Lino P44 */
+ };
+
+ /* On-module GPIO_EXP_INT# */
+ pinctrl_gpio_exp_int: gpio4io29grp {
+ fsl,pins = <MX91_PAD_CCM_CLKO4__GPIO4_IO29 0x139e>; /* GPIO_EXP_INT# */
+ };
+
+ /* Lino I2C_1 as GPIO */
+ pinctrl_i2c1_gpio: lpi2c1gpiogrp {
+ fsl,pins = <MX91_PAD_I2C1_SCL__GPIO1_IO0 0x40000b9e>, /* Lino P18 */
+ <MX91_PAD_I2C1_SDA__GPIO1_IO1 0x40000b9e>; /* Lino P16 */
+ };
+
+ /* Lino I2C_1 */
+ pinctrl_i2c1: lpi2c1grp {
+ fsl,pins = <MX91_PAD_I2C1_SCL__LPI2C1_SCL 0x40000b9e>, /* Lino P18 */
+ <MX91_PAD_I2C1_SDA__LPI2C1_SDA 0x40000b9e>; /* Lino P16 */
+ };
+
+ /* On-module PMIC I2C as GPIO */
+ pinctrl_pmic_i2c_gpio: lpi2c2gpiogrp {
+ fsl,pins = <MX91_PAD_I2C2_SCL__GPIO1_IO2 0x40000b9e>, /* PMIC_I2C_SCL */
+ <MX91_PAD_I2C2_SDA__GPIO1_IO3 0x40000b9e>; /* PMIC_I2C_SDA */
+ };
+
+ /* On-module PMIC I2C */
+ pinctrl_pmic_i2c: lpi2c2grp {
+ fsl,pins = <MX91_PAD_I2C2_SCL__LPI2C2_SCL 0x40000b9e>, /* PMIC_I2C_SCL */
+ <MX91_PAD_I2C2_SDA__LPI2C2_SDA 0x40000b9e>; /* PMIC_I2C_SDA */
+ };
+
+ /* Lino I2C_2 as GPIO */
+ pinctrl_i2c2_gpio: lpi2c3gpiogrp {
+ fsl,pins = <MX91_PAD_GPIO_IO28__GPIO2_IO28 0x40000b9e>, /* Lino P20 */
+ <MX91_PAD_GPIO_IO29__GPIO2_IO29 0x40000b9e>; /* Lino P22 */
+ };
+
+ /* Lino I2C_2 */
+ pinctrl_i2c2: lpi2c3grp {
+ fsl,pins = <MX91_PAD_GPIO_IO28__LPI2C3_SDA 0x40000b9e>, /* Lino P20 */
+ <MX91_PAD_GPIO_IO29__LPI2C3_SCL 0x40000b9e>; /* Lino P22 */
+ };
+
+ /* Lino I2C_3 as GPIO */
+ pinctrl_i2c3_gpio: lpi2c4gpiogrp {
+ fsl,pins = <MX91_PAD_GPIO_IO02__GPIO2_IO2 0x40000b9e>, /* Lino P24 */
+ <MX91_PAD_GPIO_IO03__GPIO2_IO3 0x40000b9e>; /* Lino P26 */
+ };
+
+ /* Lino I2C_3 */
+ pinctrl_i2c3: lpi2c4grp {
+ fsl,pins = <MX91_PAD_GPIO_IO02__LPI2C4_SDA 0x40000b9e>, /* Lino P24 */
+ <MX91_PAD_GPIO_IO03__LPI2C4_SCL 0x40000b9e>; /* Lino P26 */
+ };
+
+ /* Lino SPI_2 */
+ pinctrl_spi2: lpspi1grp {
+ fsl,pins = <MX91_PAD_SAI1_TXD0__LPSPI1_SCK 0x139e>, /* Lino S20 */
+ <MX91_PAD_SAI1_RXD0__LPSPI1_SOUT 0x139e>, /* Lino S22 */
+ <MX91_PAD_SAI1_TXC__LPSPI1_SIN 0x139e>; /* Lino S24 */
+ };
+
+ /* Lino SPI_1 */
+ pinctrl_spi1: lpspi8grp {
+ fsl,pins = <MX91_PAD_GPIO_IO13__LPSPI8_SIN 0x139e>, /* Lino P54 */
+ <MX91_PAD_GPIO_IO14__LPSPI8_SOUT 0x139e>, /* Lino P56 */
+ <MX91_PAD_GPIO_IO15__LPSPI8_SCK 0x139e>; /* Lino P52 */
+ };
+
+ /* Lino UART_3 */
+ pinctrl_uart3: lpuart1grp {
+ fsl,pins = <MX91_PAD_UART1_RXD__LPUART1_RX 0x39e>, /* Lino P17 */
+ <MX91_PAD_UART1_TXD__LPUART1_TX 0x39e>; /* Lino P19 */
+ };
+
+ /* Lino UART_4 */
+ pinctrl_uart4: lpuart2grp {
+ fsl,pins = <MX91_PAD_UART2_RXD__LPUART2_RX 0x39e>, /* Lino P23 */
+ <MX91_PAD_UART2_TXD__LPUART2_TX 0x39e>; /* Lino P25 */
+ };
+
+ /* Lino UART_1 */
+ pinctrl_uart1: lpuart6grp {
+ fsl,pins = <MX91_PAD_GPIO_IO04__LPUART6_TX 0x39e>, /* Lino P11 */
+ <MX91_PAD_GPIO_IO05__LPUART6_RX 0x39e>, /* Lino P9 */
+ <MX91_PAD_GPIO_IO06__LPUART6_CTS_B 0x39e>, /* Lino P8 */
+ <MX91_PAD_GPIO_IO07__LPUART6_RTS_B 0x39e>; /* Lino P6 */
+ };
+
+ /* Lino UART_2 */
+ pinctrl_uart2: lpuart7grp {
+ fsl,pins = <MX91_PAD_GPIO_IO08__LPUART7_TX 0x39e>, /* Lino P15 */
+ <MX91_PAD_GPIO_IO09__LPUART7_RX 0x39e>, /* Lino P13 */
+ <MX91_PAD_GPIO_IO10__LPUART7_CTS_B 0x39e>, /* Lino S7 */
+ <MX91_PAD_GPIO_IO11__LPUART7_RTS_B 0x39e>; /* Lino S5 */
+ };
+
+ /* Lino I2S_1 */
+ pinctrl_i2s1: sai3grp {
+ fsl,pins = <MX91_PAD_GPIO_IO16__SAI3_TX_BCLK 0x139e>, /* Lino S94 */
+ <MX91_PAD_GPIO_IO19__SAI3_TX_DATA0 0x139e>, /* Lino S98 */
+ <MX91_PAD_GPIO_IO20__SAI3_RX_DATA0 0x139e>, /* Lino S100 */
+ <MX91_PAD_GPIO_IO26__SAI3_TX_SYNC 0x139e>; /* Lino S96 */
+ };
+
+ /* Lino PWM_1 */
+ pinctrl_pwm1: tpm4ch1grp {
+ fsl,pins = <MX91_PAD_GPIO_IO21__TPM4_CH1 0x139e>; /* Lino P1 */
+ };
+
+ /* Lino PWM_2 */
+ pinctrl_pwm2: tpm5ch2grp {
+ fsl,pins = <MX91_PAD_GPIO_IO18__TPM5_CH2 0x139e>; /* Lino P3 */
+ };
+
+ /* Lino PWM_3 */
+ pinctrl_pwm3: tpm6ch1grp {
+ fsl,pins = <MX91_PAD_GPIO_IO23__TPM6_CH1 0x139e>; /* Lino P5 */
+ };
+
+ /* On-module eMMC */
+ pinctrl_emmc: usdhc1grp {
+ fsl,pins = <MX91_PAD_SD1_CLK__USDHC1_CLK 0x5fe>, /* eMMC_CLK */
+ <MX91_PAD_SD1_CMD__USDHC1_CMD 0x400013fe>, /* eMMC_CMD */
+ <MX91_PAD_SD1_DATA0__USDHC1_DATA0 0x400013fe>, /* eMMC_DATA0 */
+ <MX91_PAD_SD1_DATA1__USDHC1_DATA1 0x400013fe>, /* eMMC_DATA1 */
+ <MX91_PAD_SD1_DATA2__USDHC1_DATA2 0x400013fe>, /* eMMC_DATA2 */
+ <MX91_PAD_SD1_DATA3__USDHC1_DATA3 0x400013fe>, /* eMMC_DATA3 */
+ <MX91_PAD_SD1_DATA4__USDHC1_DATA4 0x400013fe>, /* eMMC_DATA4 */
+ <MX91_PAD_SD1_DATA5__USDHC1_DATA5 0x400013fe>, /* eMMC_DATA5 */
+ <MX91_PAD_SD1_DATA6__USDHC1_DATA6 0x400013fe>, /* eMMC_DATA6 */
+ <MX91_PAD_SD1_DATA7__USDHC1_DATA7 0x400013fe>, /* eMMC_DATA7 */
+ <MX91_PAD_SD1_STROBE__USDHC1_STROBE 0x1580>; /* eMMC_STROBE */
+ };
+
+ /* Lino SD_1_CD# */
+ pinctrl_sd1_cd: usdhc2cdgrp {
+ fsl,pins = <MX91_PAD_SD2_CD_B__GPIO3_IO0 0x139e>; /* Lino P78 */
+ };
+
+ /* Lino SD_1 */
+ pinctrl_sd1: usdhc2grp {
+ fsl,pins = <MX91_PAD_SD2_CLK__USDHC2_CLK 0x5fe>, /* Lino P68 */
+ <MX91_PAD_SD2_CMD__USDHC2_CMD 0x400013fe>, /* Lino P66 */
+ <MX91_PAD_SD2_DATA0__USDHC2_DATA0 0x400013fe>, /* Lino P74 */
+ <MX91_PAD_SD2_DATA1__USDHC2_DATA1 0x400013fe>, /* Lino P76 */
+ <MX91_PAD_SD2_DATA2__USDHC2_DATA2 0x400013fe>, /* Lino P60 */
+ <MX91_PAD_SD2_DATA3__USDHC2_DATA3 0x400013fe>; /* Lino P64 */
+ };
+
+ /* Lino SD_1_PWR_EN */
+ pinctrl_sd1_pwr_en: usdhc2pwrgrp {
+ fsl,pins = <MX91_PAD_SD2_RESET_B__GPIO3_IO7 0x139e>; /* Lino P72 */
+ };
+
+ /* On-module PMIC_SD_2_VSEL */
+ pinctrl_sd1_vsel: usdhc2vselgrp {
+ fsl,pins = <MX91_PAD_SD2_VSELECT__GPIO3_IO19 0x51e>; /* PMIC_SD_2_VSEL */
+ };
+
+ /* Lino SD_2 */
+ pinctrl_sd2: usdhc3grp {
+ fsl,pins = <MX91_PAD_SD3_CLK__USDHC3_CLK 0x5fe>, /* Lino S10 */
+ <MX91_PAD_SD3_CMD__USDHC3_CMD 0x400013fe>, /* Lino S8 */
+ <MX91_PAD_SD3_DATA0__USDHC3_DATA0 0x400013fe>, /* Lino S12 */
+ <MX91_PAD_SD3_DATA1__USDHC3_DATA1 0x400013fe>, /* Lino S16 */
+ <MX91_PAD_SD3_DATA2__USDHC3_DATA2 0x400013fe>, /* Lino S2 */
+ <MX91_PAD_SD3_DATA3__USDHC3_DATA3 0x400013fe>; /* Lino S4 */
+ };
+
+ pinctrl_wdog: wdoggrp {
+ fsl,pins = <MX91_PAD_WDOG_ANY__WDOG1_WDOG_ANY 0x31e>; /* PMIC_WDOG_B */
+ };
+};
diff --git a/arch/arm64/boot/dts/freescale/imx91-toradex-osm-dev.dts b/arch/arm64/boot/dts/freescale/imx91-toradex-osm-dev.dts
new file mode 100644
index 000000000000..ec5e701fb275
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx91-toradex-osm-dev.dts
@@ -0,0 +1,22 @@
+// SPDX-License-Identifier: GPL-2.0-only OR MIT
+/*
+ * Copyright (c) Toradex
+ *
+ * Toradex OSM iMX91 SoM on OSM Development carrier board
+ *
+ * https://www.toradex.com/computer-on-modules/osm-arm-family/nxp-imx91
+ * https://www.toradex.com/products/carrier-board/osm-development-board
+ */
+
+/dts-v1/;
+
+#include "imx91.dtsi"
+#include "imx91-toradex-osm.dtsi"
+#include "imx93-imx91-toradex-osm-dev-common.dtsi"
+
+/ {
+ model = "Toradex OSM iMX91 on OSM Development Board";
+ compatible = "toradex,osm-imx91-dev",
+ "toradex,osm-imx91",
+ "fsl,imx91";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx91-toradex-osm.dtsi b/arch/arm64/boot/dts/freescale/imx91-toradex-osm.dtsi
new file mode 100644
index 000000000000..9d990937fd8d
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx91-toradex-osm.dtsi
@@ -0,0 +1,303 @@
+// SPDX-License-Identifier: GPL-2.0-only OR MIT
+/*
+ * Copyright (c) Toradex
+ *
+ * Toradex OSM iMX91 SoM
+ *
+ * https://www.toradex.com/computer-on-modules/osm-arm-family/nxp-imx91
+ */
+
+#include "imx91-pinfunc.h"
+#include "imx93-imx91-toradex-osm-common.dtsi"
+
+&iomuxc {
+ /* OSM CAN_A */
+ pinctrl_can_a: can1grp {
+ fsl,pins = <MX91_PAD_PDM_BIT_STREAM0__CAN1_RX 0x139e>, /* OSM AB17 */
+ <MX91_PAD_PDM_CLK__CAN1_TX 0x139e>; /* OSM AC17 */
+ };
+
+ /* OSM CAN_B */
+ pinctrl_can_b: can2grp {
+ fsl,pins = <MX91_PAD_GPIO_IO25__CAN2_TX 0x139e>, /* OSM AC19 */
+ <MX91_PAD_GPIO_IO27__CAN2_RX 0x139e>; /* OSM AB19 */
+ };
+
+ /* OSM CAM_MCK */
+ pinctrl_cam_mck: ccmclk1grp {
+ fsl,pins = <MX91_PAD_CCM_CLKO1__CCMSRCGPCMIX_CLKO1 0x51e>; /* OSM C2 */
+ };
+
+ /* OSM ETH_A RGMII */
+ pinctrl_eth_a: eqosgrp {
+ fsl,pins = <MX91_PAD_ENET1_RD0__ENET_QOS_RGMII_RD0 0x1fe>, /* OSM K15 */
+ <MX91_PAD_ENET1_RD1__ENET_QOS_RGMII_RD1 0x1fe>, /* OSM L15 */
+ <MX91_PAD_ENET1_RD2__ENET_QOS_RGMII_RD2 0x1fe>, /* OSM N15 */
+ <MX91_PAD_ENET1_RD3__ENET_QOS_RGMII_RD3 0x1fe>, /* OSM P15 */
+ <MX91_PAD_ENET1_RXC__ENET_QOS_RGMII_RXC 0x1fe>, /* OSM R15 */
+ <MX91_PAD_ENET1_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x1fe>, /* OSM M15 */
+ <MX91_PAD_ENET1_TD0__ENET_QOS_RGMII_TD0 0x1fe>, /* OSM H15 */
+ <MX91_PAD_ENET1_TD1__ENET1_RGMII_TD1 0x1fe>, /* OSM G15 */
+ <MX91_PAD_ENET1_TD2__ENET_QOS_RGMII_TD2 0x1fe>, /* OSM H16 */
+ <MX91_PAD_ENET1_TD3__ENET_QOS_RGMII_TD3 0x1fe>, /* OSM G16 */
+ <MX91_PAD_ENET1_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x1fe>, /* OSM J15 */
+ <MX91_PAD_ENET1_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x1fe>; /* OSM K16 */
+ };
+
+ /* OSM ETH_MDIO */
+ pinctrl_mdio: eqosmdiogrp {
+ fsl,pins = <MX91_PAD_ENET1_MDC__ENET1_MDC 0x1fe>, /* OSM T16 */
+ <MX91_PAD_ENET1_MDIO__ENET_QOS_MDIO 0x1fe>; /* OSM T15 */
+ };
+
+ /* OSM ETH_B RGMII */
+ pinctrl_eth_b: fecgrp {
+ fsl,pins = <MX91_PAD_ENET2_RD0__ENET2_RGMII_RD0 0x1fe>, /* OSM J1 */
+ <MX91_PAD_ENET2_RD1__ENET2_RGMII_RD1 0x1fe>, /* OSM K1 */
+ <MX91_PAD_ENET2_RD2__ENET2_RGMII_RD2 0x1fe>, /* OSM M1 */
+ <MX91_PAD_ENET2_RD3__ENET2_RGMII_RD3 0x1fe>, /* OSM N1 */
+ <MX91_PAD_ENET2_RXC__ENET2_RGMII_RXC 0x1fe>, /* OSM P1 */
+ <MX91_PAD_ENET2_RX_CTL__ENET2_RGMII_RX_CTL 0x1fe>, /* OSM L1 */
+ <MX91_PAD_ENET2_TD0__ENET2_RGMII_TD0 0x1fe>, /* OSM G1 */
+ <MX91_PAD_ENET2_TD1__ENET2_RGMII_TD1 0x1fe>, /* OSM F1 */
+ <MX91_PAD_ENET2_TD2__ENET2_RGMII_TD2 0x1fe>, /* OSM G2 */
+ <MX91_PAD_ENET2_TD3__ENET2_RGMII_TD3 0x1fe>, /* OSM F2 */
+ <MX91_PAD_ENET2_TXC__ENET2_RGMII_TXC 0x1fe>, /* OSM H1 */
+ <MX91_PAD_ENET2_TX_CTL__ENET2_RGMII_TX_CTL 0x1fe>; /* OSM J2 */
+ };
+
+ /* OSM SPI_B_CS as GPIO */
+ pinctrl_spi_b_cs0_gpio: gpio1io11grp {
+ fsl,pins = <MX91_PAD_SAI1_TXFS__GPIO1_IO11 0x139e>; /* OSM AA23 */
+ };
+
+ /* OSM GPIO_A_0 */
+ pinctrl_gpio_a0: gpio2io0grp {
+ fsl,pins = <MX91_PAD_GPIO_IO00__GPIO2_IO0 0x139e>; /* OSM D17 */
+ };
+
+ /* OSM GPIO_A_1 */
+ pinctrl_gpio_a1: gpio2io1grp {
+ fsl,pins = <MX91_PAD_GPIO_IO01__GPIO2_IO1 0x139e>; /* OSM E17 */
+ };
+
+ /* OSM GPIO_A_2 */
+ pinctrl_gpio_a2: gpio2io2grp {
+ fsl,pins = <MX91_PAD_GPIO_IO02__GPIO2_IO2 0x139e>; /* OSM F17 */
+ };
+
+ /* OSM GPIO_A_3 */
+ pinctrl_gpio_a3: gpio2io3grp {
+ fsl,pins = <MX91_PAD_GPIO_IO03__GPIO2_IO3 0x139e>; /* OSM G17 */
+ };
+
+ /* OSM SPI_A_CS0 as GPIO */
+ pinctrl_spi_a_cs0_gpio: gpio2io12grp {
+ fsl,pins = <MX91_PAD_GPIO_IO12__GPIO2_IO12 0x139e>; /* OSM Y15 */
+ };
+
+ /* OSM PWM_0 as GPIO */
+ pinctrl_pwm0_gpio: gpio2io21grp {
+ fsl,pins = <MX91_PAD_GPIO_IO21__GPIO2_IO21 0x139e>; /* OSM E18 */
+ };
+
+ /* OSM GPIO_A_4 */
+ pinctrl_gpio_a4: gpio2io22grp {
+ fsl,pins = <MX91_PAD_GPIO_IO22__GPIO2_IO22 0x139e>; /* OSM H17 */
+ };
+
+ /* OSM GPIO_A_5 */
+ pinctrl_gpio_a5: gpio2io24grp {
+ fsl,pins = <MX91_PAD_GPIO_IO24__GPIO2_IO24 0x139e>; /* OSM J17 */
+ };
+
+ /* On-module CTRL_INT# */
+ pinctrl_ctrl_int: gpio3io27grp {
+ fsl,pins = <MX91_PAD_CCM_CLKO2__GPIO3_IO27 0x139e>; /* CTRL_INT# */
+ };
+
+ /* OSM GPIO_A_6 */
+ pinctrl_gpio_a6: gpio4io14grp {
+ fsl,pins = <MX91_PAD_ENET2_MDC__GPIO4_IO14 0x139e>; /* OSM K17 */
+ };
+
+ /* OSM GPIO_A_7 */
+ pinctrl_gpio_a7: gpio4io15grp {
+ fsl,pins = <MX91_PAD_ENET2_MDIO__GPIO4_IO15 0x139e>; /* OSM L17 */
+ };
+
+ /* OSM I2C_B as GPIO */
+ pinctrl_i2c_b_gpio: lpi2c1gpiogrp {
+ fsl,pins = <MX91_PAD_I2C1_SCL__GPIO1_IO0 0x40000b9e>, /* OSM AA20 */
+ <MX91_PAD_I2C1_SDA__GPIO1_IO1 0x40000b9e>; /* OSM AA21 */
+ };
+
+ /* OSM I2C_B */
+ pinctrl_i2c_b: lpi2c1grp {
+ fsl,pins = <MX91_PAD_I2C1_SCL__LPI2C1_SCL 0x40000b9e>, /* OSM AA20 */
+ <MX91_PAD_I2C1_SDA__LPI2C1_SDA 0x40000b9e>; /* OSM AA21 */
+ };
+
+ /* On-module PMIC I2C as GPIO */
+ pinctrl_pmic_i2c_gpio: lpi2c2gpiogrp {
+ fsl,pins = <MX91_PAD_I2C2_SCL__GPIO1_IO2 0x40000b9e>, /* PMIC_I2C_SCL */
+ <MX91_PAD_I2C2_SDA__GPIO1_IO3 0x40000b9e>; /* PMIC_I2C_SDA */
+ };
+
+ /* On-module PMIC I2C */
+ pinctrl_pmic_i2c: lpi2c2grp {
+ fsl,pins = <MX91_PAD_I2C2_SCL__LPI2C2_SCL 0x40000b9e>, /* PMIC_I2C_SCL */
+ <MX91_PAD_I2C2_SDA__LPI2C2_SDA 0x40000b9e>; /* PMIC_I2C_SDA */
+ };
+
+ /* OSM I2C_A as GPIO */
+ pinctrl_i2c_a_gpio: lpi2c3gpiogrp {
+ fsl,pins = <MX91_PAD_GPIO_IO28__GPIO2_IO28 0x40000b9e>, /* OSM AA16 */
+ <MX91_PAD_GPIO_IO29__GPIO2_IO29 0x40000b9e>; /* OSM AA15 */
+ };
+
+ /* OSM I2C_A */
+ pinctrl_i2c_a: lpi2c3grp {
+ fsl,pins = <MX91_PAD_GPIO_IO28__LPI2C3_SDA 0x40000b9e>, /* OSM AA16 */
+ <MX91_PAD_GPIO_IO29__LPI2C3_SCL 0x40000b9e>; /* OSM AA15 */
+ };
+
+ /* OSM SPI_B */
+ pinctrl_spi_b: lpspi1grp {
+ fsl,pins = <MX91_PAD_SAI1_TXC__LPSPI1_SIN 0x139e>, /* OSM Y22 */
+ <MX91_PAD_SAI1_TXD0__LPSPI1_SCK 0x139e>, /* OSM Y21 */
+ <MX91_PAD_SAI1_RXD0__LPSPI1_SOUT 0x139e>; /* OSM Y23 */
+ };
+
+ /* OSM SPI_A */
+ pinctrl_spi_a: lpspi8grp {
+ fsl,pins = <MX91_PAD_GPIO_IO13__LPSPI8_SIN 0x139e>, /* OSM U15 */
+ <MX91_PAD_GPIO_IO14__LPSPI8_SOUT 0x139e>, /* OSM V15 */
+ <MX91_PAD_GPIO_IO15__LPSPI8_SCK 0x139e>; /* OSM U16 */
+ };
+
+ /* OSM UART_CON */
+ pinctrl_uart_con: lpuart1grp {
+ fsl,pins = <MX91_PAD_UART1_RXD__LPUART1_RX 0x39e>, /* OSM D22 */
+ <MX91_PAD_UART1_TXD__LPUART1_TX 0x39e>; /* OSM D23 */
+ };
+
+ /* OSM UART_C */
+ pinctrl_uart_c: lpuart2grp {
+ fsl,pins = <MX91_PAD_UART2_RXD__LPUART2_RX 0x39e>, /* OSM A22 */
+ <MX91_PAD_UART2_TXD__LPUART2_TX 0x39e>; /* OSM B23 */
+ };
+
+ /* OSM UART_A */
+ pinctrl_uart_a: lpuart6grp {
+ fsl,pins = <MX91_PAD_GPIO_IO04__LPUART6_TX 0x39e>, /* OSM B13 */
+ <MX91_PAD_GPIO_IO05__LPUART6_RX 0x39e>, /* OSM A14 */
+ <MX91_PAD_GPIO_IO06__LPUART6_CTS_B 0x39e>, /* OSM C14 */
+ <MX91_PAD_GPIO_IO07__LPUART6_RTS_B 0x39e>; /* OSM C13 */
+ };
+
+ /* OSM UART_B */
+ pinctrl_uart_b: lpuart7grp {
+ fsl,pins = <MX91_PAD_GPIO_IO08__LPUART7_TX 0x39e>, /* OSM D13 */
+ <MX91_PAD_GPIO_IO09__LPUART7_RX 0x39e>, /* OSM D14 */
+ <MX91_PAD_GPIO_IO10__LPUART7_CTS_B 0x39e>, /* OSM D16 */
+ <MX91_PAD_GPIO_IO11__LPUART7_RTS_B 0x39e>; /* OSM D15 */
+ };
+
+ /* OSM I2S_A */
+ pinctrl_i2s_a: sai3grp {
+ fsl,pins = <MX91_PAD_GPIO_IO16__SAI3_TX_BCLK 0x139e>, /* OSM W20 */
+ <MX91_PAD_GPIO_IO19__SAI3_TX_DATA0 0x139e>, /* OSM W21 */
+ <MX91_PAD_GPIO_IO20__SAI3_RX_DATA0 0x139e>, /* OSM V21 */
+ <MX91_PAD_GPIO_IO26__SAI3_TX_SYNC 0x139e>; /* OSM W18 */
+ };
+
+ /* OSM I2S_MCLK */
+ pinctrl_i2s_a_mclk: sai3mclkgrp {
+ fsl,pins = <MX91_PAD_GPIO_IO17__SAI3_MCLK 0x31e>; /* OSM V18 */
+ };
+
+ /* OSM PWM_0 */
+ pinctrl_pwm0: tpm4ch1grp {
+ fsl,pins = <MX91_PAD_GPIO_IO21__TPM4_CH1 0x139e>; /* OSM E18 */
+ };
+
+ /* OSM PWM_1 */
+ pinctrl_pwm1: tpm5ch2grp {
+ fsl,pins = <MX91_PAD_GPIO_IO18__TPM5_CH2 0x139e>; /* OSM F18 */
+ };
+
+ /* OSM PWM_2 */
+ pinctrl_pwm2: tpm6ch1grp {
+ fsl,pins = <MX91_PAD_GPIO_IO23__TPM6_CH1 0x139e>; /* OSM G18 */
+ };
+
+ /* OSM USB_A_EN */
+ pinctrl_usb_a_en: usb1engrp {
+ fsl,pins = <MX91_PAD_CCM_CLKO3__GPIO4_IO28 0x139e>; /* OSM AC16 */
+ };
+
+ /* OSM USB_A_OC# */
+ pinctrl_usb_a_oc: usb1ocgrp {
+ fsl,pins = <MX91_PAD_CCM_CLKO4__GPIO4_IO29 0x139e>; /* OSM AC15 */
+ };
+
+ /* OSM USB_B_EN */
+ pinctrl_usb_b_en: usb2engrp {
+ fsl,pins = <MX91_PAD_PDM_BIT_STREAM1__GPIO1_IO10 0x139e>; /* OSM AC20 */
+ };
+
+ /* On-module eMMC */
+ pinctrl_emmc: usdhc1grp {
+ fsl,pins = <MX91_PAD_SD1_CLK__USDHC1_CLK 0x5fe>, /* eMMC_CLK */
+ <MX91_PAD_SD1_CMD__USDHC1_CMD 0x400013fe>, /* eMMC_CMD */
+ <MX91_PAD_SD1_DATA0__USDHC1_DATA0 0x400013fe>, /* eMMC_DATA0 */
+ <MX91_PAD_SD1_DATA1__USDHC1_DATA1 0x400013fe>, /* eMMC_DATA1 */
+ <MX91_PAD_SD1_DATA2__USDHC1_DATA2 0x400013fe>, /* eMMC_DATA2 */
+ <MX91_PAD_SD1_DATA3__USDHC1_DATA3 0x400013fe>, /* eMMC_DATA3 */
+ <MX91_PAD_SD1_DATA4__USDHC1_DATA4 0x400013fe>, /* eMMC_DATA4 */
+ <MX91_PAD_SD1_DATA5__USDHC1_DATA5 0x400013fe>, /* eMMC_DATA5 */
+ <MX91_PAD_SD1_DATA6__USDHC1_DATA6 0x400013fe>, /* eMMC_DATA6 */
+ <MX91_PAD_SD1_DATA7__USDHC1_DATA7 0x400013fe>, /* eMMC_DATA7 */
+ <MX91_PAD_SD1_STROBE__USDHC1_STROBE 0x1580>; /* eMMC_STROBE */
+ };
+
+ /* OSM SDIO_A_CD# */
+ pinctrl_sdio_a_cd: usdhc2cdgrp {
+ fsl,pins = <MX91_PAD_SD2_CD_B__GPIO3_IO0 0x139e>; /* OSM J21 */
+ };
+
+ /* OSM SDIO_A */
+ pinctrl_sdio_a: usdhc2grp {
+ fsl,pins = <MX91_PAD_SD2_CLK__USDHC2_CLK 0x5fe>, /* OSM F21 */
+ <MX91_PAD_SD2_CMD__USDHC2_CMD 0x400013fe>, /* OSM E20 */
+ <MX91_PAD_SD2_DATA0__USDHC2_DATA0 0x400013fe>, /* OSM G20 */
+ <MX91_PAD_SD2_DATA1__USDHC2_DATA1 0x400013fe>, /* OSM G21 */
+ <MX91_PAD_SD2_DATA2__USDHC2_DATA2 0x400013fe>, /* OSM H20 */
+ <MX91_PAD_SD2_DATA3__USDHC2_DATA3 0x400013fe>; /* OSM H21 */
+ };
+
+ /* OSM SDIO_A_PWR_EN */
+ pinctrl_sdio_a_pwr_en: usdhc2pwrgrp {
+ fsl,pins = <MX91_PAD_SD2_RESET_B__GPIO3_IO7 0x139e>; /* OSM D21 */
+ };
+
+ /* On-module PMIC_SD_2_VSEL */
+ pinctrl_sdio_a_vsel: usdhc2vselgrp {
+ fsl,pins = <MX91_PAD_SD2_VSELECT__GPIO3_IO19 0x51e>; /* PMIC_SD_2_VSEL */
+ };
+
+ /* OSM SDIO_B */
+ pinctrl_sdio_b: usdhc3grp {
+ fsl,pins = <MX91_PAD_SD3_CLK__USDHC3_CLK 0x5fe>, /* OSM K20 */
+ <MX91_PAD_SD3_CMD__USDHC3_CMD 0x400013fe>, /* OSM K21 */
+ <MX91_PAD_SD3_DATA0__USDHC3_DATA0 0x400013fe>, /* OSM L20 */
+ <MX91_PAD_SD3_DATA1__USDHC3_DATA1 0x400013fe>, /* OSM L21 */
+ <MX91_PAD_SD3_DATA2__USDHC3_DATA2 0x400013fe>, /* OSM M21 */
+ <MX91_PAD_SD3_DATA3__USDHC3_DATA3 0x400013fe>; /* OSM N20 */
+ };
+
+ pinctrl_wdog: wdoggrp {
+ fsl,pins = <MX91_PAD_WDOG_ANY__WDOG1_WDOG_ANY 0x31e>; /* PMIC_WDOG_B */
+ };
+};
diff --git a/arch/arm64/boot/dts/freescale/imx93-11x11-evk-common.dtsi b/arch/arm64/boot/dts/freescale/imx93-11x11-evk-common.dtsi
index 2f3f9ebd3345..164b5c17bfe1 100644
--- a/arch/arm64/boot/dts/freescale/imx93-11x11-evk-common.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx93-11x11-evk-common.dtsi
@@ -68,7 +68,7 @@
no-map;
};
- vdevbuffer: vdevbuffer@a4020000 {
+ vdev0buffer: vdev0buffer@a4020000 {
compatible = "shared-dma-pool";
reg = <0 0xa4020000 0 0x100000>;
no-map;
@@ -171,7 +171,7 @@
mboxes = <&mu1 0 1>,
<&mu1 1 1>,
<&mu1 3 1>;
- memory-region = <&vdevbuffer>, <&vdev0vring0>, <&vdev0vring1>,
+ memory-region = <&vdev0buffer>, <&vdev0vring0>, <&vdev0vring1>,
<&vdev1vring0>, <&vdev1vring1>, <&rsc_table>;
status = "okay";
};
diff --git a/arch/arm64/boot/dts/freescale/imx93-11x11-frdm-common.dtsi b/arch/arm64/boot/dts/freescale/imx93-11x11-frdm-common.dtsi
index 97d89288db3c..33ed26aafde8 100644
--- a/arch/arm64/boot/dts/freescale/imx93-11x11-frdm-common.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx93-11x11-frdm-common.dtsi
@@ -100,7 +100,7 @@
no-map;
};
- vdevbuffer: vdevbuffer@a4020000 {
+ vdev0buffer: vdev0buffer@a4020000 {
compatible = "shared-dma-pool";
reg = <0 0xa4020000 0 0x100000>;
no-map;
@@ -122,7 +122,7 @@
<&mu1 1 1>,
<&mu1 3 1>;
mbox-names = "tx", "rx", "rxdb";
- memory-region = <&vdevbuffer>, <&vdev0vring0>, <&vdev0vring1>,
+ memory-region = <&vdev0buffer>, <&vdev0vring0>, <&vdev0vring1>,
<&vdev1vring0>, <&vdev1vring1>, <&rsc_table>;
status = "okay";
};
diff --git a/arch/arm64/boot/dts/freescale/imx93-14x14-evk.dts b/arch/arm64/boot/dts/freescale/imx93-14x14-evk.dts
index a025a08130f8..1081881028b2 100644
--- a/arch/arm64/boot/dts/freescale/imx93-14x14-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx93-14x14-evk.dts
@@ -101,7 +101,7 @@
no-map;
};
- vdevbuffer: vdevbuffer@a4020000 {
+ vdev0buffer: vdev0buffer@a4020000 {
compatible = "shared-dma-pool";
reg = <0 0xa4020000 0 0x100000>;
no-map;
@@ -255,7 +255,7 @@
mboxes = <&mu1 0 1>,
<&mu1 1 1>,
<&mu1 3 1>;
- memory-region = <&vdevbuffer>, <&vdev0vring0>, <&vdev0vring1>,
+ memory-region = <&vdev0buffer>, <&vdev0vring0>, <&vdev0vring1>,
<&vdev1vring0>, <&vdev1vring1>, <&rsc_table>;
status = "okay";
};
diff --git a/arch/arm64/boot/dts/freescale/imx93-9x9-qsb.dts b/arch/arm64/boot/dts/freescale/imx93-9x9-qsb.dts
index 4e31a78963fe..3be5bf4bc101 100644
--- a/arch/arm64/boot/dts/freescale/imx93-9x9-qsb.dts
+++ b/arch/arm64/boot/dts/freescale/imx93-9x9-qsb.dts
@@ -77,7 +77,7 @@
no-map;
};
- vdevbuffer: vdevbuffer@a4020000 {
+ vdev0buffer: vdev0buffer@a4020000 {
compatible = "shared-dma-pool";
reg = <0 0xa4020000 0 0x100000>;
no-map;
@@ -213,7 +213,7 @@
mboxes = <&mu1 0 1>,
<&mu1 1 1>,
<&mu1 3 1>;
- memory-region = <&vdevbuffer>, <&vdev0vring0>, <&vdev0vring1>,
+ memory-region = <&vdev0buffer>, <&vdev0vring0>, <&vdev0vring1>,
<&vdev1vring0>, <&vdev1vring1>, <&rsc_table>;
status = "okay";
};
diff --git a/arch/arm64/boot/dts/freescale/imx93-imx91-lino-common.dtsi b/arch/arm64/boot/dts/freescale/imx93-imx91-lino-common.dtsi
new file mode 100644
index 000000000000..f8f13f785860
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx93-imx91-lino-common.dtsi
@@ -0,0 +1,536 @@
+// SPDX-License-Identifier: GPL-2.0-only OR MIT
+/*
+ * Copyright (c) Toradex
+ *
+ * Lino iMX93/iMX91 SoM
+ *
+ * https://www.toradex.com/computer-on-modules/lino-arm-family/nxp-imx93
+ * https://www.toradex.com/computer-on-modules/lino-arm-family/nxp-imx91
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+
+/ {
+ aliases {
+ can0 = &flexcan1;
+ can1 = &flexcan2;
+ eeprom0 = &som_eeprom;
+ ethernet0 = &eqos;
+ ethernet1 = &fec;
+ i2c0 = &lpi2c2;
+ i2c1 = &lpi2c1;
+ i2c2 = &lpi2c3;
+ i2c3 = &lpi2c4;
+ mmc0 = &usdhc1;
+ mmc1 = &usdhc2;
+ mmc2 = &usdhc3;
+ serial0 = &lpuart6;
+ serial1 = &lpuart7;
+ serial2 = &lpuart1;
+ serial3 = &lpuart2;
+ usb0 = &usbotg1;
+ usb1 = &usbotg2;
+ };
+
+ chosen {
+ stdout-path = &lpuart1;
+ };
+
+ /* Lino SD_1 Power Supply */
+ reg_sd1_vmmc: regulator-sdhci2-vmmc {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sd1_pwr_en>;
+ /* Lino SD_1_PWR_EN (Lino P72) */
+ gpios = <&gpio3 7 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ off-on-delay-us = <100000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-name = "+V3.3_SD";
+ startup-delay-us = <20000>;
+ };
+
+ reg_sd1_vqmmc: regulator-sdhci2-vqmmc {
+ compatible = "regulator-gpio";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sd1_vsel>;
+ /* PMIC_SD_2_VSEL */
+ gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <1800000>;
+ regulator-name = "LDO1-VSEL-SD (PMIC)";
+ states = <1800000 0x1>,
+ <3300000 0x0>;
+ vin-supply = <&reg_sd_3v3_1v8>;
+ };
+
+ reg_usb1_vbus: regulator-usb1-vbus {
+ compatible = "regulator-fixed";
+ /* Lino USB_1_EN (P27) */
+ gpios = <&som_gpio_expander 0 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ regulator-max-microvolt = <5000000>;
+ regulator-min-microvolt = <5000000>;
+ regulator-name = "USB_1_EN";
+ startup-delay-us = <20000>;
+ };
+
+ reg_usb2_vbus: regulator-usb2-vbus {
+ compatible = "regulator-fixed";
+ /* Lino USB_2_EN (P61) */
+ gpios = <&som_gpio_expander 1 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ regulator-max-microvolt = <5000000>;
+ regulator-min-microvolt = <5000000>;
+ regulator-name = "USB_2_EN";
+ startup-delay-us = <20000>;
+ };
+};
+
+/* Lino ADC_1, ADC_2, ADC_3 and ADC_4 */
+&adc1 {
+ vref-supply = <&reg_1v8>;
+};
+
+/* Lino ETH_1 */
+&eqos {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_mdio>, <&pinctrl_eth1>;
+
+ mdio: mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ status = "disabled";
+ };
+};
+
+/* Lino ETH_2 */
+&fec {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_eth2>;
+};
+
+/* Lino CAN_1 */
+&flexcan1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_can1>;
+};
+
+/* Lino CAN_2 */
+&flexcan2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_can2>;
+};
+
+&gpio1 {
+ gpio-line-names =
+ "LINO_P18",
+ "LINO_P16",
+ "PMIC_I2C_SCL",
+ "PMIC_I2C_SDA",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "LINO_P65", /* 10 */
+ "LINO_S18",
+ "LINO_S24",
+ "LINO_S20",
+ "LINO_S22",
+ "";
+};
+
+&gpio2 {
+ gpio-line-names =
+ "LINO_P30",
+ "LINO_P32",
+ "LINO_P24",
+ "LINO_P26",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "", /* 10 */
+ "",
+ "LINO_P58",
+ "",
+ "",
+ "",
+ "",
+ "LINO_P34",
+ "",
+ "",
+ "", /* 20 */
+ "",
+ "LINO_P36",
+ "",
+ "LINO_P38",
+ "",
+ "",
+ "",
+ "LINO_P20",
+ "LINO_P22";
+};
+
+&gpio3 {
+ gpio-line-names =
+ "LINO_P78",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "LINO_P72",
+ "",
+ "",
+ "", /* 10 */
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "PMIC_SD_2_VSEL",
+ "", /* 20 */
+ "",
+ "",
+ "",
+ "",
+ "",
+ "LINO_P40",
+ "LINO_P42",
+ "",
+ "",
+ "", /* 30 */
+ "";
+};
+
+&gpio4 {
+ gpio-line-names =
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "", /* 10 */
+ "",
+ "",
+ "",
+ "LINO_P46",
+ "LINO_P48",
+ "",
+ "",
+ "",
+ "",
+ "", /* 20 */
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "LINO_P44",
+ "GPIO_EXP_INT#";
+};
+
+/* Lino I2C_1 */
+&lpi2c1 {
+ pinctrl-names = "default", "gpio";
+ pinctrl-0 = <&pinctrl_i2c1>;
+ pinctrl-1 = <&pinctrl_i2c1_gpio>;
+ clock-frequency = <100000>;
+ scl-gpios = <&gpio1 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ sda-gpios = <&gpio1 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ single-master;
+};
+
+/* On-module I2C - PMIC_I2C */
+&lpi2c2 {
+ pinctrl-names = "default", "gpio";
+ pinctrl-0 = <&pinctrl_pmic_i2c>;
+ pinctrl-1 = <&pinctrl_pmic_i2c_gpio>;
+ clock-frequency = <400000>;
+ scl-gpios = <&gpio1 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ sda-gpios = <&gpio1 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ single-master;
+
+ status = "okay";
+
+ som_gpio_expander: gpio@21 {
+ compatible = "nxp,pcal6408";
+ reg = <0x21>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio_exp_int>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ interrupt-parent = <&gpio4>;
+ interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-line-names =
+ "Lino_P27", /* Lino USB_1_EN */
+ "Lino_P61", /* Lino USB_2_EN */
+ "TPM_SPI_CS#",
+ "Lino_P29", /* Lino USB_1_OC# */
+ "Lino_P63", /* Lino USB_2_OC# */
+ "PMIC_INT#",
+ "TPM_IRQ#",
+ "Lino_S66";
+ };
+
+ pmic@32 {
+ compatible = "nxp,pf9453";
+ reg = <0x32>;
+ interrupt-parent = <&som_gpio_expander>;
+ interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
+
+ regulators {
+ BUCK1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1100000>;
+ regulator-min-microvolt = <1100000>;
+ regulator-name = "+V1.1_DDR (PMIC BUCK1)";
+ };
+
+ reg_vdd_soc: BUCK2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <950000>;
+ regulator-min-microvolt = <612500>;
+ regulator-name = "+VDD_SOC (PMIC BUCK2)";
+ regulator-ramp-delay = <12500>;
+ };
+
+ reg_1v8: BUCK3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1800000>;
+ regulator-min-microvolt = <1800000>;
+ regulator-name = "+V1.8 / +V1.8_ANA (PMIC BUCK3)";
+ };
+
+ reg_3v3: BUCK4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-name = "+V3.3 (PMIC BUCK4)";
+ };
+
+ reg_sd_3v3_1v8: LDO1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <1800000>;
+ regulator-name = "+V3.3_1.8_SD (PMIC LDO1)";
+ };
+
+ LDO2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <800000>;
+ regulator-min-microvolt = <800000>;
+ regulator-name = "+V0.8_ANA (PMIC LDO2)";
+ };
+
+ LDO-SNVS {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1800000>;
+ regulator-min-microvolt = <1800000>;
+ regulator-name = "+V1.8_BBSM (PMIC LDO-SNVS)";
+ };
+ };
+ };
+
+ temperature-sensor@48 {
+ compatible = "ti,tmp1075";
+ reg = <0x48>;
+ };
+
+ som_eeprom: eeprom@50 {
+ compatible = "st,24c02", "atmel,24c02";
+ reg = <0x50>;
+ pagesize = <16>;
+ };
+};
+
+/* Lino I2C_2 */
+&lpi2c3 {
+ pinctrl-names = "default", "gpio";
+ pinctrl-0 = <&pinctrl_i2c2>;
+ pinctrl-1 = <&pinctrl_i2c2_gpio>;
+ clock-frequency = <100000>;
+ scl-gpios = <&gpio2 29 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ sda-gpios = <&gpio2 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ single-master;
+};
+
+/* Lino I2C_3 */
+&lpi2c4 {
+ pinctrl-names = "default", "gpio";
+ pinctrl-0 = <&pinctrl_i2c3>;
+ pinctrl-1 = <&pinctrl_i2c3_gpio>;
+ clock-frequency = <100000>;
+ scl-gpios = <&gpio2 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ sda-gpios = <&gpio2 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ single-master;
+};
+
+/* Lino SPI_2 */
+&lpspi1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi2>, <&pinctrl_spi2_cs0_gpio>;
+ cs-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>, <&som_gpio_expander 2 GPIO_ACTIVE_LOW>;
+
+ status = "okay";
+
+ tpm@1 {
+ compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
+ reg = <1>;
+ interrupt-parent = <&som_gpio_expander>;
+ interrupts = <6 IRQ_TYPE_EDGE_FALLING>;
+ spi-max-frequency = <18500000>;
+ };
+};
+
+/* Lino SPI_1 */
+&lpspi8 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi1>, <&pinctrl_spi1_cs0_gpio>;
+ cs-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
+};
+
+/* Lino UART_3, used as the Linux Console */
+&lpuart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart3>;
+};
+
+/* Lino UART_4 */
+&lpuart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart4>;
+};
+
+/* Lino UART_1 */
+&lpuart6 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1>;
+ uart-has-rtscts;
+};
+
+/* Lino UART_2 */
+&lpuart7 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart2>;
+ uart-has-rtscts;
+};
+
+/* Lino I2S_1 */
+&sai3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2s1>;
+ assigned-clocks = <&clk IMX93_CLK_SAI3>;
+ assigned-clock-parents = <&clk IMX93_CLK_AUDIO_PLL>;
+ assigned-clock-rates = <24576000>;
+};
+
+/* Lino PWM_1 */
+&tpm4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm1>;
+};
+
+/* Lino PWM_2 */
+&tpm5 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm2>;
+};
+
+/* Lino PWM_3 */
+&tpm6 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm3>;
+};
+
+/* Lino USB_1 */
+&usbotg1 {
+ dr_mode = "otg";
+ adp-disable;
+ hnp-disable;
+ srp-disable;
+ usb-role-switch;
+ disable-over-current;
+ role-switch-default-mode = "peripheral";
+ samsung,picophy-dc-vol-level-adjust = <7>;
+ samsung,picophy-pre-emp-curr-control = <3>;
+};
+
+/* Lino USB_2 */
+&usbotg2 {
+ disable-over-current;
+ dr_mode = "host";
+ vbus-supply = <&reg_usb2_vbus>;
+ samsung,picophy-dc-vol-level-adjust = <7>;
+ samsung,picophy-pre-emp-curr-control = <3>;
+};
+
+/* On-module eMMC */
+&usdhc1 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_emmc>;
+ pinctrl-1 = <&pinctrl_emmc>;
+ pinctrl-2 = <&pinctrl_emmc>;
+ no-sd;
+ no-sdio;
+ non-removable;
+
+ status = "okay";
+};
+
+/* Lino SD_1 */
+&usdhc2 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_sd1>, <&pinctrl_sd1_cd>;
+ pinctrl-1 = <&pinctrl_sd1>, <&pinctrl_sd1_cd>;
+ pinctrl-2 = <&pinctrl_sd1>, <&pinctrl_sd1_cd>;
+ cd-gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
+ disable-wp;
+ vmmc-supply = <&reg_sd1_vmmc>;
+ vqmmc-supply = <&reg_sd1_vqmmc>;
+};
+
+/* Lino SD_2 */
+&usdhc3 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_sd2>;
+ pinctrl-1 = <&pinctrl_sd2>;
+ pinctrl-2 = <&pinctrl_sd2>;
+};
+
+&wdog3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_wdog>;
+ fsl,ext-reset-output;
+
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx93-imx91-lino-verdin-common.dtsi b/arch/arm64/boot/dts/freescale/imx93-imx91-lino-verdin-common.dtsi
new file mode 100644
index 000000000000..0023e76210ce
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx93-imx91-lino-verdin-common.dtsi
@@ -0,0 +1,175 @@
+// SPDX-License-Identifier: GPL-2.0-only OR MIT
+/*
+ * Copyright (c) Toradex
+ *
+ * Lino iMX93/iMX91 SoM on Lino-Verdin Adapter
+ *
+ * https://www.toradex.com/computer-on-modules/verdin-arm-family
+ * https://www.toradex.com/computer-on-modules/lino-arm-family/nxp-imx93
+ * https://www.toradex.com/computer-on-modules/lino-arm-family/nxp-imx91
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/net/ti-dp83867.h>
+
+/ {
+ verdin_i2s1_mclk: clock-24576000 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <24576000>;
+ };
+
+ verdin_csi1_mclk: clock-25000000 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <25000000>;
+ };
+
+ connector {
+ compatible = "gpio-usb-b-connector", "usb-b-connector";
+ id-gpios = <&adapter_gpio_expander 1 GPIO_ACTIVE_HIGH>;
+ self-powered;
+ type = "micro";
+ vbus-supply = <&reg_usb1_vbus>;
+
+ port {
+ usb_1_connector: endpoint {
+ remote-endpoint = <&usb1_drd_sw>;
+ };
+ };
+ };
+
+ verdin_gpio_keys: gpio-keys {
+ compatible = "gpio-keys";
+
+ status = "disabled";
+
+ key-wakeup {
+ debounce-interval = <10>;
+ /* Verdin CTRL_WAKE1_MICO# (SODIMM 252) */
+ gpios = <&adapter_gpio_expander 2 GPIO_ACTIVE_LOW>;
+ label = "Wake-Up";
+ wakeup-source;
+ linux,code = <KEY_WAKEUP>;
+ };
+ };
+};
+
+/* Lino ETH_1 */
+&eqos {
+ phy-handle = <&ethphy1>;
+ phy-mode = "rgmii-id";
+};
+
+/* Lino I2C_1 */
+&lpi2c1 {
+ status = "okay";
+
+ i2c-mux@70 {
+ compatible = "nxp,pca9543";
+ reg = <0x70>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ verdin_i2c_1: i2c@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ status = "disabled";
+ };
+
+ adapter_i2c: i2c@1 {
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ adapter_gpio_expander: gpio@21 {
+ compatible = "nxp,pcal6416";
+ reg = <0x21>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio_11>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ interrupt-parent = <&gpio1>;
+ interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-line-names =
+ "SODIMM_244", /* Verdin PCIE_1_RESET# */
+ "SODIMM_161", /* Verdin USB_1_ID */
+ "SODIMM_252", /* Verdin CTRL_WAKE1_MICO# */
+ "ETH_1_INT#",
+ "CTRL_EN_WIFI",
+ "",
+ "",
+ "",
+ "SODIMM_42", /* Verdin I2S_2_BCLK */
+ "SODIMM_48", /* Verdin I2S_2_D_IN */
+ "SODIMM_46", /* Verdin I2S_2_D_OUT */
+ "SODIMM_44", /* Verdin I2S_2_SYNC */
+ "SODIMM_64", /* Verdin QSPI_1_CS2# */
+ "SODIMM_66", /* Verdin QSPI_1_DQS */
+ "SODIMM_60", /* Verdin QSPI_1_IO2 */
+ "SODIMM_62"; /* Verdin QSPI_1_IO3 */
+
+ verdin_pcie_1_reset_hog: pcie-1-reset-hog {
+ gpio-hog;
+ /* Verdin PCIE_1_RESET# (SODIMM 244) */
+ gpios = <0 GPIO_ACTIVE_LOW>;
+ line-name = "PCIE_1_RESET#";
+ output-low;
+
+ status = "disabled";
+ };
+ };
+
+ /* Current measurement into module VCC */
+ hwmon@40 {
+ compatible = "ti,ina219";
+ reg = <0x40>;
+ shunt-resistor = <10000>;
+ };
+ };
+ };
+};
+
+/* Lino UART_1 */
+&lpuart6 {
+ status = "okay";
+
+ bluetooth {
+ compatible = "nxp,88w8987-bt";
+ fw-init-baudrate = <3000000>;
+ };
+};
+
+/* Lino Ethernet MDIO */
+&mdio {
+ status = "okay";
+
+ ethphy1: ethernet-phy@1 {
+ reg = <1>;
+ interrupt-parent = <&adapter_gpio_expander>;
+ interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
+ ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
+ ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
+ };
+};
+
+/* Lino USB_1 */
+&usbotg1 {
+ port {
+ usb1_drd_sw: endpoint {
+ remote-endpoint = <&usb_1_connector>;
+ };
+ };
+};
+
+/* Lino SD_2 */
+&usdhc3 {
+ keep-power-in-suspend;
+ non-removable;
+
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx93-imx91-lino-verdin-dahlia-common.dtsi b/arch/arm64/boot/dts/freescale/imx93-imx91-lino-verdin-dahlia-common.dtsi
new file mode 100644
index 000000000000..5f6136204e30
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx93-imx91-lino-verdin-dahlia-common.dtsi
@@ -0,0 +1,198 @@
+// SPDX-License-Identifier: GPL-2.0-only OR MIT
+/*
+ * Copyright (c) Toradex
+ *
+ * Lino iMX93/iMX91 SoM on Lino-Verdin Adapter / Dahlia carrier board
+ *
+ * https://www.toradex.com/computer-on-modules/lino-arm-family/nxp-imx91
+ * https://www.toradex.com/computer-on-modules/lino-arm-family/nxp-imx93
+ * https://www.toradex.com/products/carrier-board/dahlia-carrier-board-kit
+ */
+
+/ {
+ aliases {
+ eeprom1 = &carrier_eeprom;
+ };
+
+ reg_1v8_sw: regulator-1v8-sw {
+ compatible = "regulator-fixed";
+ regulator-max-microvolt = <1800000>;
+ regulator-min-microvolt = <1800000>;
+ regulator-name = "On-carrier +V1.8_SW";
+ };
+
+ sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,bitclock-master = <&codec_dai>;
+ simple-audio-card,format = "i2s";
+ simple-audio-card,frame-master = <&codec_dai>;
+ simple-audio-card,mclk-fs = <256>;
+ simple-audio-card,name = "verdin-wm8904";
+ simple-audio-card,routing =
+ "Headphone Jack", "HPOUTL",
+ "Headphone Jack", "HPOUTR",
+ "IN2L", "Line In Jack",
+ "IN2R", "Line In Jack",
+ "Microphone Jack", "MICBIAS",
+ "IN1L", "Microphone Jack";
+ simple-audio-card,widgets =
+ "Microphone", "Microphone Jack",
+ "Headphone", "Headphone Jack",
+ "Line", "Line In Jack";
+
+ codec_dai: simple-audio-card,codec {
+ sound-dai = <&wm8904_1a>;
+ };
+
+ simple-audio-card,cpu {
+ sound-dai = <&sai3>;
+ };
+ };
+};
+
+/* Lino ADC_1, ADC_2, ADC_3 and ADC_4 */
+&adc1 {
+ status = "okay";
+};
+
+&gpio2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio1>, <&pinctrl_gpio2>, <&pinctrl_gpio3>,
+ <&pinctrl_gpio4>, <&pinctrl_gpio5>;
+};
+
+&gpio3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio6>, <&pinctrl_gpio7>;
+};
+
+&gpio4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio8>, <&pinctrl_gpio9>, <&pinctrl_gpio10>;
+};
+
+/* Lino ETH_1 */
+&eqos {
+ status = "okay";
+};
+
+/* Lino CAN_1 */
+&flexcan1 {
+ status = "okay";
+};
+
+/* Lino CAN_2 */
+&flexcan2 {
+ status = "okay";
+};
+
+/* Lino I2C_2 */
+&lpi2c3 {
+ status = "okay";
+};
+
+/* Lino I2C_3 */
+&lpi2c4 {
+ status = "okay";
+};
+
+/* Lino SPI_1 */
+&lpspi8 {
+ status = "okay";
+};
+
+/* Lino UART_3, used as the Linux Console */
+&lpuart1 {
+ status = "okay";
+};
+
+/* Lino UART_4 */
+&lpuart2 {
+ status = "okay";
+};
+
+/* Lino UART_2 */
+&lpuart7 {
+ status = "okay";
+};
+
+/* Lino I2S_1 */
+&sai3 {
+ status = "okay";
+};
+
+/* Lino PWM_1 */
+&tpm4 {
+ status = "okay";
+};
+
+/* Lino PWM_2 */
+&tpm5 {
+ status = "okay";
+};
+
+/* Lino PWM_3 */
+&tpm6 {
+ status = "okay";
+};
+
+/* Lino USB_1 */
+&usbotg1 {
+ status = "okay";
+};
+
+/* Lino USB_2 */
+&usbotg2 {
+ status = "okay";
+};
+
+/* Lino SD_1 */
+&usdhc2 {
+ status = "okay";
+};
+
+/* Verdin CTRL_WAKE1_MICO# */
+&verdin_gpio_keys {
+ status = "okay";
+};
+
+/* Verdin I2C_1 */
+&verdin_i2c_1 {
+ status = "okay";
+
+ wm8904_1a: audio-codec@1a {
+ compatible = "wlf,wm8904";
+ reg = <0x1a>;
+ clock-names = "mclk";
+ clocks = <&verdin_i2s1_mclk>;
+ #sound-dai-cells = <0>;
+ AVDD-supply = <&reg_1v8_sw>;
+ CPVDD-supply = <&reg_1v8_sw>;
+ DBVDD-supply = <&reg_1v8_sw>;
+ DCVDD-supply = <&reg_1v8_sw>;
+ MICVDD-supply = <&reg_1v8_sw>;
+ };
+
+ /* Current measurement into module VCC */
+ hwmon@40 {
+ compatible = "ti,ina219";
+ reg = <0x40>;
+ shunt-resistor = <10000>;
+ };
+
+ temperature-sensor@4f {
+ compatible = "ti,tmp75c";
+ reg = <0x4f>;
+ };
+
+ carrier_eeprom: eeprom@57 {
+ compatible = "st,24c02", "atmel,24c02";
+ reg = <0x57>;
+ pagesize = <16>;
+ };
+};
+
+/* Verdin PCIE_1_RESET# */
+&verdin_pcie_1_reset_hog {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx93-imx91-lino-verdin-dev-common.dtsi b/arch/arm64/boot/dts/freescale/imx93-imx91-lino-verdin-dev-common.dtsi
new file mode 100644
index 000000000000..1664b380e58e
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx93-imx91-lino-verdin-dev-common.dtsi
@@ -0,0 +1,216 @@
+// SPDX-License-Identifier: GPL-2.0-only OR MIT
+/*
+ * Copyright (c) Toradex
+ *
+ * Lino iMX93/iMX91 SoM on Lino-Verdin Adapter / Development carrier board
+ *
+ * https://www.toradex.com/computer-on-modules/lino-arm-family/nxp-imx91
+ * https://www.toradex.com/computer-on-modules/lino-arm-family/nxp-imx93
+ * https://www.toradex.com/products/carrier-board/verdin-development-board-kit
+ */
+
+/ {
+ aliases {
+ eeprom1 = &carrier_eeprom;
+ };
+
+ sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,bitclock-master = <&codec_dai>;
+ simple-audio-card,format = "i2s";
+ simple-audio-card,frame-master = <&codec_dai>;
+ simple-audio-card,mclk-fs = <256>;
+ simple-audio-card,name = "verdin-nau8822";
+ simple-audio-card,routing =
+ "Headphones", "LHP",
+ "Headphones", "RHP",
+ "Speaker", "LSPK",
+ "Speaker", "RSPK",
+ "Line Out", "AUXOUT1",
+ "Line Out", "AUXOUT2",
+ "LAUX", "Line In",
+ "RAUX", "Line In",
+ "LMICP", "Mic In",
+ "RMICP", "Mic In";
+ simple-audio-card,widgets =
+ "Headphones", "Headphones",
+ "Line Out", "Line Out",
+ "Speaker", "Speaker",
+ "Microphone", "Mic In",
+ "Line", "Line In";
+
+ codec_dai: simple-audio-card,codec {
+ sound-dai = <&nau8822_1a>;
+ };
+
+ simple-audio-card,cpu {
+ sound-dai = <&sai3>;
+ };
+ };
+};
+
+/* Lino ADC_1, ADC_2, ADC_3 and ADC_4 */
+&adc1 {
+ status = "okay";
+};
+
+&gpio2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio1>, <&pinctrl_gpio2>, <&pinctrl_gpio3>,
+ <&pinctrl_gpio4>, <&pinctrl_gpio5>;
+};
+
+&gpio3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio6>, <&pinctrl_gpio7>;
+};
+
+&gpio4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio8>, <&pinctrl_gpio9>, <&pinctrl_gpio10>;
+};
+
+/* Lino ETH_1 */
+&eqos {
+ status = "okay";
+};
+
+/* Lino ETH_2 */
+&fec {
+ phy-handle = <&ethphy2>;
+ phy-mode = "rgmii-id";
+
+ status = "okay";
+};
+
+/* Lino CAN_1 */
+&flexcan1 {
+ status = "okay";
+};
+
+/* Lino CAN_2 */
+&flexcan2 {
+ status = "okay";
+};
+
+/* Lino I2C_2 */
+&lpi2c3 {
+ status = "okay";
+};
+
+/* Lino I2C_3 */
+&lpi2c4 {
+ status = "okay";
+};
+
+/* Lino SPI_1 */
+&lpspi8 {
+ status = "okay";
+};
+
+/* Lino UART_3, used as the Linux Console */
+&lpuart1 {
+ status = "okay";
+};
+
+/* Lino UART_4 */
+&lpuart2 {
+ status = "okay";
+};
+
+/* Lino UART_2 */
+&lpuart7 {
+ status = "okay";
+};
+
+/* Lino Ethernet MDIO */
+&mdio {
+ ethphy2: ethernet-phy@7 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <7>;
+ micrel,led-mode = <0>;
+ };
+};
+
+/* Lino I2S_1 */
+&sai3 {
+ status = "okay";
+};
+
+/* Lino PWM_1 */
+&tpm4 {
+ status = "okay";
+};
+
+/* Lino PWM_2 */
+&tpm5 {
+ status = "okay";
+};
+
+/* Lino PWM_3 */
+&tpm6 {
+ status = "okay";
+};
+
+/* Lino USB_1 */
+&usbotg1 {
+ status = "okay";
+};
+
+/* Lino USB_2 */
+&usbotg2 {
+ status = "okay";
+};
+
+/* Lino SD_1 */
+&usdhc2 {
+ status = "okay";
+};
+
+/* Verdin CTRL_WAKE1_MICO# */
+&verdin_gpio_keys {
+ status = "okay";
+};
+
+/* Verdin I2C_1 */
+&verdin_i2c_1 {
+ status = "okay";
+
+ nau8822_1a: audio-codec@1a {
+ compatible = "nuvoton,nau8822";
+ reg = <0x1a>;
+ clock-names = "mclk";
+ clocks = <&verdin_i2s1_mclk>;
+ #sound-dai-cells = <0>;
+ };
+
+ carrier_gpio_expander: gpio@21 {
+ compatible = "nxp,pcal6416";
+ reg = <0x21>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ };
+
+ /* Current measurement into module VCC */
+ hwmon@40 {
+ compatible = "ti,ina219";
+ reg = <0x40>;
+ shunt-resistor = <10000>;
+ };
+
+ temperature-sensor@4f {
+ compatible = "ti,tmp75c";
+ reg = <0x4f>;
+ };
+
+ carrier_eeprom: eeprom@57 {
+ compatible = "st,24c02", "atmel,24c02";
+ reg = <0x57>;
+ pagesize = <16>;
+ };
+};
+
+/* Verdin PCIE_1_RESET# */
+&verdin_pcie_1_reset_hog {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx93-imx91-toradex-osm-common.dtsi b/arch/arm64/boot/dts/freescale/imx93-imx91-toradex-osm-common.dtsi
new file mode 100644
index 000000000000..8b0131d4e6e2
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx93-imx91-toradex-osm-common.dtsi
@@ -0,0 +1,526 @@
+// SPDX-License-Identifier: GPL-2.0-only OR MIT
+/*
+ * Copyright (c) Toradex
+ *
+ * Toradex OSM iMX93/iMX91 SoM
+ *
+ * https://www.toradex.com/computer-on-modules/osm-arm-family/nxp-imx93
+ * https://www.toradex.com/computer-on-modules/osm-arm-family/nxp-imx91
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+
+/ {
+ aliases {
+ can0 = &flexcan1;
+ can1 = &flexcan2;
+ eeprom0 = &som_eeprom;
+ ethernet0 = &eqos;
+ ethernet1 = &fec;
+ i2c0 = &lpi2c2;
+ i2c1 = &lpi2c3;
+ i2c2 = &lpi2c1;
+ mmc0 = &usdhc1;
+ mmc1 = &usdhc2;
+ mmc2 = &usdhc3;
+ rtc0 = &rtc_i2c;
+ rtc1 = &bbnsm_rtc;
+ serial0 = &lpuart1;
+ serial1 = &lpuart6;
+ serial2 = &lpuart7;
+ serial3 = &lpuart2;
+ usb0 = &usbotg1;
+ usb1 = &usbotg2;
+ };
+
+ chosen {
+ stdout-path = &lpuart1;
+ };
+
+ reg_sdio_a_vmmc: regulator-sdhci2-vmmc {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sdio_a_pwr_en>;
+ /* OSM SDIO_A_PWR_EN (OSM D21) */
+ gpios = <&gpio3 7 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ off-on-delay-us = <100000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-name = "SDIO_A_PWR_EN";
+ startup-delay-us = <20000>;
+ };
+
+ reg_sdio_a_vqmmc: regulator-sdhci2-vqmmc {
+ compatible = "regulator-gpio";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sdio_a_vsel>;
+ /* PMIC_SD_2_VSEL */
+ gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <1800000>;
+ regulator-name = "LDO1-VSEL-SD (PMIC)";
+ states = <1800000 0x1>,
+ <3300000 0x0>;
+ vin-supply = <&reg_sd_3v3_1v8>;
+ };
+
+ reg_usb_b_vbus: regulator-usb2-vbus {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb_b_en>;
+ /* OSM USB_B_EN (OSM AC20) */
+ gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ regulator-max-microvolt = <5000000>;
+ regulator-min-microvolt = <5000000>;
+ regulator-name = "USB_B_EN";
+ startup-delay-us = <20000>;
+ };
+};
+
+/* OSM ADC_0, ADC_1 */
+&adc1 {
+ vref-supply = <&reg_1v8>;
+};
+
+/* OSM ETH_A */
+&eqos {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_mdio>, <&pinctrl_eth_a>;
+
+ mdio: mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ status = "disabled";
+ };
+};
+
+/* OSM ETH_B */
+&fec {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_eth_b>;
+};
+
+/* OSM CAN_A */
+&flexcan1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_can_a>;
+};
+
+/* OSM CAN_B */
+&flexcan2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_can_b>;
+};
+
+&gpio1 {
+ gpio-line-names =
+ "OSM_AA20",
+ "OSM_AA21",
+ "PMIC_I2C_SCL",
+ "PMIC_I2C_SDA",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "OSM_AC20", /* 10 */
+ "OSM_AA23",
+ "",
+ "",
+ "",
+ "";
+};
+
+&gpio2 {
+ gpio-line-names =
+ "OSM_D17",
+ "OSM_E17",
+ "OSM_F17",
+ "OSM_G17",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "", /* 10 */
+ "",
+ "OSM_Y15",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "", /* 20 */
+ "",
+ "OSM_H17",
+ "",
+ "OSM_J17",
+ "",
+ "",
+ "",
+ "OSM_AA16",
+ "OSM_AA15";
+};
+
+&gpio3 {
+ gpio-line-names =
+ "OSM_J21",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "OSM_D21",
+ "",
+ "",
+ "", /* 10 */
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "PMIC_SD_2_VSEL",
+ "", /* 20 */
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "CTRL_INT#",
+ "",
+ "",
+ "", /* 30 */
+ "";
+};
+
+&gpio4 {
+ gpio-line-names =
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "", /* 10 */
+ "",
+ "",
+ "",
+ "OSM_K17",
+ "OSM_L17",
+ "",
+ "",
+ "",
+ "",
+ "", /* 20 */
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "OSM_AC16",
+ "OSM_AC15";
+};
+
+/* OSM I2C_B */
+&lpi2c1 {
+ pinctrl-names = "default", "gpio";
+ pinctrl-0 = <&pinctrl_i2c_b>;
+ pinctrl-1 = <&pinctrl_i2c_b_gpio>;
+ clock-frequency = <100000>;
+ scl-gpios = <&gpio1 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ sda-gpios = <&gpio1 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ single-master;
+
+ status = "okay";
+
+ rtc_i2c: rtc@32 {
+ compatible = "epson,rx8130";
+ reg = <0x32>;
+ };
+};
+
+/* On-module I2C - PMIC_I2C */
+&lpi2c2 {
+ pinctrl-names = "default", "gpio";
+ pinctrl-0 = <&pinctrl_pmic_i2c>, <&pinctrl_ctrl_int>;
+ pinctrl-1 = <&pinctrl_pmic_i2c_gpio>, <&pinctrl_ctrl_int>;
+ clock-frequency = <400000>;
+ scl-gpios = <&gpio1 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ sda-gpios = <&gpio1 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ single-master;
+
+ status = "okay";
+
+ som_gpio_expander: gpio@21 {
+ compatible = "nxp,pcal6416";
+ reg = <0x21>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ interrupt-parent = <&gpio3>;
+ interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-line-names =
+ "OSM_D19", /* OSM GPIO_B_0 */
+ "OSM_E19", /* OSM GPIO_B_1 */
+ "OSM_F19", /* OSM GPIO_B_2 */
+ "OSM_G19", /* OSM GPIO_B_3 */
+ "OSM_H19", /* OSM GPIO_B_4 */
+ "OSM_J19", /* OSM GPIO_B_5 */
+ "OSM_K19", /* OSM GPIO_B_6 */
+ "OSM_L19", /* OSM GPIO_B_7 */
+ "OSM_D3", /* OSM GPIO_C_0 */
+ "OSM_D4", /* OSM GPIO_C_1 */
+ "OSM_E3", /* OSM GPIO_C_2/CAM_B_PWR */
+ "OSM_E4", /* OSM GPIO_C_3/CAM_B_RST# */
+ "OSM_F3", /* OSM GPIO_C_4/DISP_VDD_EN */
+ "OSM_F4", /* OSM GPIO_C_5/DISP_BL_EN */
+ "OSM_G3", /* OSM GPIO_C_6/CAM_A_PWR */
+ "OSM_G4"; /* OSM GPIO_C_7/CAM_A_RST# */
+ };
+
+ tpm@2e {
+ compatible = "st,st33ktpm2xi2c", "tcg,tpm-tis-i2c";
+ reg = <0x2e>;
+ };
+
+ pmic@32 {
+ compatible = "nxp,pf9453";
+ reg = <0x32>;
+ interrupt-parent = <&gpio3>;
+ interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
+
+ regulators {
+ BUCK1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1100000>;
+ regulator-min-microvolt = <1100000>;
+ regulator-name = "+V1.1_DDR (PMIC BUCK1)";
+ };
+
+ reg_vdd_soc: BUCK2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <950000>;
+ regulator-min-microvolt = <612500>;
+ regulator-name = "+VDD_SOC (PMIC BUCK2)";
+ regulator-ramp-delay = <12500>;
+ };
+
+ reg_1v8: BUCK3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1800000>;
+ regulator-min-microvolt = <1800000>;
+ regulator-name = "+V1.8 / +V1.8_ANA (PMIC BUCK3)";
+ };
+
+ reg_3v3: BUCK4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-name = "+V3.3 (PMIC BUCK4)";
+ };
+
+ reg_sd_3v3_1v8: LDO1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <1800000>;
+ regulator-name = "+V3.3_1.8_SD (PMIC LDO1)";
+ };
+
+ LDO2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <800000>;
+ regulator-min-microvolt = <800000>;
+ regulator-name = "+V0.8_ANA (PMIC LDO2)";
+ };
+
+ LDO-SNVS {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1800000>;
+ regulator-min-microvolt = <1800000>;
+ regulator-name = "+V1.8_BBSM (PMIC LDO-SNVS)";
+ };
+ };
+ };
+
+ temperature-sensor@48 {
+ compatible = "ti,tmp1075";
+ reg = <0x48>;
+ };
+
+ som_eeprom: eeprom@50 {
+ compatible = "st,24c02", "atmel,24c02";
+ reg = <0x50>;
+ pagesize = <16>;
+ };
+};
+
+/* OSM I2C_A */
+&lpi2c3 {
+ pinctrl-names = "default", "gpio";
+ pinctrl-0 = <&pinctrl_i2c_a>;
+ pinctrl-1 = <&pinctrl_i2c_a_gpio>;
+ clock-frequency = <100000>;
+ scl-gpios = <&gpio2 29 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ sda-gpios = <&gpio2 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ single-master;
+};
+
+/* OSM SPI_B */
+&lpspi1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi_b>, <&pinctrl_spi_b_cs0_gpio>;
+ cs-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
+};
+
+/* OSM SPI_A */
+&lpspi8 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi_a>, <&pinctrl_spi_a_cs0_gpio>;
+ cs-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
+};
+
+/* OSM UART_CON, used as the Linux Console */
+&lpuart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart_con>;
+};
+
+/* OSM UART_C */
+&lpuart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart_c>;
+};
+
+/* OSM UART_A */
+&lpuart6 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart_a>;
+ uart-has-rtscts;
+};
+
+/* OSM UART_B */
+&lpuart7 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart_b>;
+ uart-has-rtscts;
+};
+
+/* OSM I2S_A */
+&sai3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2s_a>;
+ assigned-clocks = <&clk IMX93_CLK_SAI3>;
+ assigned-clock-parents = <&clk IMX93_CLK_AUDIO_PLL>;
+ assigned-clock-rates = <12288000>;
+ fsl,sai-mclk-direction-output;
+};
+
+/* OSM PWM_0 */
+&tpm4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm0>;
+};
+
+/* OSM PWM_1 */
+&tpm5 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm1>;
+};
+
+/* OSM PWM_2 */
+&tpm6 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm2>;
+};
+
+/* OSM USB_A */
+&usbotg1 {
+ dr_mode = "otg";
+ adp-disable;
+ hnp-disable;
+ srp-disable;
+ usb-role-switch;
+ disable-over-current;
+ role-switch-default-mode = "peripheral";
+ samsung,picophy-dc-vol-level-adjust = <7>;
+ samsung,picophy-pre-emp-curr-control = <3>;
+};
+
+/* OSM USB_B */
+&usbotg2 {
+ disable-over-current;
+ dr_mode = "host";
+ vbus-supply = <&reg_usb_b_vbus>;
+ samsung,picophy-dc-vol-level-adjust = <7>;
+ samsung,picophy-pre-emp-curr-control = <3>;
+};
+
+/* On-module eMMC */
+&usdhc1 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_emmc>;
+ pinctrl-1 = <&pinctrl_emmc>;
+ pinctrl-2 = <&pinctrl_emmc>;
+ no-sd;
+ no-sdio;
+ non-removable;
+
+ status = "okay";
+};
+
+/* OSM SDIO_A */
+&usdhc2 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_sdio_a>, <&pinctrl_sdio_a_cd>;
+ pinctrl-1 = <&pinctrl_sdio_a>, <&pinctrl_sdio_a_cd>;
+ pinctrl-2 = <&pinctrl_sdio_a>, <&pinctrl_sdio_a_cd>;
+ cd-gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
+ disable-wp;
+ vmmc-supply = <&reg_sdio_a_vmmc>;
+ vqmmc-supply = <&reg_sdio_a_vqmmc>;
+};
+
+/* OSM SDIO_B */
+&usdhc3 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_sdio_b>;
+ pinctrl-1 = <&pinctrl_sdio_b>;
+ pinctrl-2 = <&pinctrl_sdio_b>;
+ disable-wp;
+};
+
+&wdog3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_wdog>;
+ fsl,ext-reset-output;
+
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx93-imx91-toradex-osm-dev-common.dtsi b/arch/arm64/boot/dts/freescale/imx93-imx91-toradex-osm-dev-common.dtsi
new file mode 100644
index 000000000000..566671b32308
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx93-imx91-toradex-osm-dev-common.dtsi
@@ -0,0 +1,324 @@
+// SPDX-License-Identifier: GPL-2.0-only OR MIT
+/*
+ * Copyright (c) Toradex
+ *
+ * Toradex OSM iMX93/iMX91 SoM on OSM Development carrier board
+ *
+ * https://www.toradex.com/computer-on-modules/osm-arm-family/nxp-imx93
+ * https://www.toradex.com/computer-on-modules/osm-arm-family/nxp-imx91
+ * https://www.toradex.com/products/carrier-board/osm-development-board
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/net/ti-dp83867.h>
+#include <dt-bindings/usb/pd.h>
+
+/ {
+ aliases {
+ eeprom1 = &carrier_eeprom;
+ };
+
+ reg_carrier_1p8v: regulator-carrier-1p8v {
+ compatible = "regulator-fixed";
+ regulator-max-microvolt = <1800000>;
+ regulator-min-microvolt = <1800000>;
+ regulator-name = "On-carrier V1.8_SW";
+ };
+
+ sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,bitclock-master = <&codec_dai>;
+ simple-audio-card,format = "i2s";
+ simple-audio-card,frame-master = <&codec_dai>;
+ simple-audio-card,mclk-fs = <256>;
+ simple-audio-card,name = "verdin-wm8904";
+ simple-audio-card,routing =
+ "Headphone Jack", "HPOUTL",
+ "Headphone Jack", "HPOUTR",
+ "IN2L", "Line In Jack",
+ "IN2R", "Line In Jack",
+ "Microphone Jack", "MICBIAS",
+ "IN1L", "Microphone Jack";
+ simple-audio-card,widgets =
+ "Microphone", "Microphone Jack",
+ "Headphone", "Headphone Jack",
+ "Line", "Line In Jack";
+
+ codec_dai: simple-audio-card,codec {
+ sound-dai = <&wm8904_1a>;
+ };
+
+ simple-audio-card,cpu {
+ sound-dai = <&sai3>;
+ };
+ };
+};
+
+/* OSM ADC_0, ADC_1 */
+&adc1 {
+ status = "okay";
+};
+
+/* OSM ETH_A */
+&eqos {
+ phy-handle = <&ethphy_a>;
+ phy-mode = "rgmii-id";
+
+ status = "okay";
+};
+
+/* OSM ETH_B */
+&fec {
+ phy-handle = <&ethphy_b>;
+ phy-mode = "rgmii-id";
+
+ status = "okay";
+};
+
+/* OSM CAN_A */
+&flexcan1 {
+ status = "okay";
+};
+
+/* OSM CAN_B */
+&flexcan2 {
+ status = "okay";
+};
+
+&gpio2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio_a1>, <&pinctrl_gpio_a2>, <&pinctrl_gpio_a3>,
+ <&pinctrl_gpio_a4>, <&pinctrl_gpio_a5>;
+};
+
+&gpio4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio_a6>;
+};
+
+/* OSM I2C_B */
+&lpi2c1 {
+ i2c-mux@70 {
+ compatible = "nxp,pca9548";
+ reg = <0x70>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ i2c_csi: i2c@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c_lvds: i2c@1 {
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ /* I2C on DSI connector pin #4 and #6 */
+ i2c_dsi_1: i2c@2 {
+ reg = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ /* I2C on DSI connector pin #52 and #54 */
+ i2c_dsi_2: i2c@3 {
+ reg = <3>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+};
+
+/* OSM I2C_A */
+&lpi2c3 {
+ status = "okay";
+
+ wm8904_1a: audio-codec@1a {
+ compatible = "wlf,wm8904";
+ reg = <0x1a>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2s_a_mclk>;
+ clocks = <&clk IMX93_CLK_SAI3>;
+ clock-names = "mclk";
+ #sound-dai-cells = <0>;
+ AVDD-supply = <&reg_carrier_1p8v>;
+ CPVDD-supply = <&reg_carrier_1p8v>;
+ DBVDD-supply = <&reg_carrier_1p8v>;
+ DCVDD-supply = <&reg_carrier_1p8v>;
+ MICVDD-supply = <&reg_carrier_1p8v>;
+ };
+
+ gpio@20 {
+ compatible = "nxp,pcal6408";
+ reg = <0x20>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-line-names =
+ "PWR_CTRL_CAN_A", /* 0 */
+ "PWR_CTRL_CAN_B",
+ "PWR_CTRL_USB-HUB",
+ "LVDS_MUX_CTRL",
+ "USB_MUX_CTRL",
+ "I2CA_IOEXP_P5",
+ "I2CA_IOEXP_P6",
+ "I2CA_IOEXP_P7";
+
+ lvds_mux_ctrl: lvds-mux-ctrl-hog {
+ gpio-hog;
+ gpios = <3 GPIO_ACTIVE_HIGH>;
+ line-name = "LVDS_MUX_CTRL";
+ output-high;
+ };
+
+ usb_mux_ctrl: usb-mux-ctrl-hog {
+ gpio-hog;
+ gpios = <4 GPIO_ACTIVE_HIGH>;
+ line-name = "USB_MUX_CTRL";
+ output-low;
+ };
+ };
+
+ hwmon@40 {
+ compatible = "ti,ina219";
+ reg = <0x40>;
+ shunt-resistor = <10000>;
+ };
+
+ temperature-sensor@4f {
+ compatible = "ti,tmp1075";
+ reg = <0x4f>;
+ };
+
+ tcpc@52 {
+ compatible = "nxp,ptn5110", "tcpci";
+ reg = <0x52>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio_a0>;
+ interrupt-parent = <&gpio2>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+
+ connector {
+ compatible = "usb-c-connector";
+ label = "USB_A";
+ data-role = "dual";
+ power-role = "dual";
+ try-power-role = "sink";
+ self-powered;
+ source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
+ sink-pdos = <PDO_FIXED(5000, 0, PDO_FIXED_USB_COMM)>;
+ op-sink-microwatt = <0>;
+
+ port {
+ usb_c_a_conn_hs: endpoint {
+ remote-endpoint = <&usb_a_hs>;
+ };
+ };
+ };
+ };
+
+ carrier_eeprom: eeprom@57 {
+ compatible = "st,24c02", "atmel,24c02";
+ reg = <0x57>;
+ pagesize = <16>;
+ };
+};
+
+/* OSM SPI_B */
+&lpspi1 {
+ status = "okay";
+};
+
+/* OSM SPI_A */
+&lpspi8 {
+ status = "okay";
+};
+
+/* OSM UART_CON, used as the Linux Console */
+&lpuart1 {
+ status = "okay";
+};
+
+/* OSM UART_C */
+&lpuart2 {
+ status = "okay";
+};
+
+/* OSM UART_A */
+&lpuart6 {
+ status = "okay";
+};
+
+/* OSM UART_B */
+&lpuart7 {
+ status = "okay";
+};
+
+/* OSM ETH_MDIO */
+&mdio {
+ status = "okay";
+
+ ethphy_a: ethernet-phy@2 {
+ reg = <2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio_a7>;
+ interrupt-parent = <&gpio4>;
+ interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
+ ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
+ ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
+ };
+
+ ethphy_b: ethernet-phy@3 {
+ reg = <3>;
+ ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
+ ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
+ };
+};
+
+/* OSM I2S_A */
+&sai3 {
+ status = "okay";
+};
+
+/* OSM PWM_0 */
+&tpm4 {
+ status = "okay";
+};
+
+/* OSM PWM_1 */
+&tpm5 {
+ status = "okay";
+};
+
+/* OSM PWM_2 */
+&tpm6 {
+ status = "okay";
+};
+
+/* OSM USB_A */
+&usbotg1 {
+ status = "okay";
+
+ port {
+ usb_a_hs: endpoint {
+ remote-endpoint = <&usb_c_a_conn_hs>;
+ };
+ };
+};
+
+/* OSM USB_B */
+&usbotg2 {
+ status = "okay";
+};
+
+/* OSM SDIO_A */
+&usdhc2 {
+ status = "okay";
+};
+
+/* OSM SDIO_B */
+&usdhc3 {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx93-lino-verdin-dahlia.dts b/arch/arm64/boot/dts/freescale/imx93-lino-verdin-dahlia.dts
new file mode 100644
index 000000000000..c708a2e18c90
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx93-lino-verdin-dahlia.dts
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: GPL-2.0-only OR MIT
+/*
+ * Copyright (c) Toradex
+ *
+ * Lino iMX93 SoM on Lino-Verdin Adapter / Dahlia carrier board
+ *
+ * https://www.toradex.com/computer-on-modules/lino-arm-family/nxp-imx93
+ * https://www.toradex.com/products/carrier-board/dahlia-carrier-board-kit
+ */
+
+/dts-v1/;
+
+#include "imx93.dtsi"
+#include "imx93-lino.dtsi"
+#include "imx93-imx91-lino-verdin-common.dtsi"
+#include "imx93-imx91-lino-verdin-dahlia-common.dtsi"
+
+/ {
+ model = "Toradex Lino iMX93 on Verdin Adapter plus Dahlia Board";
+ compatible = "toradex,lino-imx93-verdin-dahlia",
+ "toradex,lino-imx93-verdin",
+ "toradex,lino-imx93",
+ "fsl,imx93";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx93-lino-verdin-dev.dts b/arch/arm64/boot/dts/freescale/imx93-lino-verdin-dev.dts
new file mode 100644
index 000000000000..a79553d94649
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx93-lino-verdin-dev.dts
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: GPL-2.0-only OR MIT
+/*
+ * Copyright (c) Toradex
+ *
+ * Lino iMX93 SoM on Lino-Verdin Adapter / Development carrier board
+ *
+ * https://www.toradex.com/computer-on-modules/lino-arm-family/nxp-imx93
+ * https://www.toradex.com/products/carrier-board/verdin-development-board-kit
+ */
+
+/dts-v1/;
+
+#include "imx93.dtsi"
+#include "imx93-lino.dtsi"
+#include "imx93-imx91-lino-verdin-common.dtsi"
+#include "imx93-imx91-lino-verdin-dev-common.dtsi"
+
+/ {
+ model = "Toradex Lino iMX93 on Verdin Adapter plus Development Board";
+ compatible = "toradex,lino-imx93-verdin-dev",
+ "toradex,lino-imx93-verdin",
+ "toradex,lino-imx93",
+ "fsl,imx93";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx93-lino.dtsi b/arch/arm64/boot/dts/freescale/imx93-lino.dtsi
new file mode 100644
index 000000000000..cab7f344f2fe
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx93-lino.dtsi
@@ -0,0 +1,359 @@
+// SPDX-License-Identifier: GPL-2.0-only OR MIT
+/*
+ * Copyright (c) Toradex
+ *
+ * Lino iMX93 SoM
+ *
+ * https://www.toradex.com/computer-on-modules/lino-arm-family/nxp-imx93
+ */
+
+#include "imx93-pinfunc.h"
+#include "imx93-imx91-lino-common.dtsi"
+
+/ {
+ reserved-memory {
+ ranges;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ rsc_table: rsc-table@2021e000 {
+ reg = <0 0x2021e000 0 0x1000>;
+ no-map;
+ };
+
+ vdev0vring0: vdev0vring0@a4000000 {
+ reg = <0 0xa4000000 0 0x8000>;
+ no-map;
+ };
+
+ vdev0vring1: vdev0vring1@a4008000 {
+ reg = <0 0xa4008000 0 0x8000>;
+ no-map;
+ };
+
+ vdev1vring0: vdev1vring0@a4010000 {
+ reg = <0 0xa4010000 0 0x8000>;
+ no-map;
+ };
+
+ vdev1vring1: vdev1vring1@a4018000 {
+ reg = <0 0xa4018000 0 0x8000>;
+ no-map;
+ };
+
+ vdev0buffer: vdev0buffer@a4020000 {
+ compatible = "shared-dma-pool";
+ reg = <0 0xa4020000 0 0x100000>;
+ no-map;
+ };
+ };
+};
+
+&cm33 {
+ mbox-names = "tx", "rx", "rxdb";
+ mboxes = <&mu1 0 1>,
+ <&mu1 1 1>,
+ <&mu1 3 1>;
+ memory-region = <&vdev0buffer>, <&vdev0vring0>, <&vdev0vring1>,
+ <&vdev1vring0>, <&vdev1vring1>, <&rsc_table>;
+
+ status = "okay";
+};
+
+&mu1 {
+ status = "okay";
+};
+
+&iomuxc {
+ /* Lino CAN_1 */
+ pinctrl_can1: can1grp {
+ fsl,pins = <MX93_PAD_PDM_BIT_STREAM0__CAN1_RX 0x139e>, /* Lino P12 */
+ <MX93_PAD_PDM_CLK__CAN1_TX 0x139e>; /* Lino P10 */
+ };
+
+ /* Lino CAN_2 */
+ pinctrl_can2: can2grp {
+ fsl,pins = <MX93_PAD_GPIO_IO25__CAN2_TX 0x139e>, /* Lino S28 */
+ <MX93_PAD_GPIO_IO27__CAN2_RX 0x139e>; /* Lino S30 */
+ };
+
+ /* Lino ETH_1 RGMII */
+ pinctrl_eth1: eqosgrp {
+ fsl,pins = <MX93_PAD_ENET1_RD0__ENET_QOS_RGMII_RD0 0x1fe>, /* Lino P77 */
+ <MX93_PAD_ENET1_RD1__ENET_QOS_RGMII_RD1 0x1fe>, /* Lino P79 */
+ <MX93_PAD_ENET1_RD2__ENET_QOS_RGMII_RD2 0x1fe>, /* Lino P81 */
+ <MX93_PAD_ENET1_RD3__ENET_QOS_RGMII_RD3 0x1fe>, /* Lino P83 */
+ <MX93_PAD_ENET1_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x1fe>, /* Lino P73 */
+ <MX93_PAD_ENET1_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x1fe>, /* Lino P75 */
+ <MX93_PAD_ENET1_TD0__ENET_QOS_RGMII_TD0 0x1fe>, /* Lino P97 */
+ <MX93_PAD_ENET1_TD1__ENET_QOS_RGMII_TD1 0x1fe>, /* Lino P95 */
+ <MX93_PAD_ENET1_TD2__ENET_QOS_RGMII_TD2 0x1fe>, /* Lino P93 */
+ <MX93_PAD_ENET1_TD3__ENET_QOS_RGMII_TD3 0x1fe>, /* Lino P91 */
+ <MX93_PAD_ENET1_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x1fe>, /* Lino P89 */
+ <MX93_PAD_ENET1_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x1fe>; /* Lino P85 */
+ };
+
+ /* Lino ETH MDIO */
+ pinctrl_mdio: eqosmdiogrp {
+ fsl,pins = <MX93_PAD_ENET1_MDC__ENET_QOS_MDC 0x1fe>, /* Lino P69 */
+ <MX93_PAD_ENET1_MDIO__ENET_QOS_MDIO 0x1fe>; /* Lino P67 */
+ };
+
+ /* Lino ETH_2 RGMII */
+ pinctrl_eth2: fecgrp {
+ fsl,pins = <MX93_PAD_ENET2_RD0__ENET1_RGMII_RD0 0x1fe>, /* Lino S77 */
+ <MX93_PAD_ENET2_RD1__ENET1_RGMII_RD1 0x1fe>, /* Lino S79 */
+ <MX93_PAD_ENET2_RD2__ENET1_RGMII_RD2 0x1fe>, /* Lino S81 */
+ <MX93_PAD_ENET2_RD3__ENET1_RGMII_RD3 0x1fe>, /* Lino S83 */
+ <MX93_PAD_ENET2_RXC__ENET1_RGMII_RXC 0x1fe>, /* Lino S71 */
+ <MX93_PAD_ENET2_RX_CTL__ENET1_RGMII_RX_CTL 0x1fe>, /* Lino S73 */
+ <MX93_PAD_ENET2_TD0__ENET1_RGMII_TD0 0x1fe>, /* Lino S99 */
+ <MX93_PAD_ENET2_TD1__ENET1_RGMII_TD1 0x1fe>, /* Lino S97 */
+ <MX93_PAD_ENET2_TD2__ENET1_RGMII_TD2 0x1fe>, /* Lino S93 */
+ <MX93_PAD_ENET2_TD3__ENET1_RGMII_TD3 0x1fe>, /* Lino S91 */
+ <MX93_PAD_ENET2_TXC__ENET1_RGMII_TXC 0x1fe>, /* Lino S87 */
+ <MX93_PAD_ENET2_TX_CTL__ENET1_RGMII_TX_CTL 0x1fe>; /* Lino S89 */
+ };
+
+ /* Lino GPIO_11 */
+ pinctrl_gpio_11: gpio1io10grp {
+ fsl,pins = <MX93_PAD_PDM_BIT_STREAM1__GPIO1_IO10 0x139e>; /* Lino P65 */
+ };
+
+ /* Lino SPI_2_CS as GPIO */
+ pinctrl_spi2_cs0_gpio: gpio1io11grp {
+ fsl,pins = <MX93_PAD_SAI1_TXFS__GPIO1_IO11 0x139e>; /* Lino S18 */
+ };
+
+ /* Lino GPIO_1 */
+ pinctrl_gpio1: gpio2io0grp {
+ fsl,pins = <MX93_PAD_GPIO_IO00__GPIO2_IO00 0x139e>; /* Lino P30 */
+ };
+
+ /* Lino GPIO_2 */
+ pinctrl_gpio2: gpio2io1grp {
+ fsl,pins = <MX93_PAD_GPIO_IO01__GPIO2_IO01 0x139e>; /* Lino P32 */
+ };
+
+ /* Lino SPI_1_CS as GPIO */
+ pinctrl_spi1_cs0_gpio: gpio2io12grp {
+ fsl,pins = <MX93_PAD_GPIO_IO12__GPIO2_IO12 0x139e>; /* Lino P58 */
+ };
+
+ /* Lino GPIO_3 */
+ pinctrl_gpio3: gpio2io17grp {
+ fsl,pins = <MX93_PAD_GPIO_IO17__GPIO2_IO17 0x139e>; /* Lino P34 */
+ };
+
+ /* Lino GPIO_4 */
+ pinctrl_gpio4: gpio2io22grp {
+ fsl,pins = <MX93_PAD_GPIO_IO22__GPIO2_IO22 0x139e>; /* Lino P36 */
+ };
+
+ /* Lino PWM_3 as GPIO */
+ pinctrl_pwm3_gpio: gpio2io23grp {
+ fsl,pins = <MX93_PAD_GPIO_IO23__GPIO2_IO23 0x139e>; /* Lino P5 */
+ };
+
+ /* Lino GPIO_5 */
+ pinctrl_gpio5: gpio2io24grp {
+ fsl,pins = <MX93_PAD_GPIO_IO24__GPIO2_IO24 0x139e>; /* Lino P38 */
+ };
+
+ /* Lino GPIO_6 */
+ pinctrl_gpio6: gpio3io26grp {
+ fsl,pins = <MX93_PAD_CCM_CLKO1__GPIO3_IO26 0x139e>; /* Lino P40 */
+ };
+
+ /* Lino GPIO_7 */
+ pinctrl_gpio7: gpio3io27grp {
+ fsl,pins = <MX93_PAD_CCM_CLKO2__GPIO3_IO27 0x139e>; /* Lino P42 */
+ };
+
+ /* Lino GPIO_9 */
+ pinctrl_gpio9: gpio4io14grp {
+ fsl,pins = <MX93_PAD_ENET2_MDC__GPIO4_IO14 0x139e>; /* Lino P46 */
+ };
+
+ /* Lino GPIO_10 */
+ pinctrl_gpio10: gpio4io15grp {
+ fsl,pins = <MX93_PAD_ENET2_MDIO__GPIO4_IO15 0x139e>; /* Lino P48 */
+ };
+
+ /* Lino GPIO_8 */
+ pinctrl_gpio8: gpio4io28grp {
+ fsl,pins = <MX93_PAD_CCM_CLKO3__GPIO4_IO28 0x139e>; /* Lino P44 */
+ };
+
+ /* On-module GPIO_EXP_INT# */
+ pinctrl_gpio_exp_int: gpio4io29grp {
+ fsl,pins = <MX93_PAD_CCM_CLKO4__GPIO4_IO29 0x139e>; /* GPIO_EXP_INT# */
+ };
+
+ /* Lino I2C_1 as GPIO */
+ pinctrl_i2c1_gpio: lpi2c1gpiogrp {
+ fsl,pins = <MX93_PAD_I2C1_SCL__GPIO1_IO00 0x40000b9e>, /* Lino P18 */
+ <MX93_PAD_I2C1_SDA__GPIO1_IO01 0x40000b9e>; /* Lino P16 */
+ };
+
+ /* Lino I2C_1 */
+ pinctrl_i2c1: lpi2c1grp {
+ fsl,pins = <MX93_PAD_I2C1_SCL__LPI2C1_SCL 0x40000b9e>, /* Lino P18 */
+ <MX93_PAD_I2C1_SDA__LPI2C1_SDA 0x40000b9e>; /* Lino P16 */
+ };
+
+ /* On-module PMIC I2C as GPIO */
+ pinctrl_pmic_i2c_gpio: lpi2c2gpiogrp {
+ fsl,pins = <MX93_PAD_I2C2_SCL__GPIO1_IO02 0x40000b9e>, /* PMIC_I2C_SCL */
+ <MX93_PAD_I2C2_SDA__GPIO1_IO03 0x40000b9e>; /* PMIC_I2C_SDA */
+ };
+
+ /* On-module PMIC I2C */
+ pinctrl_pmic_i2c: lpi2c2grp {
+ fsl,pins = <MX93_PAD_I2C2_SCL__LPI2C2_SCL 0x40000b9e>, /* PMIC_I2C_SCL */
+ <MX93_PAD_I2C2_SDA__LPI2C2_SDA 0x40000b9e>; /* PMIC_I2C_SDA */
+ };
+
+ /* Lino I2C_2 as GPIO */
+ pinctrl_i2c2_gpio: lpi2c3gpiogrp {
+ fsl,pins = <MX93_PAD_GPIO_IO28__GPIO2_IO28 0x40000b9e>, /* Lino P20 */
+ <MX93_PAD_GPIO_IO29__GPIO2_IO29 0x40000b9e>; /* Lino P22 */
+ };
+
+ /* Lino I2C_2 */
+ pinctrl_i2c2: lpi2c3grp {
+ fsl,pins = <MX93_PAD_GPIO_IO28__LPI2C3_SDA 0x40000b9e>, /* Lino P20 */
+ <MX93_PAD_GPIO_IO29__LPI2C3_SCL 0x40000b9e>; /* Lino P22 */
+ };
+
+ /* Lino I2C_3 as GPIO */
+ pinctrl_i2c3_gpio: lpi2c4gpiogrp {
+ fsl,pins = <MX93_PAD_GPIO_IO02__GPIO2_IO02 0x40000b9e>, /* Lino P24 */
+ <MX93_PAD_GPIO_IO03__GPIO2_IO03 0x40000b9e>; /* Lino P26 */
+ };
+
+ /* Lino I2C_3 */
+ pinctrl_i2c3: lpi2c4grp {
+ fsl,pins = <MX93_PAD_GPIO_IO02__LPI2C4_SDA 0x40000b9e>, /* Lino P24 */
+ <MX93_PAD_GPIO_IO03__LPI2C4_SCL 0x40000b9e>; /* Lino P26 */
+ };
+
+ /* Lino SPI_2 */
+ pinctrl_spi2: lpspi1grp {
+ fsl,pins = <MX93_PAD_SAI1_TXD0__LPSPI1_SCK 0x139e>, /* Lino S20 */
+ <MX93_PAD_SAI1_RXD0__LPSPI1_SOUT 0x139e>, /* Lino S22 */
+ <MX93_PAD_SAI1_TXC__LPSPI1_SIN 0x139e>; /* Lino S24 */
+ };
+
+ /* Lino SPI_1 */
+ pinctrl_spi1: lpspi8grp {
+ fsl,pins = <MX93_PAD_GPIO_IO13__LPSPI8_SIN 0x139e>, /* Lino P54 */
+ <MX93_PAD_GPIO_IO14__LPSPI8_SOUT 0x139e>, /* Lino P56 */
+ <MX93_PAD_GPIO_IO15__LPSPI8_SCK 0x139e>; /* Lino P52 */
+ };
+
+ /* Lino UART_3 */
+ pinctrl_uart3: lpuart1grp {
+ fsl,pins = <MX93_PAD_UART1_RXD__LPUART1_RX 0x39e>, /* Lino P17 */
+ <MX93_PAD_UART1_TXD__LPUART1_TX 0x39e>; /* Lino P19 */
+ };
+
+ /* Lino UART_4 */
+ pinctrl_uart4: lpuart2grp {
+ fsl,pins = <MX93_PAD_UART2_RXD__LPUART2_RX 0x39e>, /* Lino P23 */
+ <MX93_PAD_UART2_TXD__LPUART2_TX 0x39e>; /* Lino P25 */
+ };
+
+ /* Lino UART_1 */
+ pinctrl_uart1: lpuart6grp {
+ fsl,pins = <MX93_PAD_GPIO_IO04__LPUART6_TX 0x39e>, /* Lino P11 */
+ <MX93_PAD_GPIO_IO05__LPUART6_RX 0x39e>, /* Lino P9 */
+ <MX93_PAD_GPIO_IO06__LPUART6_CTS_B 0x39e>, /* Lino P8 */
+ <MX93_PAD_GPIO_IO07__LPUART6_RTS_B 0x39e>; /* Lino P6 */
+ };
+
+ /* Lino UART_2 */
+ pinctrl_uart2: lpuart7grp {
+ fsl,pins = <MX93_PAD_GPIO_IO08__LPUART7_TX 0x39e>, /* Lino P15 */
+ <MX93_PAD_GPIO_IO09__LPUART7_RX 0x39e>, /* Lino P13 */
+ <MX93_PAD_GPIO_IO10__LPUART7_CTS_B 0x39e>, /* Lino S7 */
+ <MX93_PAD_GPIO_IO11__LPUART7_RTS_B 0x39e>; /* Lino S5 */
+ };
+
+ /* Lino I2S_1 */
+ pinctrl_i2s1: sai3grp {
+ fsl,pins = <MX93_PAD_GPIO_IO16__SAI3_TX_BCLK 0x139e>, /* Lino S94 */
+ <MX93_PAD_GPIO_IO19__SAI3_TX_DATA00 0x139e>, /* Lino S98 */
+ <MX93_PAD_GPIO_IO20__SAI3_RX_DATA00 0x139e>, /* Lino S100 */
+ <MX93_PAD_GPIO_IO26__SAI3_TX_SYNC 0x139e>; /* Lino S96 */
+ };
+
+ /* Lino PWM_1 */
+ pinctrl_pwm1: tpm4ch1grp {
+ fsl,pins = <MX93_PAD_GPIO_IO21__TPM4_CH1 0x139e>; /* Lino P1 */
+ };
+
+ /* Lino PWM_2 */
+ pinctrl_pwm2: tpm5ch2grp {
+ fsl,pins = <MX93_PAD_GPIO_IO18__TPM5_CH2 0x139e>; /* Lino P3 */
+ };
+
+ /* Lino PWM_3 */
+ pinctrl_pwm3: tpm6ch1grp {
+ fsl,pins = <MX93_PAD_GPIO_IO23__TPM6_CH1 0x139e>; /* Lino P5 */
+ };
+
+ /* On-module eMMC */
+ pinctrl_emmc: usdhc1grp {
+ fsl,pins = <MX93_PAD_SD1_CLK__USDHC1_CLK 0x5fe>, /* eMMC_CLK */
+ <MX93_PAD_SD1_CMD__USDHC1_CMD 0x400013fe>, /* eMMC_CMD */
+ <MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x400013fe>, /* eMMC_DATA0 */
+ <MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x400013fe>, /* eMMC_DATA1 */
+ <MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x400013fe>, /* eMMC_DATA2 */
+ <MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x400013fe>, /* eMMC_DATA3 */
+ <MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x400013fe>, /* eMMC_DATA4 */
+ <MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x400013fe>, /* eMMC_DATA5 */
+ <MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x400013fe>, /* eMMC_DATA6 */
+ <MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x400013fe>, /* eMMC_DATA7 */
+ <MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x1580>; /* eMMC_STROBE */
+ };
+
+ /* Lino SD_1_CD# */
+ pinctrl_sd1_cd: usdhc2cdgrp {
+ fsl,pins = <MX93_PAD_SD2_CD_B__GPIO3_IO00 0x139e>; /* Lino P78 */
+ };
+
+ /* Lino SD_1 */
+ pinctrl_sd1: usdhc2grp {
+ fsl,pins = <MX93_PAD_SD2_CLK__USDHC2_CLK 0x5fe>, /* Lino P68 */
+ <MX93_PAD_SD2_CMD__USDHC2_CMD 0x400013fe>, /* Lino P66 */
+ <MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x400013fe>, /* Lino P74 */
+ <MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x400013fe>, /* Lino P76 */
+ <MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x400013fe>, /* Lino P60 */
+ <MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x400013fe>; /* Lino P64 */
+ };
+
+ /* Lino SD_1_PWR_EN */
+ pinctrl_sd1_pwr_en: usdhc2pwrgrp {
+ fsl,pins = <MX93_PAD_SD2_RESET_B__GPIO3_IO07 0x139e>; /* Lino P72 */
+ };
+
+ /* On-module PMIC_SD_2_VSEL */
+ pinctrl_sd1_vsel: usdhc2vselgrp {
+ fsl,pins = <MX93_PAD_SD2_VSELECT__GPIO3_IO19 0x51e>; /* PMIC_SD_2_VSEL */
+ };
+
+ /* Lino SD_2 */
+ pinctrl_sd2: usdhc3grp {
+ fsl,pins = <MX93_PAD_SD3_CLK__USDHC3_CLK 0x5fe>, /* Lino S10 */
+ <MX93_PAD_SD3_CMD__USDHC3_CMD 0x400013fe>, /* Lino S8 */
+ <MX93_PAD_SD3_DATA0__USDHC3_DATA0 0x400013fe>, /* Lino S12 */
+ <MX93_PAD_SD3_DATA1__USDHC3_DATA1 0x400013fe>, /* Lino S16 */
+ <MX93_PAD_SD3_DATA2__USDHC3_DATA2 0x400013fe>, /* Lino S2 */
+ <MX93_PAD_SD3_DATA3__USDHC3_DATA3 0x400013fe>; /* Lino S4 */
+ };
+
+ pinctrl_wdog: wdoggrp {
+ fsl,pins = <MX93_PAD_WDOG_ANY__WDOG1_WDOG_ANY 0x31e>; /* PMIC_WDOG_B */
+ };
+};
diff --git a/arch/arm64/boot/dts/freescale/imx93-toradex-osm-dev.dts b/arch/arm64/boot/dts/freescale/imx93-toradex-osm-dev.dts
new file mode 100644
index 000000000000..a6cc2ae35d04
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx93-toradex-osm-dev.dts
@@ -0,0 +1,22 @@
+// SPDX-License-Identifier: GPL-2.0-only OR MIT
+/*
+ * Copyright (c) Toradex
+ *
+ * Toradex OSM iMX93 SoM on OSM Development carrier board
+ *
+ * https://www.toradex.com/computer-on-modules/osm-arm-family/nxp-imx93
+ * https://www.toradex.com/products/carrier-board/osm-development-board
+ */
+
+/dts-v1/;
+
+#include "imx93.dtsi"
+#include "imx93-toradex-osm.dtsi"
+#include "imx93-imx91-toradex-osm-dev-common.dtsi"
+
+/ {
+ model = "Toradex OSM iMX93 on OSM Development Board";
+ compatible = "toradex,osm-imx93-dev",
+ "toradex,osm-imx93",
+ "fsl,imx93";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx93-toradex-osm.dtsi b/arch/arm64/boot/dts/freescale/imx93-toradex-osm.dtsi
new file mode 100644
index 000000000000..ea5e6055e3f5
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx93-toradex-osm.dtsi
@@ -0,0 +1,357 @@
+// SPDX-License-Identifier: GPL-2.0-only OR MIT
+/*
+ * Copyright (c) Toradex
+ *
+ * Toradex OSM iMX93 SoM
+ *
+ * https://www.toradex.com/computer-on-modules/osm-arm-family/nxp-imx93
+ */
+
+#include "imx93-pinfunc.h"
+#include "imx93-imx91-toradex-osm-common.dtsi"
+
+/ {
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ rsc_table: rsc-table@2021e000 {
+ reg = <0 0x2021e000 0 0x1000>;
+ no-map;
+ };
+
+ vdev0vring0: vdev0vring0@a4000000 {
+ reg = <0 0xa4000000 0 0x8000>;
+ no-map;
+ };
+
+ vdev0vring1: vdev0vring1@a4008000 {
+ reg = <0 0xa4008000 0 0x8000>;
+ no-map;
+ };
+
+ vdev1vring0: vdev1vring0@a4010000 {
+ reg = <0 0xa4010000 0 0x8000>;
+ no-map;
+ };
+
+ vdev1vring1: vdev1vring1@a4018000 {
+ reg = <0 0xa4018000 0 0x8000>;
+ no-map;
+ };
+
+ vdev0buffer: vdev0buffer@a4020000 {
+ compatible = "shared-dma-pool";
+ reg = <0 0xa4020000 0 0x100000>;
+ no-map;
+ };
+ };
+};
+
+&cm33 {
+ mbox-names = "tx", "rx", "rxdb";
+ mboxes = <&mu1 0 1>,
+ <&mu1 1 1>,
+ <&mu1 3 1>;
+ memory-region = <&vdev0buffer>, <&vdev0vring0>, <&vdev0vring1>,
+ <&vdev1vring0>, <&vdev1vring1>, <&rsc_table>;
+
+ status = "okay";
+};
+
+&mu1 {
+ status = "okay";
+};
+
+&iomuxc {
+ /* OSM CAN_A */
+ pinctrl_can_a: can1grp {
+ fsl,pins = <MX93_PAD_PDM_BIT_STREAM0__CAN1_RX 0x139e>, /* OSM AB17 */
+ <MX93_PAD_PDM_CLK__CAN1_TX 0x139e>; /* OSM AC17 */
+ };
+
+ /* OSM CAN_B */
+ pinctrl_can_b: can2grp {
+ fsl,pins = <MX93_PAD_GPIO_IO25__CAN2_TX 0x139e>, /* OSM AC19 */
+ <MX93_PAD_GPIO_IO27__CAN2_RX 0x139e>; /* OSM AB19 */
+ };
+
+ /* OSM CAM_MCK */
+ pinctrl_cam_mck: ccmclk1grp {
+ fsl,pins = <MX93_PAD_CCM_CLKO1__CCMSRCGPCMIX_CLKO1 0x51e>; /* OSM C2 */
+ };
+
+ /* OSM ETH_A RGMII */
+ pinctrl_eth_a: eqosgrp {
+ fsl,pins = <MX93_PAD_ENET1_RD0__ENET_QOS_RGMII_RD0 0x1fe>, /* OSM K15 */
+ <MX93_PAD_ENET1_RD1__ENET_QOS_RGMII_RD1 0x1fe>, /* OSM L15 */
+ <MX93_PAD_ENET1_RD2__ENET_QOS_RGMII_RD2 0x1fe>, /* OSM N15 */
+ <MX93_PAD_ENET1_RD3__ENET_QOS_RGMII_RD3 0x1fe>, /* OSM P15 */
+ <MX93_PAD_ENET1_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x1fe>, /* OSM R15 */
+ <MX93_PAD_ENET1_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x1fe>, /* OSM M15 */
+ <MX93_PAD_ENET1_TD0__ENET_QOS_RGMII_TD0 0x1fe>, /* OSM H15 */
+ <MX93_PAD_ENET1_TD1__ENET_QOS_RGMII_TD1 0x1fe>, /* OSM G15 */
+ <MX93_PAD_ENET1_TD2__ENET_QOS_RGMII_TD2 0x1fe>, /* OSM H16 */
+ <MX93_PAD_ENET1_TD3__ENET_QOS_RGMII_TD3 0x1fe>, /* OSM G16 */
+ <MX93_PAD_ENET1_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x1fe>, /* OSM J15 */
+ <MX93_PAD_ENET1_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x1fe>; /* OSM K16 */
+ };
+
+ /* OSM ETH_MDIO */
+ pinctrl_mdio: eqosmdiogrp {
+ fsl,pins = <MX93_PAD_ENET1_MDC__ENET_QOS_MDC 0x1fe>, /* OSM T16 */
+ <MX93_PAD_ENET1_MDIO__ENET_QOS_MDIO 0x1fe>; /* OSM T15 */
+ };
+
+ /* OSM ETH_B RGMII */
+ pinctrl_eth_b: fecgrp {
+ fsl,pins = <MX93_PAD_ENET2_RD0__ENET1_RGMII_RD0 0x1fe>, /* OSM J1 */
+ <MX93_PAD_ENET2_RD1__ENET1_RGMII_RD1 0x1fe>, /* OSM K1 */
+ <MX93_PAD_ENET2_RD2__ENET1_RGMII_RD2 0x1fe>, /* OSM M1 */
+ <MX93_PAD_ENET2_RD3__ENET1_RGMII_RD3 0x1fe>, /* OSM N1 */
+ <MX93_PAD_ENET2_RXC__ENET1_RGMII_RXC 0x1fe>, /* OSM P1 */
+ <MX93_PAD_ENET2_RX_CTL__ENET1_RGMII_RX_CTL 0x1fe>, /* OSM L1 */
+ <MX93_PAD_ENET2_TD0__ENET1_RGMII_TD0 0x1fe>, /* OSM G1 */
+ <MX93_PAD_ENET2_TD1__ENET1_RGMII_TD1 0x1fe>, /* OSM F1 */
+ <MX93_PAD_ENET2_TD2__ENET1_RGMII_TD2 0x1fe>, /* OSM G2 */
+ <MX93_PAD_ENET2_TD3__ENET1_RGMII_TD3 0x1fe>, /* OSM F2 */
+ <MX93_PAD_ENET2_TXC__ENET1_RGMII_TXC 0x1fe>, /* OSM H1 */
+ <MX93_PAD_ENET2_TX_CTL__ENET1_RGMII_TX_CTL 0x1fe>; /* OSM J2 */
+ };
+
+ /* OSM SPI_B_CS as GPIO */
+ pinctrl_spi_b_cs0_gpio: gpio1io11grp {
+ fsl,pins = <MX93_PAD_SAI1_TXFS__GPIO1_IO11 0x139e>; /* OSM AA23 */
+ };
+
+ /* OSM GPIO_A_0 */
+ pinctrl_gpio_a0: gpio2io0grp {
+ fsl,pins = <MX93_PAD_GPIO_IO00__GPIO2_IO00 0x139e>; /* OSM D17 */
+ };
+
+ /* OSM GPIO_A_1 */
+ pinctrl_gpio_a1: gpio2io1grp {
+ fsl,pins = <MX93_PAD_GPIO_IO01__GPIO2_IO01 0x139e>; /* OSM E17 */
+ };
+
+ /* OSM GPIO_A_2 */
+ pinctrl_gpio_a2: gpio2io2grp {
+ fsl,pins = <MX93_PAD_GPIO_IO02__GPIO2_IO02 0x139e>; /* OSM F17 */
+ };
+
+ /* OSM GPIO_A_3 */
+ pinctrl_gpio_a3: gpio2io3grp {
+ fsl,pins = <MX93_PAD_GPIO_IO03__GPIO2_IO03 0x139e>; /* OSM G17 */
+ };
+
+ /* OSM SPI_A_CS0 as GPIO */
+ pinctrl_spi_a_cs0_gpio: gpio2io12grp {
+ fsl,pins = <MX93_PAD_GPIO_IO12__GPIO2_IO12 0x139e>; /* OSM Y15 */
+ };
+
+ /* OSM PWM_0 as GPIO */
+ pinctrl_pwm0_gpio: gpio2io21grp {
+ fsl,pins = <MX93_PAD_GPIO_IO21__GPIO2_IO21 0x139e>; /* OSM E18 */
+ };
+
+ /* OSM GPIO_A_4 */
+ pinctrl_gpio_a4: gpio2io22grp {
+ fsl,pins = <MX93_PAD_GPIO_IO22__GPIO2_IO22 0x139e>; /* OSM H17 */
+ };
+
+ /* OSM GPIO_A_5 */
+ pinctrl_gpio_a5: gpio2io24grp {
+ fsl,pins = <MX93_PAD_GPIO_IO24__GPIO2_IO24 0x139e>; /* OSM J17 */
+ };
+
+ /* On-module CTRL_INT# */
+ pinctrl_ctrl_int: gpio3io27grp {
+ fsl,pins = <MX93_PAD_CCM_CLKO2__GPIO3_IO27 0x139e>; /* CTRL_INT# */
+ };
+
+ /* OSM GPIO_A_6 */
+ pinctrl_gpio_a6: gpio4io14grp {
+ fsl,pins = <MX93_PAD_ENET2_MDC__GPIO4_IO14 0x139e>; /* OSM K17 */
+ };
+
+ /* OSM GPIO_A_7 */
+ pinctrl_gpio_a7: gpio4io15grp {
+ fsl,pins = <MX93_PAD_ENET2_MDIO__GPIO4_IO15 0x139e>; /* OSM L17 */
+ };
+
+ /* OSM I2C_B as GPIO */
+ pinctrl_i2c_b_gpio: lpi2c1gpiogrp {
+ fsl,pins = <MX93_PAD_I2C1_SCL__GPIO1_IO00 0x40000b9e>, /* OSM AA20 */
+ <MX93_PAD_I2C1_SDA__GPIO1_IO01 0x40000b9e>; /* OSM AA21 */
+ };
+
+ /* OSM I2C_B */
+ pinctrl_i2c_b: lpi2c1grp {
+ fsl,pins = <MX93_PAD_I2C1_SCL__LPI2C1_SCL 0x40000b9e>, /* OSM AA20 */
+ <MX93_PAD_I2C1_SDA__LPI2C1_SDA 0x40000b9e>; /* OSM AA21 */
+ };
+
+ /* On-module PMIC I2C as GPIO */
+ pinctrl_pmic_i2c_gpio: lpi2c2gpiogrp {
+ fsl,pins = <MX93_PAD_I2C2_SCL__GPIO1_IO02 0x40000b9e>, /* PMIC_I2C_SCL */
+ <MX93_PAD_I2C2_SDA__GPIO1_IO03 0x40000b9e>; /* PMIC_I2C_SDA */
+ };
+
+ /* On-module PMIC I2C */
+ pinctrl_pmic_i2c: lpi2c2grp {
+ fsl,pins = <MX93_PAD_I2C2_SCL__LPI2C2_SCL 0x40000b9e>, /* PMIC_I2C_SCL */
+ <MX93_PAD_I2C2_SDA__LPI2C2_SDA 0x40000b9e>; /* PMIC_I2C_SDA */
+ };
+
+ /* OSM I2C_A as GPIO */
+ pinctrl_i2c_a_gpio: lpi2c3gpiogrp {
+ fsl,pins = <MX93_PAD_GPIO_IO28__GPIO2_IO28 0x40000b9e>, /* OSM AA16 */
+ <MX93_PAD_GPIO_IO29__GPIO2_IO29 0x40000b9e>; /* OSM AA15 */
+ };
+
+ /* OSM I2C_A */
+ pinctrl_i2c_a: lpi2c3grp {
+ fsl,pins = <MX93_PAD_GPIO_IO28__LPI2C3_SDA 0x40000b9e>, /* OSM AA16 */
+ <MX93_PAD_GPIO_IO29__LPI2C3_SCL 0x40000b9e>; /* OSM AA15 */
+ };
+
+ /* OSM SPI_B */
+ pinctrl_spi_b: lpspi1grp {
+ fsl,pins = <MX93_PAD_SAI1_TXC__LPSPI1_SIN 0x139e>, /* OSM Y22 */
+ <MX93_PAD_SAI1_TXD0__LPSPI1_SCK 0x139e>, /* OSM Y21 */
+ <MX93_PAD_SAI1_RXD0__LPSPI1_SOUT 0x139e>; /* OSM Y23 */
+ };
+
+ /* OSM SPI_A */
+ pinctrl_spi_a: lpspi8grp {
+ fsl,pins = <MX93_PAD_GPIO_IO13__LPSPI8_SIN 0x139e>, /* OSM U15 */
+ <MX93_PAD_GPIO_IO14__LPSPI8_SOUT 0x139e>, /* OSM V15 */
+ <MX93_PAD_GPIO_IO15__LPSPI8_SCK 0x139e>; /* OSM U16 */
+ };
+
+ /* OSM UART_CON */
+ pinctrl_uart_con: lpuart1grp {
+ fsl,pins = <MX93_PAD_UART1_RXD__LPUART1_RX 0x39e>, /* OSM D22 */
+ <MX93_PAD_UART1_TXD__LPUART1_TX 0x39e>; /* OSM D23 */
+ };
+
+ /* OSM UART_C */
+ pinctrl_uart_c: lpuart2grp {
+ fsl,pins = <MX93_PAD_UART2_RXD__LPUART2_RX 0x39e>, /* OSM A22 */
+ <MX93_PAD_UART2_TXD__LPUART2_TX 0x39e>; /* OSM B23 */
+ };
+
+ /* OSM UART_A */
+ pinctrl_uart_a: lpuart6grp {
+ fsl,pins = <MX93_PAD_GPIO_IO04__LPUART6_TX 0x39e>, /* OSM B13 */
+ <MX93_PAD_GPIO_IO05__LPUART6_RX 0x39e>, /* OSM A14 */
+ <MX93_PAD_GPIO_IO06__LPUART6_CTS_B 0x39e>, /* OSM C14 */
+ <MX93_PAD_GPIO_IO07__LPUART6_RTS_B 0x39e>; /* OSM C13 */
+ };
+
+ /* OSM UART_B */
+ pinctrl_uart_b: lpuart7grp {
+ fsl,pins = <MX93_PAD_GPIO_IO08__LPUART7_TX 0x39e>, /* OSM D13 */
+ <MX93_PAD_GPIO_IO09__LPUART7_RX 0x39e>, /* OSM D14 */
+ <MX93_PAD_GPIO_IO10__LPUART7_CTS_B 0x39e>, /* OSM D16 */
+ <MX93_PAD_GPIO_IO11__LPUART7_RTS_B 0x39e>; /* OSM D15 */
+ };
+
+ /* OSM I2S_A */
+ pinctrl_i2s_a: sai3grp {
+ fsl,pins = <MX93_PAD_GPIO_IO16__SAI3_TX_BCLK 0x139e>, /* OSM W20 */
+ <MX93_PAD_GPIO_IO19__SAI3_TX_DATA00 0x139e>, /* OSM W21 */
+ <MX93_PAD_GPIO_IO20__SAI3_RX_DATA00 0x139e>, /* OSM V21 */
+ <MX93_PAD_GPIO_IO26__SAI3_TX_SYNC 0x139e>; /* OSM W18 */
+ };
+
+ /* OSM I2S_MCLK */
+ pinctrl_i2s_a_mclk: sai3mclkgrp {
+ fsl,pins = <MX93_PAD_GPIO_IO17__SAI3_MCLK 0x31e>; /* OSM V18 */
+ };
+
+ /* OSM PWM_0 */
+ pinctrl_pwm0: tpm4ch1grp {
+ fsl,pins = <MX93_PAD_GPIO_IO21__TPM4_CH1 0x139e>; /* OSM E18 */
+ };
+
+ /* OSM PWM_1 */
+ pinctrl_pwm1: tpm5ch2grp {
+ fsl,pins = <MX93_PAD_GPIO_IO18__TPM5_CH2 0x139e>; /* OSM F18 */
+ };
+
+ /* OSM PWM_2 */
+ pinctrl_pwm2: tpm6ch1grp {
+ fsl,pins = <MX93_PAD_GPIO_IO23__TPM6_CH1 0x139e>; /* OSM G18 */
+ };
+
+ /* OSM USB_A_EN */
+ pinctrl_usb_a_en: usb1engrp {
+ fsl,pins = <MX93_PAD_CCM_CLKO3__GPIO4_IO28 0x139e>; /* OSM AC16 */
+ };
+
+ /* OSM USB_A_OC# */
+ pinctrl_usb_a_oc: usb1ocgrp {
+ fsl,pins = <MX93_PAD_CCM_CLKO4__GPIO4_IO29 0x139e>; /* OSM AC15 */
+ };
+
+ /* OSM USB_B_EN */
+ pinctrl_usb_b_en: usb2engrp {
+ fsl,pins = <MX93_PAD_PDM_BIT_STREAM1__GPIO1_IO10 0x139e>; /* OSM AC20 */
+ };
+
+ /* On-module eMMC */
+ pinctrl_emmc: usdhc1grp {
+ fsl,pins = <MX93_PAD_SD1_CLK__USDHC1_CLK 0x5fe>, /* eMMC_CLK */
+ <MX93_PAD_SD1_CMD__USDHC1_CMD 0x400013fe>, /* eMMC_CMD */
+ <MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x400013fe>, /* eMMC_DATA0 */
+ <MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x400013fe>, /* eMMC_DATA1 */
+ <MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x400013fe>, /* eMMC_DATA2 */
+ <MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x400013fe>, /* eMMC_DATA3 */
+ <MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x400013fe>, /* eMMC_DATA4 */
+ <MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x400013fe>, /* eMMC_DATA5 */
+ <MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x400013fe>, /* eMMC_DATA6 */
+ <MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x400013fe>, /* eMMC_DATA7 */
+ <MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x1580>; /* eMMC_STROBE */
+ };
+
+ /* OSM SDIO_A_CD# */
+ pinctrl_sdio_a_cd: usdhc2cdgrp {
+ fsl,pins = <MX93_PAD_SD2_CD_B__GPIO3_IO00 0x139e>; /* OSM J21 */
+ };
+
+ /* OSM SDIO_A */
+ pinctrl_sdio_a: usdhc2grp {
+ fsl,pins = <MX93_PAD_SD2_CLK__USDHC2_CLK 0x5fe>, /* OSM F21 */
+ <MX93_PAD_SD2_CMD__USDHC2_CMD 0x400013fe>, /* OSM E20 */
+ <MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x400013fe>, /* OSM G20 */
+ <MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x400013fe>, /* OSM G21 */
+ <MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x400013fe>, /* OSM H20 */
+ <MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x400013fe>; /* OSM H21 */
+ };
+
+ /* OSM SDIO_A_PWR_EN */
+ pinctrl_sdio_a_pwr_en: usdhc2pwrgrp {
+ fsl,pins = <MX93_PAD_SD2_RESET_B__GPIO3_IO07 0x139e>; /* OSM D21 */
+ };
+
+ /* On-module PMIC_SD_2_VSEL */
+ pinctrl_sdio_a_vsel: usdhc2vselgrp {
+ fsl,pins = <MX93_PAD_SD2_VSELECT__GPIO3_IO19 0x51e>; /* PMIC_SD_2_VSEL */
+ };
+
+ /* OSM SDIO_B */
+ pinctrl_sdio_b: usdhc3grp {
+ fsl,pins = <MX93_PAD_SD3_CLK__USDHC3_CLK 0x5fe>, /* OSM K20 */
+ <MX93_PAD_SD3_CMD__USDHC3_CMD 0x400013fe>, /* OSM K21 */
+ <MX93_PAD_SD3_DATA0__USDHC3_DATA0 0x400013fe>, /* OSM L20 */
+ <MX93_PAD_SD3_DATA1__USDHC3_DATA1 0x400013fe>, /* OSM L21 */
+ <MX93_PAD_SD3_DATA2__USDHC3_DATA2 0x400013fe>, /* OSM M21 */
+ <MX93_PAD_SD3_DATA3__USDHC3_DATA3 0x400013fe>; /* OSM N20 */
+ };
+
+ pinctrl_wdog: wdoggrp {
+ fsl,pins = <MX93_PAD_WDOG_ANY__WDOG1_WDOG_ANY 0x31e>; /* PMIC_WDOG_B */
+ };
+};
diff --git a/arch/arm64/boot/dts/freescale/imx95-15x15-frdm.dts b/arch/arm64/boot/dts/freescale/imx95-15x15-frdm.dts
index ab1c1ccc9b6e..f82e149323d3 100644
--- a/arch/arm64/boot/dts/freescale/imx95-15x15-frdm.dts
+++ b/arch/arm64/boot/dts/freescale/imx95-15x15-frdm.dts
@@ -189,33 +189,33 @@
linux,cma-default;
};
- vdev0vring0: memory@88000000 {
+ vdev0vring0: vdev0vring0@88000000 {
reg = <0 0x88000000 0 0x8000>;
no-map;
};
- vdev0vring1: memory@88008000 {
+ vdev0vring1: vdev0vring1@88008000 {
reg = <0 0x88008000 0 0x8000>;
no-map;
};
- vdev1vring0: memory@88010000 {
+ vdev1vring0: vdev1vring0@88010000 {
reg = <0 0x88010000 0 0x8000>;
no-map;
};
- vdev1vring1: memory@88018000 {
+ vdev1vring1: vdev1vring1@88018000 {
reg = <0 0x88018000 0 0x8000>;
no-map;
};
- vdevbuffer: memory@88020000 {
+ vdev0buffer: vdev0buffer@88020000 {
compatible = "shared-dma-pool";
reg = <0 0x88020000 0 0x100000>;
no-map;
};
- rsc_table: memory@88220000 {
+ rsc_table: rsc-table@88220000 {
reg = <0 0x88220000 0 0x1000>;
no-map;
};