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authorArka Mondal <arka@arkamondal.net>2026-09-18 21:20:28 +0900
committerJonathan Cameron <jonathan.cameron@oss.qualcomm.com>2026-09-28 17:07:37 +0100
commit465bdce79a9fe140a4b46b95f6bdfd880d197148 (patch)
treeb72672fe4adf558f7c83705be14e92eba158f0e3
parent89bda80f6623abb795370e346e8f0a05382a6187 (diff)
downloadlinux-next-465bdce79a9fe140a4b46b95f6bdfd880d197148.tar.gz
linux-next-465bdce79a9fe140a4b46b95f6bdfd880d197148.zip
iio: dac: ad5758: Fix alignment for DMA safety
ad5758_spi_reg_read() reads into st->d32[2] with spi_sync_transfer(), but d32 is not marked __aligned(IIO_DMA_MINALIGN), so it can share a cacheline with the fields before it. When DMA is not cache coherent, the cache invalidation after the read can discard CPU writes to those fields. Mark d32 __aligned(IIO_DMA_MINALIGN). It is the last member of the struct, so nothing comes after it. Fixes: 28d1a7ac2a0d ("iio: dac: Add AD5758 support") Signed-off-by: Arka Mondal <arka@arkamondal.net> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Signed-off-by: Jonathan Cameron <jonathan.cameron@oss.qualcomm.com>
-rw-r--r--drivers/iio/dac/ad5758.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/iio/dac/ad5758.c b/drivers/iio/dac/ad5758.c
index 44efa373cd80..ba381bd252d1 100644
--- a/drivers/iio/dac/ad5758.c
+++ b/drivers/iio/dac/ad5758.c
@@ -117,7 +117,7 @@ struct ad5758_state {
unsigned int dc_dc_ilim;
unsigned int slew_time;
bool pwr_down;
- __be32 d32[3];
+ __be32 d32[3] __aligned(IIO_DMA_MINALIGN);
};
/*