Merge branch 'for-linux-next' of https://gitlab.freedesktop.org/drm/misc/kernel.git

18 files changed, 430 insertions, 48 deletions

diff --git a/Documentation/devicetree/bindings/display/panel/jadard,jd9365da-h3.yaml b/Documentation/devicetree/bindings/display/panel/jadard,jd9365da-h3.yaml
index 4eae802de9fd..9e20e2faf82f 100644
--- a/Documentation/devicetree/bindings/display/panel/jadard,jd9365da-h3.yaml
+++ b/Documentation/devicetree/bindings/display/panel/jadard,jd9365da-h3.yaml
@@ -19,6 +19,7 @@ properties:
           - anbernic,rg-ds-display-bottom
           - anbernic,rg-ds-display-top
           - chongzhou,cz101b4001
+          - dcltek,dt300250
           - kingdisplay,kd101ne3-40ti
           - melfas,lmfbx101117480
           - radxa,display-10hd-ad001
diff --git a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml
index 21453f0d7ce2..3d1cc11ba3aa 100644
--- a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml
+++ b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml
@@ -37,6 +37,8 @@ properties:
       - ampire,am-480272h3tmqw-t01h
         # Ampire AM-800480L1TMQW-T00H 5" WVGA TFT LCD panel
       - ampire,am-800480l1tmqw-t00h
+        # Ampire AM-800480N3TZQW-00H 5" WVGA TFT LCD panel
+      - ampire,am-800480n3tzqw-00h
         # Ampire AM-800480R3TMQW-A1H 7.0" WVGA TFT LCD panel
       - ampire,am800480r3tmqwa1h
         # Ampire AM-800600P5TMQW-TB8H 8.0" SVGA TFT LCD panel
diff --git a/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml b/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml
index ebfc825b8346..91e06d6a6819 100644
--- a/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml
+++ b/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml
@@ -22,6 +22,8 @@ properties:
     enum:
       # Anberic RG353V-V2 5.0" 640x480 TFT LCD panel
       - anbernic,rg353v-panel-v2
+      # AYANEO Pocket DS lower 5.0" 1024x768 IPS LCD panel
+      - ayaneo,pocket-ds-lower-panel
       # GameForce Chi 3.5" 640x480 TFT LCD panel
       - gameforce,chi-panel
       # Powkiddy RGB10MAX3 5.0" 720x1280 TFT LCD panel
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
index b124f857d3b4..07213e177434 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
@@ -413,6 +413,8 @@ patternProperties:
     description: DataImage, Inc.
   "^davicom,.*":
     description: DAVICOM Semiconductor, Inc.
+  "^dcltek,.*":
+    description: DCL Technologies Inc.
   "^deepcomputing,.*":
     description: DeepComputing (HK) Limited
   "^dell,.*":
@@ -1263,6 +1265,8 @@ patternProperties:
     description: OpenWrt
   "^option,.*":
     description: Option NV
+  "^optologic,.*":
+    description: Opto Logic S.A.
   "^oranth,.*":
     description: Shenzhen Oranth Technology Co., Ltd.
   "^ORCL,.*":
diff --git a/drivers/gpu/drm/bridge/lontium-lt8912b.c b/drivers/gpu/drm/bridge/lontium-lt8912b.c
index df5d07e7644c..515e86f8c301 100644
--- a/drivers/gpu/drm/bridge/lontium-lt8912b.c
+++ b/drivers/gpu/drm/bridge/lontium-lt8912b.c
@@ -677,7 +677,7 @@ static DEFINE_SIMPLE_DEV_PM_OPS(lt8912_bridge_pm_ops, lt8912_bridge_suspend, lt8
 static int lt8912_get_regulators(struct lt8912 *lt)
 {
 	unsigned int i;
-	const char * const supply_names[] = {
+	static const char * const supply_names[] = {
 		"vdd", "vccmipirx", "vccsysclk", "vcclvdstx",
 		"vcchdmitx", "vcclvdspll", "vcchdmipll"
 	};
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
index a408dbd414bf..34c5f583e910 100644
--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
@@ -3389,7 +3389,8 @@ struct dw_hdmi *dw_hdmi_probe(struct platform_device *pdev,
 			break;
 		default:
 			dev_err(dev, "reg-io-width must be 1 or 4\n");
-			return ERR_PTR(-EINVAL);
+			ret = -EINVAL;
+			goto err_res;
 		}
 
 		iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
diff --git a/drivers/gpu/drm/bridge/tc358762.c b/drivers/gpu/drm/bridge/tc358762.c
index 6124d3123f57..76564d5e4f69 100644
--- a/drivers/gpu/drm/bridge/tc358762.c
+++ b/drivers/gpu/drm/bridge/tc358762.c
@@ -292,25 +292,17 @@ static int tc358762_probe(struct mipi_dsi_device *dsi)
 	ctx->bridge.of_node = dev->of_node;
 	ctx->bridge.pre_enable_prev_first = true;
 
-	drm_bridge_add(&ctx->bridge);
+	ret = devm_drm_bridge_add(dev, &ctx->bridge);
+	if (ret < 0)
+		return ret;
 
-	ret = mipi_dsi_attach(dsi);
-	if (ret < 0) {
-		drm_bridge_remove(&ctx->bridge);
+	ret = devm_mipi_dsi_attach(dev, dsi);
+	if (ret < 0)
 		dev_err(dev, "failed to attach dsi\n");
-	}
 
 	return ret;
 }
 
-static void tc358762_remove(struct mipi_dsi_device *dsi)
-{
-	struct tc358762 *ctx = mipi_dsi_get_drvdata(dsi);
-
-	mipi_dsi_detach(dsi);
-	drm_bridge_remove(&ctx->bridge);
-}
-
 static const struct of_device_id tc358762_of_match[] = {
 	{ .compatible = "toshiba,tc358762" },
 	{ }
@@ -319,7 +311,6 @@ MODULE_DEVICE_TABLE(of, tc358762_of_match);
 
 static struct mipi_dsi_driver tc358762_driver = {
 	.probe = tc358762_probe,
-	.remove = tc358762_remove,
 	.driver = {
 		.name = "tc358762",
 		.of_match_table = tc358762_of_match,
diff --git a/drivers/gpu/drm/bridge/tc358764.c b/drivers/gpu/drm/bridge/tc358764.c
index f55a56cbd88f..049215e65988 100644
--- a/drivers/gpu/drm/bridge/tc358764.c
+++ b/drivers/gpu/drm/bridge/tc358764.c
@@ -376,25 +376,17 @@ static int tc358764_probe(struct mipi_dsi_device *dsi)
 	ctx->bridge.of_node = dev->of_node;
 	ctx->bridge.pre_enable_prev_first = true;
 
-	drm_bridge_add(&ctx->bridge);
+	ret = devm_drm_bridge_add(dev, &ctx->bridge);
+	if (ret < 0)
+		return ret;
 
-	ret = mipi_dsi_attach(dsi);
-	if (ret < 0) {
-		drm_bridge_remove(&ctx->bridge);
+	ret = devm_mipi_dsi_attach(dev, dsi);
+	if (ret < 0)
 		dev_err(dev, "failed to attach dsi\n");
-	}
 
 	return ret;
 }
 
-static void tc358764_remove(struct mipi_dsi_device *dsi)
-{
-	struct tc358764 *ctx = mipi_dsi_get_drvdata(dsi);
-
-	mipi_dsi_detach(dsi);
-	drm_bridge_remove(&ctx->bridge);
-}
-
 static const struct of_device_id tc358764_of_match[] = {
 	{ .compatible = "toshiba,tc358764" },
 	{ }
@@ -403,7 +395,6 @@ MODULE_DEVICE_TABLE(of, tc358764_of_match);
 
 static struct mipi_dsi_driver tc358764_driver = {
 	.probe = tc358764_probe,
-	.remove = tc358764_remove,
 	.driver = {
 		.name = "tc358764",
 		.of_match_table = tc358764_of_match,
diff --git a/drivers/gpu/drm/nouveau/nouveau_abi16.c b/drivers/gpu/drm/nouveau/nouveau_abi16.c
index 291203121f0c..4542d5f4ded8 100644
--- a/drivers/gpu/drm/nouveau/nouveau_abi16.c
+++ b/drivers/gpu/drm/nouveau/nouveau_abi16.c
@@ -408,6 +408,9 @@ nouveau_abi16_ioctl_channel_alloc(ABI16_IOCTL_ARGS)
 			case NOUVEAU_FIFO_ENGINE_CE:
 				engine = NV_DEVICE_HOST_RUNLIST_ENGINES_CE;
 				break;
+			case NOUVEAU_FIFO_ENGINE_NVDEC:
+				engine = NV_DEVICE_HOST_RUNLIST_ENGINES_NVDEC;
+				break;
 			default:
 				return nouveau_abi16_put(abi16, -ENOSYS);
 			}
@@ -485,10 +488,13 @@ nouveau_abi16_ioctl_channel_alloc(ABI16_IOCTL_ARGS)
 			goto done;
 		break;
 	case NV_DEVICE_INFO_V0_TURING:
-		ret = nvif_object_ctor(&chan->chan->user, "abi16CeWar", 0, TURING_DMA_COPY_A,
-				       NULL, 0, &chan->ce);
-		if (ret)
-			goto done;
+		if (engine != NV_DEVICE_HOST_RUNLIST_ENGINES_NVDEC) {
+			ret = nvif_object_ctor(&chan->chan->user, "abi16CeWar",
+					       0, TURING_DMA_COPY_A, NULL, 0,
+					       &chan->ce);
+			if (ret)
+				goto done;
+		}
 		break;
 	default:
 		break;
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h
index 1c2523e2f92e..5fc75dc750ed 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drv.h
+++ b/drivers/gpu/drm/nouveau/nouveau_drv.h
@@ -10,7 +10,7 @@
 
 #define DRIVER_MAJOR		1
 #define DRIVER_MINOR		4
-#define DRIVER_PATCHLEVEL	2
+#define DRIVER_PATCHLEVEL	3
 
 /*
  * 1.1.1:
@@ -39,6 +39,8 @@
  *      - add variable page sizes and compression for Turing+
  * 1.4.2:
  *      - tell userspace LPTE/SPTE races are fixed.
+ * 1.4.3:
+ *      - VDEC contexts can be created.
  */
 
 #include <linux/notifier.h>
diff --git a/drivers/gpu/drm/panel/panel-edp.c b/drivers/gpu/drm/panel/panel-edp.c
index df7286679446..14dd40afa899 100644
--- a/drivers/gpu/drm/panel/panel-edp.c
+++ b/drivers/gpu/drm/panel/panel-edp.c
@@ -832,6 +832,13 @@ exit:
 	return 0;
 }
 
+static void panel_edp_put_adapter(void *_adap)
+{
+	struct i2c_adapter *adap = _adap;
+
+	i2c_put_adapter(adap);
+}
+
 static int panel_edp_probe(struct device *dev, const struct panel_desc *desc,
 			   struct drm_dp_aux *aux)
 {
@@ -874,11 +881,16 @@ static int panel_edp_probe(struct device *dev, const struct panel_desc *desc,
 
 	ddc = of_parse_phandle(dev->of_node, "ddc-i2c-bus", 0);
 	if (ddc) {
-		panel->ddc = of_find_i2c_adapter_by_node(ddc);
+		panel->ddc = of_get_i2c_adapter_by_node(ddc);
 		of_node_put(ddc);
 
 		if (!panel->ddc)
 			return -EPROBE_DEFER;
+
+		err = devm_add_action_or_reset(dev, panel_edp_put_adapter,
+					       panel->ddc);
+		if (err)
+			return err;
 	} else if (aux) {
 		panel->ddc = &aux->ddc;
 	}
@@ -890,7 +902,7 @@ static int panel_edp_probe(struct device *dev, const struct panel_desc *desc,
 
 	err = drm_panel_of_backlight(&panel->base);
 	if (err)
-		goto err_finished_ddc_init;
+		return err;
 
 	/*
 	 * We use runtime PM for prepare / unprepare since those power the panel
@@ -937,9 +949,6 @@ static int panel_edp_probe(struct device *dev, const struct panel_desc *desc,
 err_finished_pm_runtime:
 	pm_runtime_dont_use_autosuspend(dev);
 	pm_runtime_disable(dev);
-err_finished_ddc_init:
-	if (panel->ddc && (!panel->aux || panel->ddc != &panel->aux->ddc))
-		put_device(&panel->ddc->dev);
 
 	return err;
 }
@@ -983,8 +992,6 @@ static void panel_edp_remove(struct device *dev)
 
 	pm_runtime_dont_use_autosuspend(dev);
 	pm_runtime_disable(dev);
-	if (panel->ddc && (!panel->aux || panel->ddc != &panel->aux->ddc))
-		put_device(&panel->ddc->dev);
 
 	drm_edid_free(panel->drm_edid);
 	panel->drm_edid = NULL;
diff --git a/drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c b/drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c
index 67ef9e0fea03..5202c1ffc6e1 100644
--- a/drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c
+++ b/drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c
@@ -2931,6 +2931,248 @@ static const struct jadard_panel_desc waveshare_10_1_inch_b_desc = {
 		MIPI_DSI_MODE_LPM | MIPI_DSI_CLOCK_NON_CONTINUOUS,
 };
 
+static int dcltek_dt300250_init_cmds(struct jadard *jadard)
+{
+	struct mipi_dsi_multi_context dsi_ctx = { .dsi = jadard->dsi };
+
+	jd9365da_switch_page(&dsi_ctx, 0x00);
+	jadard_enable_standard_cmds(&dsi_ctx);
+
+	jd9365da_switch_page(&dsi_ctx, 0x01);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x00, 0x00);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x01, 0x2B);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x03, 0x10);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x04, 0x2B);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0C, 0x74);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x17, 0x00);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x18, 0xCF);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x19, 0x01);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1A, 0x00);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1B, 0xCF);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1C, 0x01);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x24, 0xFE);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x37, 0x09);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x38, 0x04);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x39, 0x00);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3A, 0x01);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3C, 0x5C);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3D, 0xFF);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3E, 0xFF);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3F, 0x7F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x40, 0x02);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x41, 0xC8);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x42, 0x66);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x43, 0x10);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x44, 0x0F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x45, 0x28);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x55, 0x02);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x57, 0x8D);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x59, 0x0A);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5A, 0x29);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5B, 0x1A);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5D, 0x7F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5E, 0x65);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5F, 0x53);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x60, 0x45);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x61, 0x3E);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x62, 0x30);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x63, 0x33);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x64, 0x1F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x3B);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x66, 0x3C);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x67, 0x3F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x68, 0x5D);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x69, 0x49);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6A, 0x4D);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6B, 0x3D);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6C, 0x37);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6D, 0x28);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6E, 0x15);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6F, 0x00);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x70, 0x7F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x71, 0x65);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x72, 0x53);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x73, 0x45);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x74, 0x3E);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x75, 0x30);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x76, 0x33);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x77, 0x1F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x78, 0x3B);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x79, 0x3C);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7A, 0x3F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7B, 0x5D);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7C, 0x49);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7D, 0x4D);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7E, 0x3D);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7F, 0x44);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x80, 0x28);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x81, 0x15);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x82, 0x00);
+
+	jd9365da_switch_page(&dsi_ctx, 0x02);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x00, 0x41);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x01, 0x5F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x02, 0x5F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x03, 0x4B);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x04, 0x5F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x05, 0x5C);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x06, 0x5F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x07, 0x49);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x08, 0x5F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x09, 0x5A);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0A, 0x5F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0B, 0x47);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0C, 0x5F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0D, 0x4F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0E, 0x5F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0F, 0x45);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x10, 0x5F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x11, 0x4D);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x12, 0x5F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x13, 0x5E);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x14, 0x51);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x15, 0x5F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x16, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x17, 0x5F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x18, 0x5F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x19, 0x4A);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1A, 0x5F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1B, 0x5B);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1C, 0x5F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1D, 0x48);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1E, 0x5F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1F, 0x59);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x20, 0x5F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x21, 0x46);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x22, 0x5F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x23, 0x4E);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x24, 0x5F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x25, 0x44);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x26, 0x5F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x27, 0x4C);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x28, 0x5F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x29, 0x5E);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2A, 0x50);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2B, 0x5F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2C, 0x10);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2D, 0x1F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2E, 0x1F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2F, 0x0C);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x30, 0x1F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x31, 0x04);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x32, 0x1F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x33, 0x0E);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x34, 0x1F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x35, 0x06);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x36, 0x1F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x37, 0x19);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x38, 0x1F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x39, 0x08);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3A, 0x1F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3B, 0x1B);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3C, 0x1F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3D, 0x0A);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3E, 0x1E);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3F, 0x1F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x40, 0x00);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x41, 0x1F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x42, 0x11);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x43, 0x1F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x44, 0x1F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x45, 0x0D);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x46, 0x1F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x47, 0x05);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x48, 0x1F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x49, 0x0F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4A, 0x1F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4B, 0x07);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4C, 0x1F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4D, 0x1A);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4E, 0x1F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4F, 0x09);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x50, 0x1F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x51, 0x1C);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x52, 0x1F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x53, 0x0B);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x54, 0x1E);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x55, 0x1F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x56, 0x01);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x57, 0x1F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x58, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5B, 0x10);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5C, 0x01);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5D, 0x70);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5E, 0x01);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5F, 0x02);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x60, 0x70);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x61, 0x01);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x62, 0x02);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x63, 0x06);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x64, 0x4A);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x56);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x66, 0x4F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x67, 0xF7);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x68, 0x01);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x69, 0x06);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6A, 0x4A);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6B, 0x10);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6C, 0x00);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6D, 0x00);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6E, 0x00);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6F, 0x88);
+
+	jd9365da_switch_page(&dsi_ctx, 0x04);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x00, 0x0E);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x02, 0xB3);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x09, 0x60);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0e, 0x4A);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x37, 0x58);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2b, 0x0F);
+
+	jd9365da_switch_page(&dsi_ctx, 0x05);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x15, 0x34);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x16, 0x76);
+
+	jd9365da_switch_page(&dsi_ctx, 0x00);
+
+	mipi_dsi_msleep(&dsi_ctx, 120);
+
+	mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx);
+
+	mipi_dsi_msleep(&dsi_ctx, 120);
+
+	mipi_dsi_dcs_set_display_on_multi(&dsi_ctx);
+
+	mipi_dsi_msleep(&dsi_ctx, 20);
+
+	mipi_dsi_dcs_set_tear_on_multi(&dsi_ctx, MIPI_DSI_DCS_TEAR_MODE_VBLANK);
+
+	return dsi_ctx.accum_err;
+}
+
+static const struct jadard_panel_desc dcltek_dt300250_desc = {
+	.mode_4ln = &(const struct drm_display_mode) {
+		.clock		= (600 + 48 + 32 + 80) * (1600 + 18 + 6 + 23) * 60 / 1000,
+
+		.hdisplay	= 600,
+		.hsync_start	= 600 + 48,
+		.hsync_end	= 600 + 48 + 32,
+		.htotal		= 600 + 48 + 32 + 80,
+
+		.vdisplay	= 1600,
+		.vsync_start	= 1600 + 18,
+		.vsync_end	= 1600 + 18 + 6,
+		.vtotal		= 1600 + 18 + 6 + 23,
+
+		.width_mm	= 83,
+		.height_mm	= 221,
+		.type		= DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
+	},
+	.lanes = 4,
+	.format = MIPI_DSI_FMT_RGB888,
+	.init = dcltek_dt300250_init_cmds,
+};
+
 static int jadard_dsi_probe(struct mipi_dsi_device *dsi)
 {
 	struct device *dev = &dsi->dev;
@@ -2950,7 +3192,8 @@ static int jadard_dsi_probe(struct mipi_dsi_device *dsi)
 	else
 		dsi->mode_flags = MIPI_DSI_MODE_VIDEO |
 				  MIPI_DSI_MODE_VIDEO_BURST |
-				  MIPI_DSI_MODE_NO_EOT_PACKET;
+				  MIPI_DSI_MODE_NO_EOT_PACKET |
+				  MIPI_DSI_MODE_LPM;
 
 	dsi->format = desc->format;
 	dsi->lanes = desc->lanes;
@@ -3037,6 +3280,10 @@ static const struct of_device_id jadard_of_match[] = {
 		.data = &cz101b4001_desc
 	},
 	{
+		.compatible = "dcltek,dt300250",
+		.data = &dcltek_dt300250_desc
+	},
+	{
 		.compatible = "kingdisplay,kd101ne3-40ti",
 		.data = &kingdisplay_kd101ne3_40ti_desc
 	},
diff --git a/drivers/gpu/drm/panel/panel-novatek-nt36536.c b/drivers/gpu/drm/panel/panel-novatek-nt36536.c
index 2a82b54880c3..8bd125650168 100644
--- a/drivers/gpu/drm/panel/panel-novatek-nt36536.c
+++ b/drivers/gpu/drm/panel/panel-novatek-nt36536.c
@@ -429,11 +429,9 @@ static int novatek_probe(struct mipi_dsi_device *dsi)
 		ctx->dsi[i]->mode_flags = desc->mode_flags;
 		ctx->dsi[i]->dsc = &ctx->dsc;
 		ret = devm_mipi_dsi_attach(dev, ctx->dsi[i]);
-		if (ret < 0) {
-			drm_panel_remove(&ctx->panel);
+		if (ret < 0)
 			return dev_err_probe(dev, ret,
 					     "Failed to attach to DSI host\n");
-		}
 	}
 
 	if (desc->has_dcs_backlight) {
diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
index 292212119fda..c95964ba25a9 100644
--- a/drivers/gpu/drm/panel/panel-simple.c
+++ b/drivers/gpu/drm/panel/panel-simple.c
@@ -912,6 +912,36 @@ static const struct panel_desc ampire_am_800480l1tmqw_t00h = {
 	.connector_type = DRM_MODE_CONNECTOR_DPI,
 };
 
+static const struct display_timing ampire_am_800480n3tzqw_00h_timing = {
+	.pixelclock = {23000000, 25000000, 27000000},
+	.hactive = { 800, 800, 800 },
+	.hfront_porch = { 4, 8, 48 },
+	.hback_porch = { 4, 8, 48 },
+	.hsync_len = { 2, 8, 8 },
+	.vactive = { 480, 480, 480 },
+	.vfront_porch = { 4, 8, 12 },
+	.vback_porch = { 4, 8, 12 },
+	.vsync_len = { 2, 4, 8 },
+	.flags = DISPLAY_FLAGS_HSYNC_LOW | DISPLAY_FLAGS_VSYNC_LOW |
+		 DISPLAY_FLAGS_DE_HIGH | DISPLAY_FLAGS_PIXDATA_POSEDGE |
+		 DISPLAY_FLAGS_SYNC_POSEDGE,
+};
+
+static const struct panel_desc ampire_am_800480n3tzqw_00h = {
+	.timings = &ampire_am_800480n3tzqw_00h_timing,
+	.num_timings = 1,
+	.bpc = 8,
+	.size = {
+		.width = 108,
+		.height = 65,
+	},
+	.bus_format = MEDIA_BUS_FMT_RGB888_1X24,
+	.bus_flags = DRM_BUS_FLAG_DE_HIGH |
+		     DRM_BUS_FLAG_PIXDATA_SAMPLE_NEGEDGE |
+		     DRM_BUS_FLAG_SYNC_SAMPLE_NEGEDGE,
+	.connector_type = DRM_MODE_CONNECTOR_DPI,
+};
+
 static const struct panel_desc ampire_am800480r3tmqwa1h = {
 	.modes = &ampire_am800480r3tmqwa1h_mode,
 	.num_modes = 1,
@@ -5649,6 +5679,9 @@ static const struct of_device_id platform_of_match[] = {
 		.compatible = "ampire,am-800480l1tmqw-t00h",
 		.data = &ampire_am_800480l1tmqw_t00h,
 	}, {
+		.compatible = "ampire,am-800480n3tzqw-00h",
+		.data = &ampire_am_800480n3tzqw_00h,
+	}, {
 		.compatible = "ampire,am800480r3tmqwa1h",
 		.data = &ampire_am800480r3tmqwa1h,
 	}, {
diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
index fcbb0b7d50e4..70f7282471e6 100644
--- a/drivers/gpu/drm/panel/panel-sitronix-st7703.c
+++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
@@ -47,6 +47,7 @@
 #define ST7703_CMD_SETCABC	 0xC8
 #define ST7703_CMD_SETPANEL	 0xCC
 #define ST7703_CMD_SETGAMMA	 0xE0
+#define ST7703_CMD_UNKNOWN_E1	 0xE1
 #define ST7703_CMD_SETEQ	 0xE3
 #define ST7703_CMD_SETGIP1	 0xE9
 #define ST7703_CMD_SETGIP2	 0xEA
@@ -673,6 +674,100 @@ static const struct st7703_panel_desc gameforcechi_desc = {
 	.init_sequence = gameforcechi_init_sequence,
 };
 
+static void ayaneo_pocket_ds_lower_init_sequence(struct mipi_dsi_multi_context *dsi_ctx)
+{
+	/* Init sequence extracted from the AYANEO Pocket DS BSP kernel. */
+
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, ST7703_CMD_SETEXTC, 0xf1, 0x12,
+				     0x87);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, ST7703_CMD_SETDISP, 0x00, 0x01,
+				     0x78);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, ST7703_CMD_SETRGBIF, 0x10, 0x10,
+				     0x28, 0x28, 0x03, 0xff, 0x00, 0x00, 0x00,
+				     0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, ST7703_CMD_SETCYC, 0x80);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, ST7703_CMD_SETBGP, 0x0a, 0x0a);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, ST7703_CMD_SETVCOM, 0x90, 0x90);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, ST7703_CMD_SETPOWER_EXT, 0x76,
+				     0x22, 0xf0, 0x13);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, ST7703_CMD_SETMIPI, 0x33, 0x81,
+				     0x05, 0xf9, 0x0e, 0x0e, 0x20, 0x00, 0x00,
+				     0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0x25,
+				     0x00, 0x91, 0x0a, 0x00, 0x00, 0x01, 0x4f,
+				     0x01, 0x00, 0x00, 0x37);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, ST7703_CMD_SETVDC, 0x47);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, ST7703_CMD_UNKNOWN_BF, 0x02, 0x10,
+				     0x00, 0x80, 0x04);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, ST7703_CMD_SETSCR, 0x73, 0x73,
+				     0x50, 0x50, 0x00, 0x00, 0x12, 0x73, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, ST7703_CMD_SETPOWER, 0x55, 0x00,
+				     0x32, 0x32, 0x77, 0xf1, 0xf7, 0xf7, 0xcc,
+				     0xcc, 0x7f, 0x7f, 0x11, 0x11, 0x00, 0x00,
+				     0x32);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, ST7703_CMD_SETIO, 0xb8, 0x00,
+				     0x0a, 0x10, 0x01, 0x09, 0x00, 0x00, 0xed,
+				     0xc5, 0x00, 0xa5);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, ST7703_CMD_SETCABC, 0x10, 0x40,
+				     0x1e, 0x03);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, ST7703_CMD_SETPANEL, 0x0b);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, ST7703_CMD_SETGAMMA, 0x00, 0x00,
+				     0x00, 0x25, 0x31, 0x3f, 0x26, 0x29, 0x04,
+				     0x08, 0x0d, 0x0e, 0x12, 0x0f, 0x11, 0x12,
+				     0x18, 0x00, 0x00, 0x00, 0x25, 0x31, 0x3f,
+				     0x26, 0x29, 0x04, 0x08, 0x0d, 0x0e, 0x12,
+				     0x0f, 0x11, 0x12, 0x18);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, ST7703_CMD_UNKNOWN_E1, 0x11, 0x11,
+				     0x91, 0x00, 0x00, 0x00, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, ST7703_CMD_SETEQ, 0x07, 0x07,
+				     0x0b, 0x0b, 0x0b, 0x0b, 0x00, 0x00, 0x00,
+				     0x00, 0xff, 0x84, 0xc0, 0x10);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, ST7703_CMD_SETGIP1, 0xc8, 0x10,
+				     0x04, 0x04, 0x02, 0x80, 0x81, 0x12, 0x31,
+				     0x23, 0x2f, 0x80, 0x80, 0x81, 0x27, 0x20,
+				     0x00, 0x00, 0x0f, 0x00, 0x00, 0x00, 0x00,
+				     0x00, 0x0f, 0x00, 0x00, 0x00, 0x44, 0x00,
+				     0x88, 0xff, 0x00, 0x22, 0x44, 0x66, 0x88,
+				     0x88, 0x88, 0x55, 0x11, 0x88, 0xff, 0x11,
+				     0x33, 0x55, 0x77, 0x88, 0x88, 0x88, 0x00,
+				     0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00,
+				     0x00, 0x00, 0x00, 0x00, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, ST7703_CMD_SETGIP2, 0x00, 0x00,
+				     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+				     0x00, 0x00, 0x00, 0x11, 0x55, 0xff, 0x88,
+				     0x77, 0x55, 0x33, 0x11, 0x88, 0x88, 0x88,
+				     0x00, 0x44, 0xff, 0x88, 0x66, 0x44, 0x22,
+				     0x00, 0x88, 0x88, 0x88, 0x23, 0x00, 0x00,
+				     0x00, 0xec, 0x00, 0x00, 0x00, 0x00, 0x00,
+				     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+				     0x00, 0x00, 0x00, 0x20, 0x80, 0x81, 0x00,
+				     0x00, 0x00, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, ST7703_CMD_UNKNOWN_EF, 0xff, 0xff,
+				     0x01);
+}
+
+static const struct drm_display_mode ayaneo_pocket_ds_lower_mode = {
+	.hdisplay	= 768,
+	.hsync_start	= 768 + 110,
+	.hsync_end	= 768 + 110 + 45,
+	.htotal		= 768 + 110 + 45 + 110,
+	.vdisplay	= 1024,
+	.vsync_start	= 1024 + 18,
+	.vsync_end	= 1024 + 18 + 6,
+	.vtotal		= 1024 + 18 + 6 + 16,
+	.clock		= 65946,
+	.width_mm	= 76,
+	.height_mm	= 102,
+};
+
+static const struct st7703_panel_desc ayaneo_pocket_ds_lower_desc = {
+	.mode = &ayaneo_pocket_ds_lower_mode,
+	.lanes = 4,
+	.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
+		      MIPI_DSI_CLOCK_NON_CONTINUOUS | MIPI_DSI_MODE_LPM,
+	.format = MIPI_DSI_FMT_RGB888,
+	.init_sequence = ayaneo_pocket_ds_lower_init_sequence,
+};
+
 static int st7703_enable(struct drm_panel *panel)
 {
 	struct st7703 *ctx = panel_to_st7703(panel);
@@ -916,6 +1011,7 @@ static void st7703_remove(struct mipi_dsi_device *dsi)
 
 static const struct of_device_id st7703_of_match[] = {
 	{ .compatible = "anbernic,rg353v-panel-v2", .data = &rg353v2_desc },
+	{ .compatible = "ayaneo,pocket-ds-lower-panel", .data = &ayaneo_pocket_ds_lower_desc },
 	{ .compatible = "gameforce,chi-panel", .data = &gameforcechi_desc },
 	{ .compatible = "powkiddy,rgb10max3-panel", .data = &rgb10max3_panel_desc },
 	{ .compatible = "powkiddy,rgb30-panel", .data = &rgb30panel_desc },
diff --git a/drivers/gpu/drm/panthor/panthor_drv.c b/drivers/gpu/drm/panthor/panthor_drv.c
index 106da676fd2e..46a3080b0b20 100644
--- a/drivers/gpu/drm/panthor/panthor_drv.c
+++ b/drivers/gpu/drm/panthor/panthor_drv.c
@@ -1824,7 +1824,7 @@ static int panthor_probe(struct platform_device *pdev)
 	ptdev = devm_drm_dev_alloc(&pdev->dev, &panthor_drm_driver,
 				   struct panthor_device, base);
 	if (IS_ERR(ptdev))
-		return -ENOMEM;
+		return PTR_ERR(ptdev);
 
 	platform_set_drvdata(pdev, ptdev);
 
diff --git a/include/drm/drm_bridge.h b/include/drm/drm_bridge.h
index 3ac84ed57ab2..58fff047f43b 100644
--- a/include/drm/drm_bridge.h
+++ b/include/drm/drm_bridge.h
@@ -40,9 +40,9 @@ struct drm_bridge;
 struct drm_bridge_timings;
 struct drm_connector;
 struct drm_display_info;
+struct drm_edid;
 struct drm_minor;
 struct drm_panel;
-struct edid;
 struct hdmi_codec_daifmt;
 struct hdmi_codec_params;
 struct i2c_adapter;
diff --git a/include/uapi/drm/nouveau_drm.h b/include/uapi/drm/nouveau_drm.h
index 1fa82fa6af38..c4905b3e4e91 100644
--- a/include/uapi/drm/nouveau_drm.h
+++ b/include/uapi/drm/nouveau_drm.h
@@ -89,6 +89,7 @@ struct drm_nouveau_getparam {
 #define NOUVEAU_FIFO_ENGINE_PPP 0x04
 #define NOUVEAU_FIFO_ENGINE_BSP 0x08
 #define NOUVEAU_FIFO_ENGINE_CE  0x30
+#define NOUVEAU_FIFO_ENGINE_NVDEC 0x300
 
 struct drm_nouveau_channel_alloc {
 	__u32     fb_ctxdma_handle;