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| author | Mark Brown <broonie@kernel.org> | 2026-10-01 13:47:58 +0100 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2026-10-01 13:47:58 +0100 |
| commit | 11ca7c54e1753e9bf1f23b07d4357a8ffd50b6dc (patch) | |
| tree | 53cd0d7e66421ca3ab5e7e27bcbab45bb71335bb | |
| parent | a49f7694b692e28c6fcba8f8ef3fb594357c13a7 (diff) | |
| parent | 73b0de63d7f7d9e504c8d1169b573cdded24e1b8 (diff) | |
| download | linux-next-11ca7c54e1753e9bf1f23b07d4357a8ffd50b6dc.tar.gz linux-next-11ca7c54e1753e9bf1f23b07d4357a8ffd50b6dc.zip | |
Merge branch 'for-next' of https://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu.git
17 files changed, 247 insertions, 62 deletions
diff --git a/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml b/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml index 7e77310da626..130128c46219 100644 --- a/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml +++ b/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml @@ -119,6 +119,13 @@ properties: - const: marvell,armada-ap807 - description: + Sophos XGS 87/107 network processing unit (Armada CN9130 SoC + with an 88E6193X switch) + items: + - const: sophos,xgs107w-npu + - const: marvell,cn9130 + + - description: SolidRun CN9130 SoM based single-board computers items: - enum: diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index e467da45cd7a..07fdae67cfe5 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -1597,6 +1597,8 @@ patternProperties: description: Sony Corporation "^sophgo,.*": description: Sophgo Technology Inc. + "^sophos,.*": + description: Sophos Ltd. "^sourceparts,.*": description: Source Parts Inc. "^spacemit,.*": diff --git a/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr.dtsi b/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr.dtsi index 7aa71a9aa1bb..16e9a258876c 100644 --- a/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr.dtsi +++ b/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr.dtsi @@ -235,7 +235,7 @@ pinctrl-0 = <&cf_gtr_sdhci_pins>; pinctrl-names = "default"; status = "okay"; - vmmc = <®_3p3v>; + vmmc-supply = <®_3p3v>; wp-inverted; }; diff --git a/arch/arm/boot/dts/marvell/armada-388-clearfog.dtsi b/arch/arm/boot/dts/marvell/armada-388-clearfog.dtsi index f8a06ae4a3c9..4a61e9d1a2c0 100644 --- a/arch/arm/boot/dts/marvell/armada-388-clearfog.dtsi +++ b/arch/arm/boot/dts/marvell/armada-388-clearfog.dtsi @@ -131,12 +131,7 @@ * 15-SFP_MOD_DEF0 */ expander0: gpio-expander@20 { - /* - * This is how it should be: - * compatible = "onnn,pca9655", "nxp,pca9555"; - * but you can't do this because of the way I2C works. - */ - compatible = "nxp,pca9555"; + compatible = "onnn,pca9655"; gpio-controller; #gpio-cells = <2>; reg = <0x20>; diff --git a/arch/arm/boot/dts/marvell/armada-388-helios4.dts b/arch/arm/boot/dts/marvell/armada-388-helios4.dts index 003b0708e965..3f0e89832f36 100644 --- a/arch/arm/boot/dts/marvell/armada-388-helios4.dts +++ b/arch/arm/boot/dts/marvell/armada-388-helios4.dts @@ -140,11 +140,13 @@ usb2_phy: usb2-phy { compatible = "usb-nop-xceiv"; - vbus-regulator = <®_5p0v_usb>; + vbus-supply = <®_5p0v_usb>; + #phy-cells = <0>; }; usb3_phy: usb3-phy { compatible = "usb-nop-xceiv"; + #phy-cells = <0>; }; soc { @@ -158,14 +160,7 @@ * 6-USB3 power */ expander0: gpio-expander@20 { - /* - * This is how it should be: - * compatible = "onnn,pca9655", - * "nxp,pca9555"; - * but you can't do this because of - * the way I2C works. - */ - compatible = "nxp,pca9555"; + compatible = "onnn,pca9655"; gpio-controller; #gpio-cells = <2>; reg = <0x20>; @@ -198,9 +193,9 @@ }; temp_sensor: temp@4c { - compatible = "ti,lm75"; + compatible = "national,lm75"; reg = <0x4c>; - vcc-supply = <®_3p3v>; + vs-supply = <®_3p3v>; }; eeprom@53 { @@ -254,13 +249,6 @@ }; }; - spi@10680 { - pinctrl-0 = <&spi1_pins - µsom_spi1_cs_pins>; - pinctrl-names = "default"; - status = "okay"; - }; - sdhci@d8000 { bus-width = <4>; cd-gpios = <&gpio0 20 GPIO_ACTIVE_LOW>; @@ -269,7 +257,7 @@ &helios_sdhci_cd_pins>; pinctrl-names = "default"; status = "okay"; - vmmc = <®_3p3v>; + vmmc-supply = <®_3p3v>; wp-inverted; }; @@ -327,11 +315,13 @@ marvell,pins = "mpp48", "mpp55"; marvell,function = "gpio"; }; - microsom_spi1_cs_pins: spi1-cs-pins { - marvell,pins = "mpp59"; - marvell,function = "spi1"; - }; }; }; }; }; + +&spi1 { + pinctrl-0 = <&spi1_pins>; + pinctrl-names = "default"; + status = "okay"; +}; diff --git a/arch/arm/boot/dts/marvell/armada-38x.dtsi b/arch/arm/boot/dts/marvell/armada-38x.dtsi index 1d616edda322..0618779090d0 100644 --- a/arch/arm/boot/dts/marvell/armada-38x.dtsi +++ b/arch/arm/boot/dts/marvell/armada-38x.dtsi @@ -627,6 +627,7 @@ <0x18454 0x4>; interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; clocks = <&gateclk 17>; + clock-names = "io"; mrvl,clk-delay-cycles = <0x1F>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/marvell/armada-395-gp.dts b/arch/arm/boot/dts/marvell/armada-395-gp.dts index 6dd9e9077f84..9ea447cd35a8 100644 --- a/arch/arm/boot/dts/marvell/armada-395-gp.dts +++ b/arch/arm/boot/dts/marvell/armada-395-gp.dts @@ -59,7 +59,6 @@ /* CON18 */ sdhci@d8000 { - clock-frequency = <200000000>; broken-cd; wp-inverted; bus-width = <8>; diff --git a/arch/arm/boot/dts/marvell/armada-39x.dtsi b/arch/arm/boot/dts/marvell/armada-39x.dtsi index 6d05835efb42..077f4b433822 100644 --- a/arch/arm/boot/dts/marvell/armada-39x.dtsi +++ b/arch/arm/boot/dts/marvell/armada-39x.dtsi @@ -381,6 +381,7 @@ <0x18454 0x4>; interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; clocks = <&gateclk 17>; + clock-names = "io"; mrvl,clk-delay-cycles = <0x1F>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/marvell/dove.dtsi b/arch/arm/boot/dts/marvell/dove.dtsi index 062c86361640..75e2f9baf661 100644 --- a/arch/arm/boot/dts/marvell/dove.dtsi +++ b/arch/arm/boot/dts/marvell/dove.dtsi @@ -100,12 +100,12 @@ msi-parent = <&intc>; bus-range = <0x00 0xff>; - ranges = <0x82000000 0x0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x2000 - 0x82000000 0x0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x2000 - 0x82000000 0x1 0x0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 Mem */ - 0x81000000 0x1 0x0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 I/O */ - 0x82000000 0x2 0x0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 1.0 Mem */ - 0x81000000 0x2 0x0 MBUS_ID(0x08, 0xe0) 0 1 0>; /* Port 1.0 I/O */ + ranges = <0x82000000 0x0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x2000>, + <0x82000000 0x0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x2000>, + <0x82000000 0x1 0x0 MBUS_ID(0x04, 0xe8) 0 1 0>, /* Port 0.0 Mem */ + <0x81000000 0x1 0x0 MBUS_ID(0x04, 0xe0) 0 1 0>, /* Port 0.0 I/O */ + <0x82000000 0x2 0x0 MBUS_ID(0x08, 0xe8) 0 1 0>, /* Port 1.0 Mem */ + <0x81000000 0x2 0x0 MBUS_ID(0x08, 0xe0) 0 1 0>; /* Port 1.0 I/O */ pcie0: pcie@1 { device_type = "pci"; @@ -117,8 +117,8 @@ #address-cells = <3>; #size-cells = <2>; - ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 - 0x81000000 0 0 0x81000000 0x1 0 1 0>; + ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0>, + <0x81000000 0 0 0x81000000 0x1 0 1 0>; bus-range = <0x00 0xff>; #interrupt-cells = <1>; @@ -146,8 +146,8 @@ #address-cells = <3>; #size-cells = <2>; - ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 - 0x81000000 0 0 0x81000000 0x2 0 1 0>; + ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0>, + <0x81000000 0 0 0x81000000 0x2 0 1 0>; bus-range = <0x00 0xff>; #interrupt-cells = <1>; @@ -772,7 +772,7 @@ gconf: global-config@e802c { compatible = "marvell,dove-global-config", - "syscon"; + "syscon"; reg = <0xe802c 0x14>; }; diff --git a/arch/arm/boot/dts/marvell/kirkwood-6282.dtsi b/arch/arm/boot/dts/marvell/kirkwood-6282.dtsi index e33723160ce7..9f63e3f9eb1c 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-6282.dtsi +++ b/arch/arm/boot/dts/marvell/kirkwood-6282.dtsi @@ -11,14 +11,13 @@ bus-range = <0x00 0xff>; - ranges = - <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 - 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000 - 0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000 - 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */ - 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */ - 0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 1.0 MEM */ - 0x81000000 0x2 0 MBUS_ID(0x04, 0xd0) 0 1 0 /* Port 1.0 IO */>; + ranges = <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000>, + <0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000>, + <0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000>, + <0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */>, + <0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */>, + <0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 1.0 MEM */>, + <0x81000000 0x2 0 MBUS_ID(0x04, 0xd0) 0 1 0 /* Port 1.0 IO */>; pcie0: pcie@1,0 { device_type = "pci"; diff --git a/arch/arm/boot/dts/marvell/kirkwood-guruplug-server-plus.dts b/arch/arm/boot/dts/marvell/kirkwood-guruplug-server-plus.dts index d5aa8b505cc0..cc88d5324983 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-guruplug-server-plus.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-guruplug-server-plus.dts @@ -104,14 +104,14 @@ ethphy0: ethernet-phy@0 { /* Marvell 88E1121R */ compatible = "ethernet-phy-id0141.0cb0", - "ethernet-phy-ieee802.3-c22"; + "ethernet-phy-ieee802.3-c22"; reg = <0>; }; ethphy1: ethernet-phy@1 { /* Marvell 88E1121R */ compatible = "ethernet-phy-id0141.0cb0", - "ethernet-phy-ieee802.3-c22"; + "ethernet-phy-ieee802.3-c22"; reg = <1>; }; }; diff --git a/arch/arm/boot/dts/marvell/kirkwood-lsxl.dtsi b/arch/arm/boot/dts/marvell/kirkwood-lsxl.dtsi index 5e0b139dd4fb..4206529b4a52 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-lsxl.dtsi +++ b/arch/arm/boot/dts/marvell/kirkwood-lsxl.dtsi @@ -168,8 +168,8 @@ compatible = "gpio-fan"; pinctrl-0 = <&pmx_fan_low &pmx_fan_high &pmx_fan_lock>; pinctrl-names = "default"; - gpios = <&gpio0 19 GPIO_ACTIVE_LOW - &gpio0 18 GPIO_ACTIVE_LOW>; + gpios = <&gpio0 19 GPIO_ACTIVE_LOW>, + <&gpio0 18 GPIO_ACTIVE_LOW>; gpio-fan,speed-map = <0 3>, <1500 2>, diff --git a/arch/arm/boot/dts/marvell/kirkwood-synology.dtsi b/arch/arm/boot/dts/marvell/kirkwood-synology.dtsi index 6b7c5218b1fb..de34bc2446ed 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-synology.dtsi +++ b/arch/arm/boot/dts/marvell/kirkwood-synology.dtsi @@ -281,7 +281,7 @@ status = "disabled"; compatible = "gpio-fan"; pinctrl-0 = <&pmx_fanctrl_32 &pmx_fanctrl_33 &pmx_fanctrl_34 - &pmx_fanalarm_35>; + &pmx_fanalarm_35>; pinctrl-names = "default"; gpios = <&gpio1 0 GPIO_ACTIVE_HIGH &gpio1 1 GPIO_ACTIVE_HIGH @@ -301,7 +301,7 @@ status = "disabled"; compatible = "gpio-fan"; pinctrl-0 = <&pmx_fanctrl_15 &pmx_fanctrl_16 &pmx_fanctrl_17 - &pmx_fanalarm_18>; + &pmx_fanalarm_18>; pinctrl-names = "default"; gpios = <&gpio0 15 GPIO_ACTIVE_HIGH &gpio0 16 GPIO_ACTIVE_HIGH @@ -322,7 +322,7 @@ status = "disabled"; compatible = "gpio-fan"; pinctrl-0 = <&pmx_fanctrl_32 &pmx_fanctrl_33 &pmx_fanctrl_34 - &pmx_fanalarm_35>; + &pmx_fanalarm_35>; pinctrl-names = "default"; gpios = <&gpio1 0 GPIO_ACTIVE_HIGH &gpio1 1 GPIO_ACTIVE_HIGH @@ -343,7 +343,7 @@ status = "disabled"; compatible = "gpio-fan"; pinctrl-0 = <&pmx_fanctrl_15 &pmx_fanctrl_16 &pmx_fanctrl_17 - &pmx_fanalarm_18>; + &pmx_fanalarm_18>; pinctrl-names = "default"; gpios = <&gpio0 15 GPIO_ACTIVE_HIGH &gpio0 16 GPIO_ACTIVE_HIGH @@ -364,7 +364,7 @@ status = "disabled"; compatible = "gpio-fan"; pinctrl-0 = <&pmx_fanctrl_15 &pmx_fanctrl_16 &pmx_fanctrl_17 - &pmx_fanalarm_35>; + &pmx_fanalarm_35>; pinctrl-names = "default"; gpios = <&gpio0 15 GPIO_ACTIVE_HIGH &gpio0 16 GPIO_ACTIVE_HIGH @@ -385,7 +385,7 @@ status = "disabled"; compatible = "gpio-fan"; pinctrl-0 = <&pmx_fanctrl_15 &pmx_fanctrl_16 &pmx_fanctrl_17 - &pmx_fanalarm_35 &pmx_fanalarm_44 &pmx_fanalarm_45>; + &pmx_fanalarm_35 &pmx_fanalarm_44 &pmx_fanalarm_45>; pinctrl-names = "default"; gpios = <&gpio0 15 GPIO_ACTIVE_HIGH &gpio0 16 GPIO_ACTIVE_HIGH diff --git a/arch/arm/boot/dts/marvell/orion5x-rd88f5182-nas.dts b/arch/arm/boot/dts/marvell/orion5x-rd88f5182-nas.dts index 75ab913b21e5..1d803d1d1112 100644 --- a/arch/arm/boot/dts/marvell/orion5x-rd88f5182-nas.dts +++ b/arch/arm/boot/dts/marvell/orion5x-rd88f5182-nas.dts @@ -22,7 +22,7 @@ soc { ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>, - <MBUS_ID(0x09, 0x00) 0 0xf2200000 0x800>, + <MBUS_ID(0x09, 0x00) 0 0xf2200000 0x800>, <MBUS_ID(0x01, 0x0f) 0 0xf4000000 0x80000>, <MBUS_ID(0x01, 0x1d) 0 0xfc000000 0x1000000>; }; diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig index 9f60a6fe0eaf..5203b5cfa457 100644 --- a/arch/arm/mach-mvebu/Kconfig +++ b/arch/arm/mach-mvebu/Kconfig @@ -55,7 +55,9 @@ config MACH_ARMADA_375 config MACH_ARMADA_38X bool "Marvell Armada 380/385 boards" depends on ARCH_MULTI_V7 - select ARM_ERRATA_720789 + select ARM_ERRATA_754322 + select ARM_ERRATA_764319 + select ARM_ERRATA_764369 if SMP select PL310_ERRATA_753970 select ARM_GIC select ARM_GLOBAL_TIMER diff --git a/arch/arm64/boot/dts/marvell/Makefile b/arch/arm64/boot/dts/marvell/Makefile index 09d1544041af..3e301c8265bc 100644 --- a/arch/arm64/boot/dts/marvell/Makefile +++ b/arch/arm64/boot/dts/marvell/Makefile @@ -32,6 +32,7 @@ dtb-$(CONFIG_ARCH_MVEBU) += ac5x-rd-carrier-cn9131.dtb dtb-$(CONFIG_ARCH_MVEBU) += ac5-98dx35xx-rd.dtb dtb-$(CONFIG_ARCH_MVEBU) += cn9130-cf-base.dtb dtb-$(CONFIG_ARCH_MVEBU) += cn9130-cf-pro.dtb +dtb-$(CONFIG_ARCH_MVEBU) += cn9130-sophos-xgs107w.dtb dtb-$(CONFIG_ARCH_MVEBU) += cn9131-cf-solidwan.dtb dtb-$(CONFIG_ARCH_MVEBU) += cn9132-clearfog.dtb diff --git a/arch/arm64/boot/dts/marvell/cn9130-sophos-xgs107w.dts b/arch/arm64/boot/dts/marvell/cn9130-sophos-xgs107w.dts new file mode 100644 index 000000000000..da6a1da1cc3e --- /dev/null +++ b/arch/arm64/boot/dts/marvell/cn9130-sophos-xgs107w.dts @@ -0,0 +1,188 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Device tree for the network processing unit (NPU) of the Sophos XGS 87/107 + * firewalls: a Marvell CN9130 SoC with a Marvell 88E6193X switch. + * + * The x86 host on the same board is not described here. + */ + +/dts-v1/; + +#include "cn9130.dtsi" +#include <dt-bindings/gpio/gpio.h> + +/ { + model = "Sophos XGS 107w (CN9130 NPU)"; + compatible = "sophos,xgs107w-npu", "marvell,cn9130"; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + aliases { + ethernet0 = &cp0_eth0; + i2c1 = &cp0_i2c1; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x80000000>; + }; + + reserved-memory { + /* OP-TEE, reserved by the firmware */ + tee@4400000 { + reg = <0x0 0x4400000 0x0 0x1000000>; + no-map; + }; + }; + + /* Front-panel SFP cage "F1", wired to switch port 9 */ + sfp: sfp { + compatible = "sff,sfp"; + i2c-bus = <&cp0_i2c1>; + los-gpios = <&cp0_gpio1 1 GPIO_ACTIVE_HIGH>; + tx-fault-gpios = <&cp0_gpio1 2 GPIO_ACTIVE_HIGH>; + mod-def0-gpios = <&cp0_gpio1 3 GPIO_ACTIVE_LOW>; + tx-disable-gpios = <&cp0_gpio1 7 GPIO_ACTIVE_HIGH>; + }; +}; + +&uart0 { + status = "okay"; +}; + +/* eMMC on the AP */ +&ap_sdhci0 { + bus-width = <8>; + non-removable; + mmc-ddr-1_8v; + status = "okay"; +}; + +/* + * The MPP pin muxing is left as configured by the boot loader; the pin + * controller node only exists to back the GPIO banks. + */ +&cp0_syscon0 { + cp0_pinctrl: pinctrl { + compatible = "marvell,cp115-standalone-pinctrl"; + }; +}; + +&cp0_i2c1 { + /* I2C bus of the SFP cage */ + clock-frequency = <100000>; + status = "okay"; +}; + +/* 4 MB SPI NOR with U-Boot and its environment, read-only on purpose */ +&cp0_spi0 { + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <40000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x0 0x3f0000>; + read-only; + }; + + partition@3f0000 { + label = "u-boot-env"; + reg = <0x3f0000 0x10000>; + read-only; + }; + }; + }; +}; + +&cp0_ethernet { + status = "okay"; +}; + +/* 10G link to switch port 0 */ +&cp0_eth0 { + phy-mode = "10gbase-r"; + phys = <&cp0_comphy4 0>; + managed = "in-band-status"; + status = "okay"; +}; + +&cp0_mdio { + status = "okay"; + + switch@2 { + compatible = "marvell,mv88e6190"; + reg = <2>; + reset-gpios = <&cp0_gpio2 17 GPIO_ACTIVE_LOW>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + ethernet = <&cp0_eth0>; + phy-mode = "10gbase-r"; + managed = "in-band-status"; + }; + + port@1 { + reg = <1>; + label = "p1"; + }; + + port@2 { + reg = <2>; + label = "p2"; + }; + + port@3 { + reg = <3>; + label = "p3"; + }; + + port@4 { + reg = <4>; + label = "p4"; + }; + + port@5 { + reg = <5>; + label = "p5"; + }; + + port@6 { + reg = <6>; + label = "p6"; + }; + + port@7 { + reg = <7>; + label = "p7"; + }; + + port@8 { + reg = <8>; + label = "p8"; + }; + + port@9 { + reg = <9>; + label = "sfp"; + phy-mode = "1000base-x"; + managed = "in-band-status"; + sfp = <&sfp>; + }; + }; + }; +}; |
