Age | Commit message (Expand) | Author |
2017-08-28 | coresight tmc: Add support for Coresight SoC 600 TMC | Suzuki K Poulose |
2017-08-28 | coresight tmc: Support for save-restore in ETR | Suzuki K Poulose |
2017-08-28 | coresight tmc etr: Setup AXI cache encoding for read transfers | Suzuki K Poulose |
2017-08-28 | coresight tmc etr: Cleanup AXICTL register handling | Suzuki K Poulose |
2017-08-28 | coresight tmc etr: Detect address width at runtime | Suzuki K Poulose |
2017-08-28 | coresight tmc: Detect support for scatter gather | Suzuki K Poulose |
2017-08-28 | coresight tmc etr: Add capabilitiy information | Suzuki K Poulose |
2017-08-28 | coresight tmc: Add helpers for accessing 64bit registers | Suzuki K Poulose |
2016-11-29 | coresight: tmc: Cleanup operation mode handling | Suzuki K. Poulose |
2016-08-31 | coresight: tmc: Limit the trace to available data | Suzuki K Poulose |
2016-05-03 | coresight: tmc: implementing TMC-ETF AUX space API | Mathieu Poirier |
2016-05-03 | coresight: tmc: keep track of memory width | Mathieu Poirier |
2016-05-03 | coresight: tmc: adding mode of operation for link/sinks | Mathieu Poirier |
2016-05-03 | coresight: tmc: getting rid of multiple read access | Mathieu Poirier |
2016-05-03 | coresight: tmc: making prepare/unprepare functions generic | Mathieu Poirier |
2016-05-03 | coresight: tmc: splitting driver in ETB/ETF and ETR components | Mathieu Poirier |
2016-05-03 | coresight: tmc: cleaning up header file | Mathieu Poirier |
2016-05-03 | coresight: tmc: introducing new header file | Mathieu Poirier |