Age | Commit message (Expand) | Author |
---|---|---|
2021-11-23 | dt-bindings: clock: sunxi: Export CLK_DRAM for devfreq | Samuel Holland |
2019-11-05 | clk: sunxi-ng: h3: Export MBUS clock | Jernej Skrabec |
2019-05-30 | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157 | Thomas Gleixner |
2018-03-02 | clk: sunxi-ng: h3: h5: export CLK_PLL_VIDEO | Jernej Skrabec |
2017-05-31 | clk: sunxi-ng: h3: Export PLL_PERIPH0 clock for the PRCM | Chen-Yu Tsai |
2017-03-06 | clk: sunxi-ng: add Allwinner H5 CCU support for H3 CCU driver | Icenowy Zheng |
2016-07-08 | clk: sunxi-ng: Add H3 clocks | Maxime Ripard |