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2025-02-27dt-bindings: arm-pmu: Add support for ARM Rainier PMUVincenzo Frascino
Add support for the ARM Rainier CPU core PMU. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Message-Id: <20250221180349.1413089-6-vincenzo.frascino@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2024-10-29dt-bindings: arm: pmu: Add Samsung Mongoose core compatibleMarkuss Broks
Add the compatible for the Samsung Mongoose CPU PMU to the schema. Co-developed-by: Maksym Holovach <nergzd@nergzd723.xyz> Signed-off-by: Maksym Holovach <nergzd@nergzd723.xyz> Signed-off-by: Markuss Broks <markuss.broks@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20241026-mongoose-pmu-v1-1-f1a7448054be@gmail.com Signed-off-by: Will Deacon <will@kernel.org>
2024-07-01dt-bindings: arm: pmu: Add new Cortex and Neoverse coresAndre Przywara
Add compatible strings for the PMUs in the Arm Cortex-A725, Cortex-X925, Neoverse N3, Neoverse V2, Neoverse V3 and Neoverse V3AE cores. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Link: https://lore.kernel.org/r/20240628145612.1291329-2-andre.przywara@arm.com Signed-off-by: Will Deacon <will@kernel.org>
2023-07-27dt-bindings: arm: pmu: Add Cortex A520, A715, A720, X3, and X4Rob Herring
Add compatible strings for the Arm Cortex-A520, Cortex-A715, Cortex-A720, Cortex-X3, and Cortex-X4 CPU PMUs. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230706205505.308523-1-robh@kernel.org Signed-off-by: Will Deacon <will@kernel.org>
2023-03-27dt-bindings: arm-pmu: Add PMU compatible strings for Apple M2 coresJanne Grunau
The PMUs on the Apple M2 cores avalanche and blizzard CPU are compatible with M1 ones. As on M1 we don't know exactly what the counters count so use a distinct compatible for each micro-architecture. Apple's PMU counter description omits a counter for M2 so there is some variation on the interpretation of the counters. Signed-off-by: Janne Grunau <j@jannau.net> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Hector Martin <marcan@marcan.st> Link: https://lore.kernel.org/r/20230214-apple_m2_pmu-v1-1-9c9213ab9b63@jannau.net Signed-off-by: Will Deacon <will@kernel.org>
2022-03-26Merge tag 'devicetree-for-5.18' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree updates from Rob Herring: - Add Krzysztof Kozlowski as co-maintainer for DT bindings providing much needed help. - DT schema validation now takes DTB files as input rather than intermediate YAML files. This decouples the validation from the source level syntax information. There's a bunch of schema fixes as a result of switching to DTB based validation which exposed some errors and incomplete schemas and examples. - Kbuild improvements to explicitly warn users running 'make dt_binding_check' on missing yamllint - Expand DT_SCHEMA_FILES kbuild variable to take just a partial filename or path instead of the full path to 1 file. - Convert various bindings to schema format: mscc,vsc7514-switch, multiple GNSS bindings, ahci-platform, i2c-at91, multiple UFS bindings, cortina,gemini-sata-bridge, cortina,gemini-ethernet, Atmel SHA, Atmel TDES, Atmel AES, armv7m-systick, Samsung Exynos display subsystem, nuvoton,npcm7xx-timer, samsung,s3c2410-i2c, zynqmp_dma, msm/mdp4, rda,8810pl-uart - New schemas for u-boot environment variable partition, TI clksel - New compatible strings for Renesas RZ/V2L SoC - Vendor prefixes for Xen, HPE, deprecated Synopsys, deprecated HiSilicon - Add/fix schemas for QEMU Arm 'virt' machine - Drop unused of_alias_get_alias_list() function - Add a script to check DT unittest EXPECT message output. Pass messages also now print by default at PR_INFO level to help test automation. * tag 'devicetree-for-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (96 commits) dt-bindings: kbuild: Make DT_SCHEMA_LINT a recursive variable dt-bindings: nvmem: add U-Boot environment variables binding dt-bindings: ufs: qcom: Add SM6350 compatible string dt-bindings: dmaengine: sifive,fu540-c000: include generic schema dt-bindings: gpio: pca95xx: drop useless consumer example Revert "of: base: Introduce of_alias_get_alias_list() to check alias IDs" dt-bindings: virtio,mmio: Allow setting devices 'dma-coherent' dt-bindings: gnss: Add two more chips dt-bindings: gnss: Rewrite sirfstar binding in YAML dt-bindings: gnss: Modify u-blox to use common bindings dt-bindings: gnss: Rewrite common bindings in YAML dt-bindings: ata: ahci-platform: Add rk3568-dwc-ahci compatible dt-bindings: ata: ahci-platform: Add power-domains property dt-bindings: ata: ahci-platform: Convert DT bindings to yaml dt-bindings: kbuild: Use DTB files for validation dt-bindings: kbuild: Pass DT_SCHEMA_FILES to dt-validate dt-bindings: Add QEMU virt machine compatible dt-bindings: arm: Convert QEMU fw-cfg to DT schema dt-bindings: i2c: at91: Add SAMA7G5 compatible strings list dt-bindings: i2c: convert i2c-at91 to json-schema ...
2022-02-07dt-bindings: arm-pmu: Document Apple PMU compatible stringsMarc Zyngier
As we are about to add support fur the Apple PMUs, document the compatible strings associated with the two micro-architectures present in the Apple M1. Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Hector Martin <marcan@marcan.st> Signed-off-by: Marc Zyngier <maz@kernel.org>
2022-02-04dt-bindings: Improve phandle-array schemasRob Herring
The 'phandle-array' type is a bit ambiguous. It can be either just an array of phandles or an array of phandles plus args. Many schemas for phandle-array properties aren't clear in the schema which case applies though the description usually describes it. The array of phandles case boils down to needing: items: maxItems: 1 The phandle plus args cases should typically take this form: items: - items: - description: A phandle - description: 1st arg cell - description: 2nd arg cell With this change, some examples need updating so that the bracketing of property values matches the schema. Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Vinod Koul <vkoul@kernel.org> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Georgi Djakov <djakov@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Acked-by: Stephen Boyd <sboyd@kernel.org> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Marc Kleine-Budde <mkl@pengutronix.de> Link: https://lore.kernel.org/r/20220119015038.2433585-1-robh@kernel.org
2021-12-08dt-bindings: arm: pmu: Document Denver and Carmel PMUsThierry Reding
Add compatible strings for the NVIDIA Denver and Carmel PMUs. Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20211207150746.444478-1-thierry.reding@gmail.com Signed-off-by: Rob Herring <robh@kernel.org>
2021-12-08dt-bindings: arm: Catch up with Cortex/Neoverse CPUs againRobin Murphy
Add bindings for the 2020 and 2021 cohorts of Cortex-A and Neoverse CPUs, now featuring their Cortex-X cousins as well. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Link: https://lore.kernel.org/r/a36014d06d308c73d3fa1ed55e8967fb8adadf0d.1638900542.git.robin.murphy@arm.com Signed-off-by: Rob Herring <robh@kernel.org>
2021-02-03dt-bindings: arm: add Cortex-A78 bindingSeiya Wang
Add compatible for Cortex-A78 PMU Signed-off-by: Seiya Wang <seiya.wang@mediatek.com> Acked-by: Mark Rutland <mark.rutland@arm.com> Link: https://lore.kernel.org/r/20210203055348.4935-3-seiya.wang@mediatek.com Signed-off-by: Will Deacon <will@kernel.org>
2020-10-06dt-bindings: Another round of adding missing 'additionalProperties'Rob Herring
Another round of wack-a-mole. The json-schema default is additional unknown properties are allowed, but for DT all properties should be defined. Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Stephen Boyd <sboyd@kernel.org> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Baolin Wang <baolin.wang7@gmail.com> Cc: Mauro Carvalho Chehab <mchehab@kernel.org> Cc: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Liam Girdwood <lgirdwood@gmail.com> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-By: Vinod Koul <vkoul@kernel.org> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> # for iio Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Mark Brown <broonie@kernel.org> Reviewd-by: Corey Minyard <cminyard@mvista.com> Acked-by: Pavel Machek <pavel@ucw.cz> Acked-by: Sebastian Reichel <sre@kernel.org> Link: https://lore.kernel.org/r/20201002234143.3570746-1-robh@kernel.org Signed-off-by: Rob Herring <robh@kernel.org>
2020-02-25dt-bindings: ARM: Clean up PMU compatible listRobin Murphy
The "alpha by vendor, reverse-alpha by model" sorting of compatibles that we seem to have ended up with is decidedly odd. Make it less so. Also copy the comment from the generic "arm,armv8" CPU binding to help clarify that the "arm,armv8-pmuv3" binding is rather intended to be a counterpart to that, for describing implementations without a specific microarchitecture like the AEMv8 software model. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Rob Herring <robh@kernel.org>
2020-02-25dt-bindings: ARM: Add recent Cortex/Neoverse PMUsRobin Murphy
Add new PMU definitions to correspond with the CPU bindings. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Rob Herring <robh@kernel.org>
2019-01-14dt-bindings: arm: Convert PMU binding to json-schemaRob Herring
Convert ARM PMU binding to DT schema format using json-schema. Cc: Will Deacon <will.deacon@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: linux-arm-kernel@lists.infradead.org Cc: devicetree@vger.kernel.org Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Will Deacon <will.deacon@arm.com>