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path: root/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c
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Diffstat (limited to 'drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c')
-rw-r--r--drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c10
1 files changed, 6 insertions, 4 deletions
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c
index c70f6ff018f2..79e45768eae5 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c
@@ -73,7 +73,7 @@ static void dpu_hw_pp_setup_dither(struct dpu_hw_pingpong *pp,
DPU_REG_WRITE(c, base + PP_DITHER_EN, 1);
}
-static int dpu_hw_pp_setup_te_config(struct dpu_hw_pingpong *pp,
+static int dpu_hw_pp_enable_te(struct dpu_hw_pingpong *pp,
struct dpu_hw_tear_check *te)
{
struct dpu_hw_blk_reg_map *c;
@@ -100,6 +100,8 @@ static int dpu_hw_pp_setup_te_config(struct dpu_hw_pingpong *pp,
DPU_REG_WRITE(c, PP_SYNC_WRCOUNT,
(te->start_pos + te->sync_threshold_start + 1));
+ DPU_REG_WRITE(c, PP_TEAR_CHECK_EN, 1);
+
return 0;
}
@@ -126,7 +128,7 @@ static bool dpu_hw_pp_get_autorefresh_config(struct dpu_hw_pingpong *pp,
return !!((val & BIT(31)) >> 31);
}
-static int dpu_hw_pp_enable_te(struct dpu_hw_pingpong *pp, bool enable)
+static int dpu_hw_pp_disable_te(struct dpu_hw_pingpong *pp)
{
struct dpu_hw_blk_reg_map *c;
@@ -134,7 +136,7 @@ static int dpu_hw_pp_enable_te(struct dpu_hw_pingpong *pp, bool enable)
return -EINVAL;
c = &pp->hw;
- DPU_REG_WRITE(c, PP_TEAR_CHECK_EN, enable);
+ DPU_REG_WRITE(c, PP_TEAR_CHECK_EN, 0);
return 0;
}
@@ -283,8 +285,8 @@ static void _setup_pingpong_ops(struct dpu_hw_pingpong *c,
unsigned long features)
{
if (test_bit(DPU_PINGPONG_TE, &features)) {
- c->ops.setup_tearcheck = dpu_hw_pp_setup_te_config;
c->ops.enable_tearcheck = dpu_hw_pp_enable_te;
+ c->ops.disable_tearcheck = dpu_hw_pp_disable_te;
c->ops.connect_external_te = dpu_hw_pp_connect_external_te;
c->ops.get_line_count = dpu_hw_pp_get_line_count;
c->ops.disable_autorefresh = dpu_hw_pp_disable_autorefresh;