summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/i2c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/gpu/drm/i2c')
-rw-r--r--drivers/gpu/drm/i2c/Kconfig36
-rw-r--r--drivers/gpu/drm/i2c/Makefile10
-rw-r--r--drivers/gpu/drm/i2c/ch7006_drv.c549
-rw-r--r--drivers/gpu/drm/i2c/ch7006_mode.c470
-rw-r--r--drivers/gpu/drm/i2c/ch7006_priv.h344
-rw-r--r--drivers/gpu/drm/i2c/sil164_drv.c451
-rw-r--r--drivers/gpu/drm/i2c/tda9950.c507
-rw-r--r--drivers/gpu/drm/i2c/tda998x_drv.c2116
8 files changed, 0 insertions, 4483 deletions
diff --git a/drivers/gpu/drm/i2c/Kconfig b/drivers/gpu/drm/i2c/Kconfig
deleted file mode 100644
index 6f19e1c35e30..000000000000
--- a/drivers/gpu/drm/i2c/Kconfig
+++ /dev/null
@@ -1,36 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-menu "I2C encoder or helper chips"
- depends on DRM && DRM_KMS_HELPER && I2C
-
-config DRM_I2C_CH7006
- tristate "Chrontel ch7006 TV encoder"
- default m if DRM_NOUVEAU
- help
- Support for Chrontel ch7006 and similar TV encoders, found
- on some nVidia video cards.
-
- This driver is currently only useful if you're also using
- the nouveau driver.
-
-config DRM_I2C_SIL164
- tristate "Silicon Image sil164 TMDS transmitter"
- default m if DRM_NOUVEAU
- help
- Support for sil164 and similar single-link (or dual-link
- when used in pairs) TMDS transmitters, used in some nVidia
- video cards.
-
-config DRM_I2C_NXP_TDA998X
- tristate "NXP Semiconductors TDA998X HDMI encoder"
- default m if DRM_TILCDC
- select CEC_CORE if CEC_NOTIFIER
- select SND_SOC_HDMI_CODEC if SND_SOC
- help
- Support for NXP Semiconductors TDA998X HDMI encoders.
-
-config DRM_I2C_NXP_TDA9950
- tristate "NXP Semiconductors TDA9950/TDA998X HDMI CEC"
- select CEC_NOTIFIER
- select CEC_CORE
-
-endmenu
diff --git a/drivers/gpu/drm/i2c/Makefile b/drivers/gpu/drm/i2c/Makefile
deleted file mode 100644
index a962f6f08568..000000000000
--- a/drivers/gpu/drm/i2c/Makefile
+++ /dev/null
@@ -1,10 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0
-ch7006-y := ch7006_drv.o ch7006_mode.o
-obj-$(CONFIG_DRM_I2C_CH7006) += ch7006.o
-
-sil164-y := sil164_drv.o
-obj-$(CONFIG_DRM_I2C_SIL164) += sil164.o
-
-tda998x-y := tda998x_drv.o
-obj-$(CONFIG_DRM_I2C_NXP_TDA998X) += tda998x.o
-obj-$(CONFIG_DRM_I2C_NXP_TDA9950) += tda9950.o
diff --git a/drivers/gpu/drm/i2c/ch7006_drv.c b/drivers/gpu/drm/i2c/ch7006_drv.c
deleted file mode 100644
index 131512a5f3bd..000000000000
--- a/drivers/gpu/drm/i2c/ch7006_drv.c
+++ /dev/null
@@ -1,549 +0,0 @@
-/*
- * Copyright (C) 2009 Francisco Jerez.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial
- * portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
- * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-#include <linux/module.h>
-
-#include <drm/drm_crtc_helper.h>
-
-#include "ch7006_priv.h"
-
-/* DRM encoder functions */
-
-static void ch7006_encoder_set_config(struct drm_encoder *encoder,
- void *params)
-{
- struct ch7006_priv *priv = to_ch7006_priv(encoder);
-
- priv->params = *(struct ch7006_encoder_params *)params;
-}
-
-static void ch7006_encoder_destroy(struct drm_encoder *encoder)
-{
- struct ch7006_priv *priv = to_ch7006_priv(encoder);
-
- drm_property_destroy(encoder->dev, priv->scale_property);
-
- kfree(priv);
- to_encoder_slave(encoder)->slave_priv = NULL;
-
- drm_i2c_encoder_destroy(encoder);
-}
-
-static void ch7006_encoder_dpms(struct drm_encoder *encoder, int mode)
-{
- struct i2c_client *client = drm_i2c_encoder_get_client(encoder);
- struct ch7006_priv *priv = to_ch7006_priv(encoder);
- struct ch7006_state *state = &priv->state;
-
- ch7006_dbg(client, "\n");
-
- if (mode == priv->last_dpms)
- return;
- priv->last_dpms = mode;
-
- ch7006_setup_power_state(encoder);
-
- ch7006_load_reg(client, state, CH7006_POWER);
-}
-
-static void ch7006_encoder_save(struct drm_encoder *encoder)
-{
- struct i2c_client *client = drm_i2c_encoder_get_client(encoder);
- struct ch7006_priv *priv = to_ch7006_priv(encoder);
-
- ch7006_dbg(client, "\n");
-
- ch7006_state_save(client, &priv->saved_state);
-}
-
-static void ch7006_encoder_restore(struct drm_encoder *encoder)
-{
- struct i2c_client *client = drm_i2c_encoder_get_client(encoder);
- struct ch7006_priv *priv = to_ch7006_priv(encoder);
-
- ch7006_dbg(client, "\n");
-
- ch7006_state_load(client, &priv->saved_state);
-}
-
-static bool ch7006_encoder_mode_fixup(struct drm_encoder *encoder,
- const struct drm_display_mode *mode,
- struct drm_display_mode *adjusted_mode)
-{
- struct ch7006_priv *priv = to_ch7006_priv(encoder);
-
- /* The ch7006 is painfully picky with the input timings so no
- * custom modes for now... */
-
- priv->mode = ch7006_lookup_mode(encoder, mode);
-
- return !!priv->mode;
-}
-
-static int ch7006_encoder_mode_valid(struct drm_encoder *encoder,
- struct drm_display_mode *mode)
-{
- if (ch7006_lookup_mode(encoder, mode))
- return MODE_OK;
- else
- return MODE_BAD;
-}
-
-static void ch7006_encoder_mode_set(struct drm_encoder *encoder,
- struct drm_display_mode *drm_mode,
- struct drm_display_mode *adjusted_mode)
-{
- struct i2c_client *client = drm_i2c_encoder_get_client(encoder);
- struct ch7006_priv *priv = to_ch7006_priv(encoder);
- struct ch7006_encoder_params *params = &priv->params;
- struct ch7006_state *state = &priv->state;
- uint8_t *regs = state->regs;
- const struct ch7006_mode *mode = priv->mode;
- const struct ch7006_tv_norm_info *norm = &ch7006_tv_norms[priv->norm];
- int start_active;
-
- ch7006_dbg(client, "\n");
-
- regs[CH7006_DISPMODE] = norm->dispmode | mode->dispmode;
- regs[CH7006_BWIDTH] = 0;
- regs[CH7006_INPUT_FORMAT] = bitf(CH7006_INPUT_FORMAT_FORMAT,
- params->input_format);
-
- regs[CH7006_CLKMODE] = CH7006_CLKMODE_SUBC_LOCK
- | bitf(CH7006_CLKMODE_XCM, params->xcm)
- | bitf(CH7006_CLKMODE_PCM, params->pcm);
- if (params->clock_mode)
- regs[CH7006_CLKMODE] |= CH7006_CLKMODE_MASTER;
- if (params->clock_edge)
- regs[CH7006_CLKMODE] |= CH7006_CLKMODE_POS_EDGE;
-
- start_active = (drm_mode->htotal & ~0x7) - (drm_mode->hsync_start & ~0x7);
- regs[CH7006_POV] = bitf(CH7006_POV_START_ACTIVE_8, start_active);
- regs[CH7006_START_ACTIVE] = bitf(CH7006_START_ACTIVE_0, start_active);
-
- regs[CH7006_INPUT_SYNC] = 0;
- if (params->sync_direction)
- regs[CH7006_INPUT_SYNC] |= CH7006_INPUT_SYNC_OUTPUT;
- if (params->sync_encoding)
- regs[CH7006_INPUT_SYNC] |= CH7006_INPUT_SYNC_EMBEDDED;
- if (drm_mode->flags & DRM_MODE_FLAG_PVSYNC)
- regs[CH7006_INPUT_SYNC] |= CH7006_INPUT_SYNC_PVSYNC;
- if (drm_mode->flags & DRM_MODE_FLAG_PHSYNC)
- regs[CH7006_INPUT_SYNC] |= CH7006_INPUT_SYNC_PHSYNC;
-
- regs[CH7006_DETECT] = 0;
- regs[CH7006_BCLKOUT] = 0;
-
- regs[CH7006_SUBC_INC3] = 0;
- if (params->pout_level)
- regs[CH7006_SUBC_INC3] |= CH7006_SUBC_INC3_POUT_3_3V;
-
- regs[CH7006_SUBC_INC4] = 0;
- if (params->active_detect)
- regs[CH7006_SUBC_INC4] |= CH7006_SUBC_INC4_DS_INPUT;
-
- regs[CH7006_PLL_CONTROL] = priv->saved_state.regs[CH7006_PLL_CONTROL];
-
- ch7006_setup_levels(encoder);
- ch7006_setup_subcarrier(encoder);
- ch7006_setup_pll(encoder);
- ch7006_setup_power_state(encoder);
- ch7006_setup_properties(encoder);
-
- ch7006_state_load(client, state);
-}
-
-static enum drm_connector_status ch7006_encoder_detect(struct drm_encoder *encoder,
- struct drm_connector *connector)
-{
- struct i2c_client *client = drm_i2c_encoder_get_client(encoder);
- struct ch7006_priv *priv = to_ch7006_priv(encoder);
- struct ch7006_state *state = &priv->state;
- int det;
-
- ch7006_dbg(client, "\n");
-
- ch7006_save_reg(client, state, CH7006_DETECT);
- ch7006_save_reg(client, state, CH7006_POWER);
- ch7006_save_reg(client, state, CH7006_CLKMODE);
-
- ch7006_write(client, CH7006_POWER, CH7006_POWER_RESET |
- bitfs(CH7006_POWER_LEVEL, NORMAL));
- ch7006_write(client, CH7006_CLKMODE, CH7006_CLKMODE_MASTER);
-
- ch7006_write(client, CH7006_DETECT, CH7006_DETECT_SENSE);
-
- ch7006_write(client, CH7006_DETECT, 0);
-
- det = ch7006_read(client, CH7006_DETECT);
-
- ch7006_load_reg(client, state, CH7006_CLKMODE);
- ch7006_load_reg(client, state, CH7006_POWER);
- ch7006_load_reg(client, state, CH7006_DETECT);
-
- if ((det & (CH7006_DETECT_SVIDEO_Y_TEST|
- CH7006_DETECT_SVIDEO_C_TEST|
- CH7006_DETECT_CVBS_TEST)) == 0)
- priv->subconnector = DRM_MODE_SUBCONNECTOR_SCART;
- else if ((det & (CH7006_DETECT_SVIDEO_Y_TEST|
- CH7006_DETECT_SVIDEO_C_TEST)) == 0)
- priv->subconnector = DRM_MODE_SUBCONNECTOR_SVIDEO;
- else if ((det & CH7006_DETECT_CVBS_TEST) == 0)
- priv->subconnector = DRM_MODE_SUBCONNECTOR_Composite;
- else
- priv->subconnector = DRM_MODE_SUBCONNECTOR_Unknown;
-
- drm_object_property_set_value(&connector->base,
- encoder->dev->mode_config.tv_subconnector_property,
- priv->subconnector);
-
- return priv->subconnector ? connector_status_connected :
- connector_status_disconnected;
-}
-
-static int ch7006_encoder_get_modes(struct drm_encoder *encoder,
- struct drm_connector *connector)
-{
- struct ch7006_priv *priv = to_ch7006_priv(encoder);
- const struct ch7006_mode *mode;
- int n = 0;
-
- for (mode = ch7006_modes; mode->mode.clock; mode++) {
- if (~mode->valid_scales & 1<<priv->scale ||
- ~mode->valid_norms & 1<<priv->norm)
- continue;
-
- drm_mode_probed_add(connector,
- drm_mode_duplicate(encoder->dev, &mode->mode));
-
- n++;
- }
-
- return n;
-}
-
-static int ch7006_encoder_create_resources(struct drm_encoder *encoder,
- struct drm_connector *connector)
-{
- struct ch7006_priv *priv = to_ch7006_priv(encoder);
- struct drm_device *dev = encoder->dev;
- struct drm_mode_config *conf = &dev->mode_config;
-
- drm_mode_create_tv_properties_legacy(dev, NUM_TV_NORMS, ch7006_tv_norm_names);
-
- priv->scale_property = drm_property_create_range(dev, 0, "scale", 0, 2);
- if (!priv->scale_property)
- return -ENOMEM;
-
- drm_object_attach_property(&connector->base, conf->tv_select_subconnector_property,
- priv->select_subconnector);
- drm_object_attach_property(&connector->base, conf->tv_subconnector_property,
- priv->subconnector);
- drm_object_attach_property(&connector->base, conf->tv_left_margin_property,
- priv->hmargin);
- drm_object_attach_property(&connector->base, conf->tv_bottom_margin_property,
- priv->vmargin);
- drm_object_attach_property(&connector->base, conf->legacy_tv_mode_property,
- priv->norm);
- drm_object_attach_property(&connector->base, conf->tv_brightness_property,
- priv->brightness);
- drm_object_attach_property(&connector->base, conf->tv_contrast_property,
- priv->contrast);
- drm_object_attach_property(&connector->base, conf->tv_flicker_reduction_property,
- priv->flicker);
- drm_object_attach_property(&connector->base, priv->scale_property,
- priv->scale);
-
- return 0;
-}
-
-static int ch7006_encoder_set_property(struct drm_encoder *encoder,
- struct drm_connector *connector,
- struct drm_property *property,
- uint64_t val)
-{
- struct i2c_client *client = drm_i2c_encoder_get_client(encoder);
- struct ch7006_priv *priv = to_ch7006_priv(encoder);
- struct ch7006_state *state = &priv->state;
- struct drm_mode_config *conf = &encoder->dev->mode_config;
- struct drm_crtc *crtc = encoder->crtc;
- bool modes_changed = false;
-
- ch7006_dbg(client, "\n");
-
- if (property == conf->tv_select_subconnector_property) {
- priv->select_subconnector = val;
-
- ch7006_setup_power_state(encoder);
-
- ch7006_load_reg(client, state, CH7006_POWER);
-
- } else if (property == conf->tv_left_margin_property) {
- priv->hmargin = val;
-
- ch7006_setup_properties(encoder);
-
- ch7006_load_reg(client, state, CH7006_POV);
- ch7006_load_reg(client, state, CH7006_HPOS);
-
- } else if (property == conf->tv_bottom_margin_property) {
- priv->vmargin = val;
-
- ch7006_setup_properties(encoder);
-
- ch7006_load_reg(client, state, CH7006_POV);
- ch7006_load_reg(client, state, CH7006_VPOS);
-
- } else if (property == conf->legacy_tv_mode_property) {
- if (connector->dpms != DRM_MODE_DPMS_OFF)
- return -EINVAL;
-
- priv->norm = val;
-
- modes_changed = true;
-
- } else if (property == conf->tv_brightness_property) {
- priv->brightness = val;
-
- ch7006_setup_levels(encoder);
-
- ch7006_load_reg(client, state, CH7006_BLACK_LEVEL);
-
- } else if (property == conf->tv_contrast_property) {
- priv->contrast = val;
-
- ch7006_setup_properties(encoder);
-
- ch7006_load_reg(client, state, CH7006_CONTRAST);
-
- } else if (property == conf->tv_flicker_reduction_property) {
- priv->flicker = val;
-
- ch7006_setup_properties(encoder);
-
- ch7006_load_reg(client, state, CH7006_FFILTER);
-
- } else if (property == priv->scale_property) {
- if (connector->dpms != DRM_MODE_DPMS_OFF)
- return -EINVAL;
-
- priv->scale = val;
-
- modes_changed = true;
-
- } else {
- return -EINVAL;
- }
-
- if (modes_changed) {
- drm_helper_probe_single_connector_modes(connector, 0, 0);
-
- if (crtc)
- drm_crtc_helper_set_mode(crtc, &crtc->mode,
- crtc->x, crtc->y,
- crtc->primary->fb);
- }
-
- return 0;
-}
-
-static const struct drm_encoder_slave_funcs ch7006_encoder_funcs = {
- .set_config = ch7006_encoder_set_config,
- .destroy = ch7006_encoder_destroy,
- .dpms = ch7006_encoder_dpms,
- .save = ch7006_encoder_save,
- .restore = ch7006_encoder_restore,
- .mode_fixup = ch7006_encoder_mode_fixup,
- .mode_valid = ch7006_encoder_mode_valid,
- .mode_set = ch7006_encoder_mode_set,
- .detect = ch7006_encoder_detect,
- .get_modes = ch7006_encoder_get_modes,
- .create_resources = ch7006_encoder_create_resources,
- .set_property = ch7006_encoder_set_property,
-};
-
-
-/* I2C driver functions */
-
-static int ch7006_probe(struct i2c_client *client)
-{
- uint8_t addr = CH7006_VERSION_ID;
- uint8_t val;
- int ret;
-
- ch7006_dbg(client, "\n");
-
- ret = i2c_master_send(client, &addr, sizeof(addr));
- if (ret < 0)
- goto fail;
-
- ret = i2c_master_recv(client, &val, sizeof(val));
- if (ret < 0)
- goto fail;
-
- ch7006_info(client, "Detected version ID: %x\n", val);
-
- /* I don't know what this is for, but otherwise I get no
- * signal.
- */
- ch7006_write(client, 0x3d, 0x0);
-
- return 0;
-
-fail:
- ch7006_err(client, "Error %d reading version ID\n", ret);
-
- return -ENODEV;
-}
-
-static void ch7006_remove(struct i2c_client *client)
-{
- ch7006_dbg(client, "\n");
-}
-
-static int ch7006_resume(struct device *dev)
-{
- struct i2c_client *client = to_i2c_client(dev);
-
- ch7006_dbg(client, "\n");
-
- ch7006_write(client, 0x3d, 0x0);
-
- return 0;
-}
-
-static int ch7006_encoder_init(struct i2c_client *client,
- struct drm_device *dev,
- struct drm_encoder_slave *encoder)
-{
- struct ch7006_priv *priv;
- int i;
-
- ch7006_dbg(client, "\n");
-
- priv = kzalloc(sizeof(*priv), GFP_KERNEL);
- if (!priv)
- return -ENOMEM;
-
- encoder->slave_priv = priv;
- encoder->slave_funcs = &ch7006_encoder_funcs;
-
- priv->norm = TV_NORM_PAL;
- priv->select_subconnector = DRM_MODE_SUBCONNECTOR_Automatic;
- priv->subconnector = DRM_MODE_SUBCONNECTOR_Unknown;
- priv->scale = 1;
- priv->contrast = 50;
- priv->brightness = 50;
- priv->flicker = 50;
- priv->hmargin = 50;
- priv->vmargin = 50;
- priv->last_dpms = -1;
- priv->chip_version = ch7006_read(client, CH7006_VERSION_ID);
-
- if (ch7006_tv_norm) {
- for (i = 0; i < NUM_TV_NORMS; i++) {
- if (!strcmp(ch7006_tv_norm_names[i], ch7006_tv_norm)) {
- priv->norm = i;
- break;
- }
- }
-
- if (i == NUM_TV_NORMS)
- ch7006_err(client, "Invalid TV norm setting \"%s\".\n",
- ch7006_tv_norm);
- }
-
- if (ch7006_scale >= 0 && ch7006_scale <= 2)
- priv->scale = ch7006_scale;
- else
- ch7006_err(client, "Invalid scale setting \"%d\".\n",
- ch7006_scale);
-
- return 0;
-}
-
-static const struct i2c_device_id ch7006_ids[] = {
- { "ch7006", 0 },
- { }
-};
-MODULE_DEVICE_TABLE(i2c, ch7006_ids);
-
-static const struct dev_pm_ops ch7006_pm_ops = {
- .resume = ch7006_resume,
-};
-
-static struct drm_i2c_encoder_driver ch7006_driver = {
- .i2c_driver = {
- .probe = ch7006_probe,
- .remove = ch7006_remove,
-
- .driver = {
- .name = "ch7006",
- .pm = &ch7006_pm_ops,
- },
-
- .id_table = ch7006_ids,
- },
-
- .encoder_init = ch7006_encoder_init,
-};
-
-
-/* Module initialization */
-
-static int __init ch7006_init(void)
-{
- return drm_i2c_encoder_register(THIS_MODULE, &ch7006_driver);
-}
-
-static void __exit ch7006_exit(void)
-{
- drm_i2c_encoder_unregister(&ch7006_driver);
-}
-
-int ch7006_debug;
-module_param_named(debug, ch7006_debug, int, 0600);
-MODULE_PARM_DESC(debug, "Enable debug output.");
-
-char *ch7006_tv_norm;
-module_param_named(tv_norm, ch7006_tv_norm, charp, 0600);
-MODULE_PARM_DESC(tv_norm, "Default TV norm.\n"
- "\t\tSupported: PAL, PAL-M, PAL-N, PAL-Nc, PAL-60, NTSC-M, NTSC-J.\n"
- "\t\tDefault: PAL");
-
-int ch7006_scale = 1;
-module_param_named(scale, ch7006_scale, int, 0600);
-MODULE_PARM_DESC(scale, "Default scale.\n"
- "\t\tSupported: 0 -> Select video modes with a higher blanking ratio.\n"
- "\t\t\t1 -> Select default video modes.\n"
- "\t\t\t2 -> Select video modes with a lower blanking ratio.");
-
-MODULE_AUTHOR("Francisco Jerez <currojerez@riseup.net>");
-MODULE_DESCRIPTION("Chrontel ch7006 TV encoder driver");
-MODULE_LICENSE("GPL and additional rights");
-
-module_init(ch7006_init);
-module_exit(ch7006_exit);
diff --git a/drivers/gpu/drm/i2c/ch7006_mode.c b/drivers/gpu/drm/i2c/ch7006_mode.c
deleted file mode 100644
index 6afe6d0ee630..000000000000
--- a/drivers/gpu/drm/i2c/ch7006_mode.c
+++ /dev/null
@@ -1,470 +0,0 @@
-/*
- * Copyright (C) 2009 Francisco Jerez.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial
- * portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
- * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-#include "ch7006_priv.h"
-
-const char * const ch7006_tv_norm_names[] = {
- [TV_NORM_PAL] = "PAL",
- [TV_NORM_PAL_M] = "PAL-M",
- [TV_NORM_PAL_N] = "PAL-N",
- [TV_NORM_PAL_NC] = "PAL-Nc",
- [TV_NORM_PAL_60] = "PAL-60",
- [TV_NORM_NTSC_M] = "NTSC-M",
- [TV_NORM_NTSC_J] = "NTSC-J",
-};
-
-#define NTSC_LIKE_TIMINGS .vrefresh = 60 * fixed1/1.001, \
- .vdisplay = 480, \
- .vtotal = 525, \
- .hvirtual = 660
-
-#define PAL_LIKE_TIMINGS .vrefresh = 50 * fixed1, \
- .vdisplay = 576, \
- .vtotal = 625, \
- .hvirtual = 810
-
-const struct ch7006_tv_norm_info ch7006_tv_norms[] = {
- [TV_NORM_NTSC_M] = {
- NTSC_LIKE_TIMINGS,
- .black_level = 0.339 * fixed1,
- .subc_freq = 3579545 * fixed1,
- .dispmode = bitfs(CH7006_DISPMODE_OUTPUT_STD, NTSC),
- .voffset = 0,
- },
- [TV_NORM_NTSC_J] = {
- NTSC_LIKE_TIMINGS,
- .black_level = 0.286 * fixed1,
- .subc_freq = 3579545 * fixed1,
- .dispmode = bitfs(CH7006_DISPMODE_OUTPUT_STD, NTSC_J),
- .voffset = 0,
- },
- [TV_NORM_PAL] = {
- PAL_LIKE_TIMINGS,
- .black_level = 0.3 * fixed1,
- .subc_freq = 4433618.75 * fixed1,
- .dispmode = bitfs(CH7006_DISPMODE_OUTPUT_STD, PAL),
- .voffset = 0,
- },
- [TV_NORM_PAL_M] = {
- NTSC_LIKE_TIMINGS,
- .black_level = 0.339 * fixed1,
- .subc_freq = 3575611.433 * fixed1,
- .dispmode = bitfs(CH7006_DISPMODE_OUTPUT_STD, PAL_M),
- .voffset = 16,
- },
-
- /* The following modes seem to work right but they're
- * undocumented */
-
- [TV_NORM_PAL_N] = {
- PAL_LIKE_TIMINGS,
- .black_level = 0.339 * fixed1,
- .subc_freq = 4433618.75 * fixed1,
- .dispmode = bitfs(CH7006_DISPMODE_OUTPUT_STD, PAL),
- .voffset = 0,
- },
- [TV_NORM_PAL_NC] = {
- PAL_LIKE_TIMINGS,
- .black_level = 0.3 * fixed1,
- .subc_freq = 3582056.25 * fixed1,
- .dispmode = bitfs(CH7006_DISPMODE_OUTPUT_STD, PAL),
- .voffset = 0,
- },
- [TV_NORM_PAL_60] = {
- NTSC_LIKE_TIMINGS,
- .black_level = 0.3 * fixed1,
- .subc_freq = 4433618.75 * fixed1,
- .dispmode = bitfs(CH7006_DISPMODE_OUTPUT_STD, PAL_M),
- .voffset = 16,
- },
-};
-
-#define __MODE(f, hd, vd, ht, vt, hsynp, vsynp, \
- subc, scale, scale_mask, norm_mask, e_hd, e_vd) { \
- .mode = { \
- .name = #hd "x" #vd, \
- .status = 0, \
- .type = DRM_MODE_TYPE_DRIVER, \
- .clock = f, \
- .hdisplay = hd, \
- .hsync_start = e_hd + 16, \
- .hsync_end = e_hd + 80, \
- .htotal = ht, \
- .hskew = 0, \
- .vdisplay = vd, \
- .vsync_start = vd + 10, \
- .vsync_end = vd + 26, \
- .vtotal = vt, \
- .vscan = 0, \
- .flags = DRM_MODE_FLAG_##hsynp##HSYNC | \
- DRM_MODE_FLAG_##vsynp##VSYNC, \
- }, \
- .enc_hdisp = e_hd, \
- .enc_vdisp = e_vd, \
- .subc_coeff = subc * fixed1, \
- .dispmode = bitfs(CH7006_DISPMODE_SCALING_RATIO, scale) | \
- bitfs(CH7006_DISPMODE_INPUT_RES, e_hd##x##e_vd), \
- .valid_scales = scale_mask, \
- .valid_norms = norm_mask \
- }
-
-#define MODE(f, hd, vd, ht, vt, hsynp, vsynp, \
- subc, scale, scale_mask, norm_mask) \
- __MODE(f, hd, vd, ht, vt, hsynp, vsynp, subc, scale, \
- scale_mask, norm_mask, hd, vd)
-
-#define NTSC_LIKE (1 << TV_NORM_NTSC_M | 1 << TV_NORM_NTSC_J | \
- 1 << TV_NORM_PAL_M | 1 << TV_NORM_PAL_60)
-
-#define PAL_LIKE (1 << TV_NORM_PAL | 1 << TV_NORM_PAL_N | 1 << TV_NORM_PAL_NC)
-
-const struct ch7006_mode ch7006_modes[] = {
- MODE(21000, 512, 384, 840, 500, N, N, 181.797557582, 5_4, 0x6, PAL_LIKE),
- MODE(26250, 512, 384, 840, 625, N, N, 145.438046066, 1_1, 0x1, PAL_LIKE),
- MODE(20140, 512, 384, 800, 420, N, N, 213.257083791, 5_4, 0x4, NTSC_LIKE),
- MODE(24671, 512, 384, 784, 525, N, N, 174.0874153, 1_1, 0x3, NTSC_LIKE),
- MODE(28125, 720, 400, 1125, 500, N, N, 135.742176298, 5_4, 0x6, PAL_LIKE),
- MODE(34875, 720, 400, 1116, 625, N, N, 109.469496898, 1_1, 0x1, PAL_LIKE),
- MODE(23790, 720, 400, 945, 420, N, N, 160.475642016, 5_4, 0x4, NTSC_LIKE),
- MODE(29455, 720, 400, 936, 525, N, N, 129.614941843, 1_1, 0x3, NTSC_LIKE),
- MODE(25000, 640, 400, 1000, 500, N, N, 152.709948279, 5_4, 0x6, PAL_LIKE),
- MODE(31500, 640, 400, 1008, 625, N, N, 121.198371646, 1_1, 0x1, PAL_LIKE),
- MODE(21147, 640, 400, 840, 420, N, N, 180.535097338, 5_4, 0x4, NTSC_LIKE),
- MODE(26434, 640, 400, 840, 525, N, N, 144.42807787, 1_1, 0x2, NTSC_LIKE),
- MODE(30210, 640, 400, 840, 600, N, N, 126.374568276, 7_8, 0x1, NTSC_LIKE),
- MODE(21000, 640, 480, 840, 500, N, N, 181.797557582, 5_4, 0x4, PAL_LIKE),
- MODE(26250, 640, 480, 840, 625, N, N, 145.438046066, 1_1, 0x2, PAL_LIKE),
- MODE(31500, 640, 480, 840, 750, N, N, 121.198371646, 5_6, 0x1, PAL_LIKE),
- MODE(24671, 640, 480, 784, 525, N, N, 174.0874153, 1_1, 0x4, NTSC_LIKE),
- MODE(28196, 640, 480, 784, 600, N, N, 152.326488422, 7_8, 0x2, NTSC_LIKE),
- MODE(30210, 640, 480, 800, 630, N, N, 142.171389101, 5_6, 0x1, NTSC_LIKE),
- __MODE(29500, 720, 576, 944, 625, P, P, 145.592111636, 1_1, 0x7, PAL_LIKE, 800, 600),
- MODE(36000, 800, 600, 960, 750, P, P, 119.304647022, 5_6, 0x6, PAL_LIKE),
- MODE(39000, 800, 600, 936, 836, P, P, 110.127366499, 3_4, 0x1, PAL_LIKE),
- MODE(39273, 800, 600, 1040, 630, P, P, 145.816809399, 5_6, 0x4, NTSC_LIKE),
- MODE(43636, 800, 600, 1040, 700, P, P, 131.235128487, 3_4, 0x2, NTSC_LIKE),
- MODE(47832, 800, 600, 1064, 750, P, P, 119.723275165, 7_10, 0x1, NTSC_LIKE),
- {}
-};
-
-const struct ch7006_mode *ch7006_lookup_mode(struct drm_encoder *encoder,
- const struct drm_display_mode *drm_mode)
-{
- struct ch7006_priv *priv = to_ch7006_priv(encoder);
- const struct ch7006_mode *mode;
-
- for (mode = ch7006_modes; mode->mode.clock; mode++) {
-
- if (~mode->valid_norms & 1<<priv->norm)
- continue;
-
- if (mode->mode.hdisplay != drm_mode->hdisplay ||
- mode->mode.vdisplay != drm_mode->vdisplay ||
- mode->mode.vtotal != drm_mode->vtotal ||
- mode->mode.htotal != drm_mode->htotal ||
- mode->mode.clock != drm_mode->clock)
- continue;
-
- return mode;
- }
-
- return NULL;
-}
-
-/* Some common HW state calculation code */
-
-void ch7006_setup_levels(struct drm_encoder *encoder)
-{
- struct i2c_client *client = drm_i2c_encoder_get_client(encoder);
- struct ch7006_priv *priv = to_ch7006_priv(encoder);
- uint8_t *regs = priv->state.regs;
- const struct ch7006_tv_norm_info *norm = &ch7006_tv_norms[priv->norm];
- int gain;
- int black_level;
-
- /* Set DAC_GAIN if the voltage drop between white and black is
- * high enough. */
- if (norm->black_level < 339*fixed1/1000) {
- gain = 76;
-
- regs[CH7006_INPUT_FORMAT] |= CH7006_INPUT_FORMAT_DAC_GAIN;
- } else {
- gain = 71;
-
- regs[CH7006_INPUT_FORMAT] &= ~CH7006_INPUT_FORMAT_DAC_GAIN;
- }
-
- black_level = round_fixed(norm->black_level*26625)/gain;
-
- /* Correct it with the specified brightness. */
- black_level = interpolate(90, black_level, 208, priv->brightness);
-
- regs[CH7006_BLACK_LEVEL] = bitf(CH7006_BLACK_LEVEL_0, black_level);
-
- ch7006_dbg(client, "black level: %d\n", black_level);
-}
-
-void ch7006_setup_subcarrier(struct drm_encoder *encoder)
-{
- struct i2c_client *client = drm_i2c_encoder_get_client(encoder);
- struct ch7006_priv *priv = to_ch7006_priv(encoder);
- struct ch7006_state *state = &priv->state;
- const struct ch7006_tv_norm_info *norm = &ch7006_tv_norms[priv->norm];
- const struct ch7006_mode *mode = priv->mode;
- uint32_t subc_inc;
-
- subc_inc = round_fixed((mode->subc_coeff >> 8)
- * (norm->subc_freq >> 24));
-
- setbitf(state, CH7006_SUBC_INC0, 28, subc_inc);
- setbitf(state, CH7006_SUBC_INC1, 24, subc_inc);
- setbitf(state, CH7006_SUBC_INC2, 20, subc_inc);
- setbitf(state, CH7006_SUBC_INC3, 16, subc_inc);
- setbitf(state, CH7006_SUBC_INC4, 12, subc_inc);
- setbitf(state, CH7006_SUBC_INC5, 8, subc_inc);
- setbitf(state, CH7006_SUBC_INC6, 4, subc_inc);
- setbitf(state, CH7006_SUBC_INC7, 0, subc_inc);
-
- ch7006_dbg(client, "subcarrier inc: %u\n", subc_inc);
-}
-
-void ch7006_setup_pll(struct drm_encoder *encoder)
-{
- struct i2c_client *client = drm_i2c_encoder_get_client(encoder);
- struct ch7006_priv *priv = to_ch7006_priv(encoder);
- uint8_t *regs = priv->state.regs;
- const struct ch7006_mode *mode = priv->mode;
- int n, best_n = 0;
- int m, best_m = 0;
- int freq, best_freq = 0;
-
- for (n = 0; n < CH7006_MAXN; n++) {
- for (m = 0; m < CH7006_MAXM; m++) {
- freq = CH7006_FREQ0*(n+2)/(m+2);
-
- if (abs(freq - mode->mode.clock) <
- abs(best_freq - mode->mode.clock)) {
- best_freq = freq;
- best_n = n;
- best_m = m;
- }
- }
- }
-
- regs[CH7006_PLLOV] = bitf(CH7006_PLLOV_N_8, best_n) |
- bitf(CH7006_PLLOV_M_8, best_m);
-
- regs[CH7006_PLLM] = bitf(CH7006_PLLM_0, best_m);
- regs[CH7006_PLLN] = bitf(CH7006_PLLN_0, best_n);
-
- if (best_n < 108)
- regs[CH7006_PLL_CONTROL] |= CH7006_PLL_CONTROL_CAPACITOR;
- else
- regs[CH7006_PLL_CONTROL] &= ~CH7006_PLL_CONTROL_CAPACITOR;
-
- ch7006_dbg(client, "n=%d m=%d f=%d c=%d\n",
- best_n, best_m, best_freq, best_n < 108);
-}
-
-void ch7006_setup_power_state(struct drm_encoder *encoder)
-{
- struct ch7006_priv *priv = to_ch7006_priv(encoder);
- uint8_t *power = &priv->state.regs[CH7006_POWER];
- int subconnector;
-
- subconnector = priv->select_subconnector ? priv->select_subconnector :
- priv->subconnector;
-
- *power = CH7006_POWER_RESET;
-
- if (priv->last_dpms == DRM_MODE_DPMS_ON) {
- switch (subconnector) {
- case DRM_MODE_SUBCONNECTOR_SVIDEO:
- *power |= bitfs(CH7006_POWER_LEVEL, CVBS_OFF);
- break;
- case DRM_MODE_SUBCONNECTOR_Composite:
- *power |= bitfs(CH7006_POWER_LEVEL, SVIDEO_OFF);
- break;
- case DRM_MODE_SUBCONNECTOR_SCART:
- *power |= bitfs(CH7006_POWER_LEVEL, NORMAL) |
- CH7006_POWER_SCART;
- break;
- }
-
- } else {
- if (priv->chip_version >= 0x20)
- *power |= bitfs(CH7006_POWER_LEVEL, FULL_POWER_OFF);
- else
- *power |= bitfs(CH7006_POWER_LEVEL, POWER_OFF);
- }
-}
-
-void ch7006_setup_properties(struct drm_encoder *encoder)
-{
- struct i2c_client *client = drm_i2c_encoder_get_client(encoder);
- struct ch7006_priv *priv = to_ch7006_priv(encoder);
- struct ch7006_state *state = &priv->state;
- const struct ch7006_tv_norm_info *norm = &ch7006_tv_norms[priv->norm];
- const struct ch7006_mode *ch_mode = priv->mode;
- const struct drm_display_mode *mode = &ch_mode->mode;
- uint8_t *regs = state->regs;
- int flicker, contrast, hpos, vpos;
- uint64_t scale, aspect;
-
- flicker = interpolate(0, 2, 3, priv->flicker);
- regs[CH7006_FFILTER] = bitf(CH7006_FFILTER_TEXT, flicker) |
- bitf(CH7006_FFILTER_LUMA, flicker) |
- bitf(CH7006_FFILTER_CHROMA, 1);
-
- contrast = interpolate(0, 5, 7, priv->contrast);
- regs[CH7006_CONTRAST] = bitf(CH7006_CONTRAST_0, contrast);
-
- scale = norm->vtotal*fixed1;
- do_div(scale, mode->vtotal);
-
- aspect = ch_mode->enc_hdisp*fixed1;
- do_div(aspect, ch_mode->enc_vdisp);
-
- hpos = round_fixed((norm->hvirtual * aspect - mode->hdisplay * scale)
- * priv->hmargin * mode->vtotal) / norm->vtotal / 100 / 4;
-
- setbitf(state, CH7006_POV, HPOS_8, hpos);
- setbitf(state, CH7006_HPOS, 0, hpos);
-
- vpos = max(0, norm->vdisplay - round_fixed(mode->vdisplay*scale)
- + norm->voffset) * priv->vmargin / 100 / 2;
-
- setbitf(state, CH7006_POV, VPOS_8, vpos);
- setbitf(state, CH7006_VPOS, 0, vpos);
-
- ch7006_dbg(client, "hpos: %d, vpos: %d\n", hpos, vpos);
-}
-
-/* HW access functions */
-
-void ch7006_write(struct i2c_client *client, uint8_t addr, uint8_t val)
-{
- uint8_t buf[] = {addr, val};
- int ret;
-
- ret = i2c_master_send(client, buf, ARRAY_SIZE(buf));
- if (ret < 0)
- ch7006_err(client, "Error %d writing to subaddress 0x%x\n",
- ret, addr);
-}
-
-uint8_t ch7006_read(struct i2c_client *client, uint8_t addr)
-{
- uint8_t val;
- int ret;
-
- ret = i2c_master_send(client, &addr, sizeof(addr));
- if (ret < 0)
- goto fail;
-
- ret = i2c_master_recv(client, &val, sizeof(val));
- if (ret < 0)
- goto fail;
-
- return val;
-
-fail:
- ch7006_err(client, "Error %d reading from subaddress 0x%x\n",
- ret, addr);
- return 0;
-}
-
-void ch7006_state_load(struct i2c_client *client,
- struct ch7006_state *state)
-{
- ch7006_load_reg(client, state, CH7006_POWER);
-
- ch7006_load_reg(client, state, CH7006_DISPMODE);
- ch7006_load_reg(client, state, CH7006_FFILTER);
- ch7006_load_reg(client, state, CH7006_BWIDTH);
- ch7006_load_reg(client, state, CH7006_INPUT_FORMAT);
- ch7006_load_reg(client, state, CH7006_CLKMODE);
- ch7006_load_reg(client, state, CH7006_START_ACTIVE);
- ch7006_load_reg(client, state, CH7006_POV);
- ch7006_load_reg(client, state, CH7006_BLACK_LEVEL);
- ch7006_load_reg(client, state, CH7006_HPOS);
- ch7006_load_reg(client, state, CH7006_VPOS);
- ch7006_load_reg(client, state, CH7006_INPUT_SYNC);
- ch7006_load_reg(client, state, CH7006_DETECT);
- ch7006_load_reg(client, state, CH7006_CONTRAST);
- ch7006_load_reg(client, state, CH7006_PLLOV);
- ch7006_load_reg(client, state, CH7006_PLLM);
- ch7006_load_reg(client, state, CH7006_PLLN);
- ch7006_load_reg(client, state, CH7006_BCLKOUT);
- ch7006_load_reg(client, state, CH7006_SUBC_INC0);
- ch7006_load_reg(client, state, CH7006_SUBC_INC1);
- ch7006_load_reg(client, state, CH7006_SUBC_INC2);
- ch7006_load_reg(client, state, CH7006_SUBC_INC3);
- ch7006_load_reg(client, state, CH7006_SUBC_INC4);
- ch7006_load_reg(client, state, CH7006_SUBC_INC5);
- ch7006_load_reg(client, state, CH7006_SUBC_INC6);
- ch7006_load_reg(client, state, CH7006_SUBC_INC7);
- ch7006_load_reg(client, state, CH7006_PLL_CONTROL);
- ch7006_load_reg(client, state, CH7006_CALC_SUBC_INC0);
-}
-
-void ch7006_state_save(struct i2c_client *client,
- struct ch7006_state *state)
-{
- ch7006_save_reg(client, state, CH7006_POWER);
-
- ch7006_save_reg(client, state, CH7006_DISPMODE);
- ch7006_save_reg(client, state, CH7006_FFILTER);
- ch7006_save_reg(client, state, CH7006_BWIDTH);
- ch7006_save_reg(client, state, CH7006_INPUT_FORMAT);
- ch7006_save_reg(client, state, CH7006_CLKMODE);
- ch7006_save_reg(client, state, CH7006_START_ACTIVE);
- ch7006_save_reg(client, state, CH7006_POV);
- ch7006_save_reg(client, state, CH7006_BLACK_LEVEL);
- ch7006_save_reg(client, state, CH7006_HPOS);
- ch7006_save_reg(client, state, CH7006_VPOS);
- ch7006_save_reg(client, state, CH7006_INPUT_SYNC);
- ch7006_save_reg(client, state, CH7006_DETECT);
- ch7006_save_reg(client, state, CH7006_CONTRAST);
- ch7006_save_reg(client, state, CH7006_PLLOV);
- ch7006_save_reg(client, state, CH7006_PLLM);
- ch7006_save_reg(client, state, CH7006_PLLN);
- ch7006_save_reg(client, state, CH7006_BCLKOUT);
- ch7006_save_reg(client, state, CH7006_SUBC_INC0);
- ch7006_save_reg(client, state, CH7006_SUBC_INC1);
- ch7006_save_reg(client, state, CH7006_SUBC_INC2);
- ch7006_save_reg(client, state, CH7006_SUBC_INC3);
- ch7006_save_reg(client, state, CH7006_SUBC_INC4);
- ch7006_save_reg(client, state, CH7006_SUBC_INC5);
- ch7006_save_reg(client, state, CH7006_SUBC_INC6);
- ch7006_save_reg(client, state, CH7006_SUBC_INC7);
- ch7006_save_reg(client, state, CH7006_PLL_CONTROL);
- ch7006_save_reg(client, state, CH7006_CALC_SUBC_INC0);
-
- state->regs[CH7006_FFILTER] = (state->regs[CH7006_FFILTER] & 0xf0) |
- (state->regs[CH7006_FFILTER] & 0x0c) >> 2 |
- (state->regs[CH7006_FFILTER] & 0x03) << 2;
-}
diff --git a/drivers/gpu/drm/i2c/ch7006_priv.h b/drivers/gpu/drm/i2c/ch7006_priv.h
deleted file mode 100644
index 052bdc48a339..000000000000
--- a/drivers/gpu/drm/i2c/ch7006_priv.h
+++ /dev/null
@@ -1,344 +0,0 @@
-/*
- * Copyright (C) 2009 Francisco Jerez.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial
- * portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
- * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-#ifndef __DRM_I2C_CH7006_PRIV_H__
-#define __DRM_I2C_CH7006_PRIV_H__
-
-#include <drm/drm_encoder_slave.h>
-#include <drm/drm_probe_helper.h>
-#include <drm/i2c/ch7006.h>
-
-typedef int64_t fixed;
-#define fixed1 (1LL << 32)
-
-enum ch7006_tv_norm {
- TV_NORM_PAL,
- TV_NORM_PAL_M,
- TV_NORM_PAL_N,
- TV_NORM_PAL_NC,
- TV_NORM_PAL_60,
- TV_NORM_NTSC_M,
- TV_NORM_NTSC_J,
- NUM_TV_NORMS
-};
-
-struct ch7006_tv_norm_info {
- fixed vrefresh;
- int vdisplay;
- int vtotal;
- int hvirtual;
-
- fixed subc_freq;
- fixed black_level;
-
- uint32_t dispmode;
- int voffset;
-};
-
-struct ch7006_mode {
- struct drm_display_mode mode;
-
- int enc_hdisp;
- int enc_vdisp;
-
- fixed subc_coeff;
- uint32_t dispmode;
-
- uint32_t valid_scales;
- uint32_t valid_norms;
-};
-
-struct ch7006_state {
- uint8_t regs[0x26];
-};
-
-struct ch7006_priv {
- struct ch7006_encoder_params params;
- const struct ch7006_mode *mode;
-
- struct ch7006_state state;
- struct ch7006_state saved_state;
-
- struct drm_property *scale_property;
-
- int select_subconnector;
- int subconnector;
- int hmargin;
- int vmargin;
- enum ch7006_tv_norm norm;
- int brightness;
- int contrast;
- int flicker;
- int scale;
-
- int chip_version;
- int last_dpms;
-};
-
-#define to_ch7006_priv(x) \
- ((struct ch7006_priv *)to_encoder_slave(x)->slave_priv)
-
-extern int ch7006_debug;
-extern char *ch7006_tv_norm;
-extern int ch7006_scale;
-
-extern const char * const ch7006_tv_norm_names[];
-extern const struct ch7006_tv_norm_info ch7006_tv_norms[];
-extern const struct ch7006_mode ch7006_modes[];
-
-const struct ch7006_mode *ch7006_lookup_mode(struct drm_encoder *encoder,
- const struct drm_display_mode *drm_mode);
-
-void ch7006_setup_levels(struct drm_encoder *encoder);
-void ch7006_setup_subcarrier(struct drm_encoder *encoder);
-void ch7006_setup_pll(struct drm_encoder *encoder);
-void ch7006_setup_power_state(struct drm_encoder *encoder);
-void ch7006_setup_properties(struct drm_encoder *encoder);
-
-void ch7006_write(struct i2c_client *client, uint8_t addr, uint8_t val);
-uint8_t ch7006_read(struct i2c_client *client, uint8_t addr);
-
-void ch7006_state_load(struct i2c_client *client,
- struct ch7006_state *state);
-void ch7006_state_save(struct i2c_client *client,
- struct ch7006_state *state);
-
-/* Some helper macros */
-
-#define ch7006_dbg(client, format, ...) do { \
- if (ch7006_debug) \
- dev_printk(KERN_DEBUG, &client->dev, \
- "%s: " format, __func__, ## __VA_ARGS__); \
- } while (0)
-#define ch7006_info(client, format, ...) \
- dev_info(&client->dev, format, __VA_ARGS__)
-#define ch7006_err(client, format, ...) \
- dev_err(&client->dev, format, __VA_ARGS__)
-
-#define __mask(src, bitfield) \
- (((2 << (1 ? bitfield)) - 1) & ~((1 << (0 ? bitfield)) - 1))
-#define mask(bitfield) __mask(bitfield)
-
-#define __bitf(src, bitfield, x) \
- (((x) >> (src) << (0 ? bitfield)) & __mask(src, bitfield))
-#define bitf(bitfield, x) __bitf(bitfield, x)
-#define bitfs(bitfield, s) __bitf(bitfield, bitfield##_##s)
-#define setbitf(state, reg, bitfield, x) \
- state->regs[reg] = (state->regs[reg] & ~mask(reg##_##bitfield)) \
- | bitf(reg##_##bitfield, x)
-
-#define __unbitf(src, bitfield, x) \
- ((x & __mask(src, bitfield)) >> (0 ? bitfield) << (src))
-#define unbitf(bitfield, x) __unbitf(bitfield, x)
-
-static inline int interpolate(int y0, int y1, int y2, int x)
-{
- return y1 + (x < 50 ? y1 - y0 : y2 - y1) * (x - 50) / 50;
-}
-
-static inline int32_t round_fixed(fixed x)
-{
- return (x + fixed1/2) >> 32;
-}
-
-#define ch7006_load_reg(client, state, reg) ch7006_write(client, reg, state->regs[reg])
-#define ch7006_save_reg(client, state, reg) state->regs[reg] = ch7006_read(client, reg)
-
-/* Fixed hardware specs */
-
-#define CH7006_FREQ0 14318
-#define CH7006_MAXN 650
-#define CH7006_MAXM 315
-
-/* Register definitions */
-
-#define CH7006_DISPMODE 0x00
-#define CH7006_DISPMODE_INPUT_RES 0, 7:5
-#define CH7006_DISPMODE_INPUT_RES_512x384 0x0
-#define CH7006_DISPMODE_INPUT_RES_720x400 0x1
-#define CH7006_DISPMODE_INPUT_RES_640x400 0x2
-#define CH7006_DISPMODE_INPUT_RES_640x480 0x3
-#define CH7006_DISPMODE_INPUT_RES_800x600 0x4
-#define CH7006_DISPMODE_INPUT_RES_NATIVE 0x5
-#define CH7006_DISPMODE_OUTPUT_STD 0, 4:3
-#define CH7006_DISPMODE_OUTPUT_STD_PAL 0x0
-#define CH7006_DISPMODE_OUTPUT_STD_NTSC 0x1
-#define CH7006_DISPMODE_OUTPUT_STD_PAL_M 0x2
-#define CH7006_DISPMODE_OUTPUT_STD_NTSC_J 0x3
-#define CH7006_DISPMODE_SCALING_RATIO 0, 2:0
-#define CH7006_DISPMODE_SCALING_RATIO_5_4 0x0
-#define CH7006_DISPMODE_SCALING_RATIO_1_1 0x1
-#define CH7006_DISPMODE_SCALING_RATIO_7_8 0x2
-#define CH7006_DISPMODE_SCALING_RATIO_5_6 0x3
-#define CH7006_DISPMODE_SCALING_RATIO_3_4 0x4
-#define CH7006_DISPMODE_SCALING_RATIO_7_10 0x5
-
-#define CH7006_FFILTER 0x01
-#define CH7006_FFILTER_TEXT 0, 5:4
-#define CH7006_FFILTER_LUMA 0, 3:2
-#define CH7006_FFILTER_CHROMA 0, 1:0
-#define CH7006_FFILTER_CHROMA_NO_DCRAWL 0x3
-
-#define CH7006_BWIDTH 0x03
-#define CH7006_BWIDTH_5L_FFILER (1 << 7)
-#define CH7006_BWIDTH_CVBS_NO_CHROMA (1 << 6)
-#define CH7006_BWIDTH_CHROMA 0, 5:4
-#define CH7006_BWIDTH_SVIDEO_YPEAK (1 << 3)
-#define CH7006_BWIDTH_SVIDEO_LUMA 0, 2:1
-#define CH7006_BWIDTH_CVBS_LUMA 0, 0:0
-
-#define CH7006_INPUT_FORMAT 0x04
-#define CH7006_INPUT_FORMAT_DAC_GAIN (1 << 6)
-#define CH7006_INPUT_FORMAT_RGB_PASS_THROUGH (1 << 5)
-#define CH7006_INPUT_FORMAT_FORMAT 0, 3:0
-#define CH7006_INPUT_FORMAT_FORMAT_RGB16 0x0
-#define CH7006_INPUT_FORMAT_FORMAT_YCrCb24m16 0x1
-#define CH7006_INPUT_FORMAT_FORMAT_RGB24m16 0x2
-#define CH7006_INPUT_FORMAT_FORMAT_RGB15 0x3
-#define CH7006_INPUT_FORMAT_FORMAT_RGB24m12C 0x4
-#define CH7006_INPUT_FORMAT_FORMAT_RGB24m12I 0x5
-#define CH7006_INPUT_FORMAT_FORMAT_RGB24m8 0x6
-#define CH7006_INPUT_FORMAT_FORMAT_RGB16m8 0x7
-#define CH7006_INPUT_FORMAT_FORMAT_RGB15m8 0x8
-#define CH7006_INPUT_FORMAT_FORMAT_YCrCb24m8 0x9
-
-#define CH7006_CLKMODE 0x06
-#define CH7006_CLKMODE_SUBC_LOCK (1 << 7)
-#define CH7006_CLKMODE_MASTER (1 << 6)
-#define CH7006_CLKMODE_POS_EDGE (1 << 4)
-#define CH7006_CLKMODE_XCM 0, 3:2
-#define CH7006_CLKMODE_PCM 0, 1:0
-
-#define CH7006_START_ACTIVE 0x07
-#define CH7006_START_ACTIVE_0 0, 7:0
-
-#define CH7006_POV 0x08
-#define CH7006_POV_START_ACTIVE_8 8, 2:2
-#define CH7006_POV_HPOS_8 8, 1:1
-#define CH7006_POV_VPOS_8 8, 0:0
-
-#define CH7006_BLACK_LEVEL 0x09
-#define CH7006_BLACK_LEVEL_0 0, 7:0
-
-#define CH7006_HPOS 0x0a
-#define CH7006_HPOS_0 0, 7:0
-
-#define CH7006_VPOS 0x0b
-#define CH7006_VPOS_0 0, 7:0
-
-#define CH7006_INPUT_SYNC 0x0d
-#define CH7006_INPUT_SYNC_EMBEDDED (1 << 3)
-#define CH7006_INPUT_SYNC_OUTPUT (1 << 2)
-#define CH7006_INPUT_SYNC_PVSYNC (1 << 1)
-#define CH7006_INPUT_SYNC_PHSYNC (1 << 0)
-
-#define CH7006_POWER 0x0e
-#define CH7006_POWER_SCART (1 << 4)
-#define CH7006_POWER_RESET (1 << 3)
-#define CH7006_POWER_LEVEL 0, 2:0
-#define CH7006_POWER_LEVEL_CVBS_OFF 0x0
-#define CH7006_POWER_LEVEL_POWER_OFF 0x1
-#define CH7006_POWER_LEVEL_SVIDEO_OFF 0x2
-#define CH7006_POWER_LEVEL_NORMAL 0x3
-#define CH7006_POWER_LEVEL_FULL_POWER_OFF 0x4
-
-#define CH7006_DETECT 0x10
-#define CH7006_DETECT_SVIDEO_Y_TEST (1 << 3)
-#define CH7006_DETECT_SVIDEO_C_TEST (1 << 2)
-#define CH7006_DETECT_CVBS_TEST (1 << 1)
-#define CH7006_DETECT_SENSE (1 << 0)
-
-#define CH7006_CONTRAST 0x11
-#define CH7006_CONTRAST_0 0, 2:0
-
-#define CH7006_PLLOV 0x13
-#define CH7006_PLLOV_N_8 8, 2:1
-#define CH7006_PLLOV_M_8 8, 0:0
-
-#define CH7006_PLLM 0x14
-#define CH7006_PLLM_0 0, 7:0
-
-#define CH7006_PLLN 0x15
-#define CH7006_PLLN_0 0, 7:0
-
-#define CH7006_BCLKOUT 0x17
-
-#define CH7006_SUBC_INC0 0x18
-#define CH7006_SUBC_INC0_28 28, 3:0
-
-#define CH7006_SUBC_INC1 0x19
-#define CH7006_SUBC_INC1_24 24, 3:0
-
-#define CH7006_SUBC_INC2 0x1a
-#define CH7006_SUBC_INC2_20 20, 3:0
-
-#define CH7006_SUBC_INC3 0x1b
-#define CH7006_SUBC_INC3_GPIO1_VAL (1 << 7)
-#define CH7006_SUBC_INC3_GPIO0_VAL (1 << 6)
-#define CH7006_SUBC_INC3_POUT_3_3V (1 << 5)
-#define CH7006_SUBC_INC3_POUT_INV (1 << 4)
-#define CH7006_SUBC_INC3_16 16, 3:0
-
-#define CH7006_SUBC_INC4 0x1c
-#define CH7006_SUBC_INC4_GPIO1_IN (1 << 7)
-#define CH7006_SUBC_INC4_GPIO0_IN (1 << 6)
-#define CH7006_SUBC_INC4_DS_INPUT (1 << 4)
-#define CH7006_SUBC_INC4_12 12, 3:0
-
-#define CH7006_SUBC_INC5 0x1d
-#define CH7006_SUBC_INC5_8 8, 3:0
-
-#define CH7006_SUBC_INC6 0x1e
-#define CH7006_SUBC_INC6_4 4, 3:0
-
-#define CH7006_SUBC_INC7 0x1f
-#define CH7006_SUBC_INC7_0 0, 3:0
-
-#define CH7006_PLL_CONTROL 0x20
-#define CH7006_PLL_CONTROL_CPI (1 << 5)
-#define CH7006_PLL_CONTROL_CAPACITOR (1 << 4)
-#define CH7006_PLL_CONTROL_7STAGES (1 << 3)
-#define CH7006_PLL_CONTROL_DIGITAL_5V (1 << 2)
-#define CH7006_PLL_CONTROL_ANALOG_5V (1 << 1)
-#define CH7006_PLL_CONTROL_MEMORY_5V (1 << 0)
-
-#define CH7006_CALC_SUBC_INC0 0x21
-#define CH7006_CALC_SUBC_INC0_24 24, 4:3
-#define CH7006_CALC_SUBC_INC0_HYST 0, 2:1
-#define CH7006_CALC_SUBC_INC0_AUTO (1 << 0)
-
-#define CH7006_CALC_SUBC_INC1 0x22
-#define CH7006_CALC_SUBC_INC1_16 16, 7:0
-
-#define CH7006_CALC_SUBC_INC2 0x23
-#define CH7006_CALC_SUBC_INC2_8 8, 7:0
-
-#define CH7006_CALC_SUBC_INC3 0x24
-#define CH7006_CALC_SUBC_INC3_0 0, 7:0
-
-#define CH7006_VERSION_ID 0x25
-
-#endif
diff --git a/drivers/gpu/drm/i2c/sil164_drv.c b/drivers/gpu/drm/i2c/sil164_drv.c
deleted file mode 100644
index ff23422727fc..000000000000
--- a/drivers/gpu/drm/i2c/sil164_drv.c
+++ /dev/null
@@ -1,451 +0,0 @@
-/*
- * Copyright (C) 2010 Francisco Jerez.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial
- * portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
- * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-#include <linux/module.h>
-
-#include <drm/drm_drv.h>
-#include <drm/drm_encoder_slave.h>
-#include <drm/drm_print.h>
-#include <drm/drm_probe_helper.h>
-#include <drm/i2c/sil164.h>
-
-struct sil164_priv {
- struct sil164_encoder_params config;
- struct i2c_client *duallink_slave;
-
- uint8_t saved_state[0x10];
- uint8_t saved_slave_state[0x10];
-};
-
-#define to_sil164_priv(x) \
- ((struct sil164_priv *)to_encoder_slave(x)->slave_priv)
-
-#define sil164_dbg(client, format, ...) do { \
- if (drm_debug_enabled(DRM_UT_KMS)) \
- dev_printk(KERN_DEBUG, &client->dev, \
- "%s: " format, __func__, ## __VA_ARGS__); \
- } while (0)
-#define sil164_info(client, format, ...) \
- dev_info(&client->dev, format, __VA_ARGS__)
-#define sil164_err(client, format, ...) \
- dev_err(&client->dev, format, __VA_ARGS__)
-
-#define SIL164_I2C_ADDR_MASTER 0x38
-#define SIL164_I2C_ADDR_SLAVE 0x39
-
-/* HW register definitions */
-
-#define SIL164_VENDOR_LO 0x0
-#define SIL164_VENDOR_HI 0x1
-#define SIL164_DEVICE_LO 0x2
-#define SIL164_DEVICE_HI 0x3
-#define SIL164_REVISION 0x4
-#define SIL164_FREQ_MIN 0x6
-#define SIL164_FREQ_MAX 0x7
-#define SIL164_CONTROL0 0x8
-# define SIL164_CONTROL0_POWER_ON 0x01
-# define SIL164_CONTROL0_EDGE_RISING 0x02
-# define SIL164_CONTROL0_INPUT_24BIT 0x04
-# define SIL164_CONTROL0_DUAL_EDGE 0x08
-# define SIL164_CONTROL0_HSYNC_ON 0x10
-# define SIL164_CONTROL0_VSYNC_ON 0x20
-#define SIL164_DETECT 0x9
-# define SIL164_DETECT_INTR_STAT 0x01
-# define SIL164_DETECT_HOTPLUG_STAT 0x02
-# define SIL164_DETECT_RECEIVER_STAT 0x04
-# define SIL164_DETECT_INTR_MODE_RECEIVER 0x00
-# define SIL164_DETECT_INTR_MODE_HOTPLUG 0x08
-# define SIL164_DETECT_OUT_MODE_HIGH 0x00
-# define SIL164_DETECT_OUT_MODE_INTR 0x10
-# define SIL164_DETECT_OUT_MODE_RECEIVER 0x20
-# define SIL164_DETECT_OUT_MODE_HOTPLUG 0x30
-# define SIL164_DETECT_VSWING_STAT 0x80
-#define SIL164_CONTROL1 0xa
-# define SIL164_CONTROL1_DESKEW_ENABLE 0x10
-# define SIL164_CONTROL1_DESKEW_INCR_SHIFT 5
-#define SIL164_GPIO 0xb
-#define SIL164_CONTROL2 0xc
-# define SIL164_CONTROL2_FILTER_ENABLE 0x01
-# define SIL164_CONTROL2_FILTER_SETTING_SHIFT 1
-# define SIL164_CONTROL2_DUALLINK_MASTER 0x40
-# define SIL164_CONTROL2_SYNC_CONT 0x80
-#define SIL164_DUALLINK 0xd
-# define SIL164_DUALLINK_ENABLE 0x10
-# define SIL164_DUALLINK_SKEW_SHIFT 5
-#define SIL164_PLLZONE 0xe
-# define SIL164_PLLZONE_STAT 0x08
-# define SIL164_PLLZONE_FORCE_ON 0x10
-# define SIL164_PLLZONE_FORCE_HIGH 0x20
-
-/* HW access functions */
-
-static void
-sil164_write(struct i2c_client *client, uint8_t addr, uint8_t val)
-{
- uint8_t buf[] = {addr, val};
- int ret;
-
- ret = i2c_master_send(client, buf, ARRAY_SIZE(buf));
- if (ret < 0)
- sil164_err(client, "Error %d writing to subaddress 0x%x\n",
- ret, addr);
-}
-
-static uint8_t
-sil164_read(struct i2c_client *client, uint8_t addr)
-{
- uint8_t val;
- int ret;
-
- ret = i2c_master_send(client, &addr, sizeof(addr));
- if (ret < 0)
- goto fail;
-
- ret = i2c_master_recv(client, &val, sizeof(val));
- if (ret < 0)
- goto fail;
-
- return val;
-
-fail:
- sil164_err(client, "Error %d reading from subaddress 0x%x\n",
- ret, addr);
- return 0;
-}
-
-static void
-sil164_save_state(struct i2c_client *client, uint8_t *state)
-{
- int i;
-
- for (i = 0x8; i <= 0xe; i++)
- state[i] = sil164_read(client, i);
-}
-
-static void
-sil164_restore_state(struct i2c_client *client, uint8_t *state)
-{
- int i;
-
- for (i = 0x8; i <= 0xe; i++)
- sil164_write(client, i, state[i]);
-}
-
-static void
-sil164_set_power_state(struct i2c_client *client, bool on)
-{
- uint8_t control0 = sil164_read(client, SIL164_CONTROL0);
-
- if (on)
- control0 |= SIL164_CONTROL0_POWER_ON;
- else
- control0 &= ~SIL164_CONTROL0_POWER_ON;
-
- sil164_write(client, SIL164_CONTROL0, control0);
-}
-
-static void
-sil164_init_state(struct i2c_client *client,
- struct sil164_encoder_params *config,
- bool duallink)
-{
- sil164_write(client, SIL164_CONTROL0,
- SIL164_CONTROL0_HSYNC_ON |
- SIL164_CONTROL0_VSYNC_ON |
- (config->input_edge ? SIL164_CONTROL0_EDGE_RISING : 0) |
- (config->input_width ? SIL164_CONTROL0_INPUT_24BIT : 0) |
- (config->input_dual ? SIL164_CONTROL0_DUAL_EDGE : 0));
-
- sil164_write(client, SIL164_DETECT,
- SIL164_DETECT_INTR_STAT |
- SIL164_DETECT_OUT_MODE_RECEIVER);
-
- sil164_write(client, SIL164_CONTROL1,
- (config->input_skew ? SIL164_CONTROL1_DESKEW_ENABLE : 0) |
- (((config->input_skew + 4) & 0x7)
- << SIL164_CONTROL1_DESKEW_INCR_SHIFT));
-
- sil164_write(client, SIL164_CONTROL2,
- SIL164_CONTROL2_SYNC_CONT |
- (config->pll_filter ? 0 : SIL164_CONTROL2_FILTER_ENABLE) |
- (4 << SIL164_CONTROL2_FILTER_SETTING_SHIFT));
-
- sil164_write(client, SIL164_PLLZONE, 0);
-
- if (duallink)
- sil164_write(client, SIL164_DUALLINK,
- SIL164_DUALLINK_ENABLE |
- (((config->duallink_skew + 4) & 0x7)
- << SIL164_DUALLINK_SKEW_SHIFT));
- else
- sil164_write(client, SIL164_DUALLINK, 0);
-}
-
-/* DRM encoder functions */
-
-static void
-sil164_encoder_set_config(struct drm_encoder *encoder, void *params)
-{
- struct sil164_priv *priv = to_sil164_priv(encoder);
-
- priv->config = *(struct sil164_encoder_params *)params;
-}
-
-static void
-sil164_encoder_dpms(struct drm_encoder *encoder, int mode)
-{
- struct sil164_priv *priv = to_sil164_priv(encoder);
- bool on = (mode == DRM_MODE_DPMS_ON);
- bool duallink = (on && encoder->crtc->mode.clock > 165000);
-
- sil164_set_power_state(drm_i2c_encoder_get_client(encoder), on);
-
- if (priv->duallink_slave)
- sil164_set_power_state(priv->duallink_slave, duallink);
-}
-
-static void
-sil164_encoder_save(struct drm_encoder *encoder)
-{
- struct sil164_priv *priv = to_sil164_priv(encoder);
-
- sil164_save_state(drm_i2c_encoder_get_client(encoder),
- priv->saved_state);
-
- if (priv->duallink_slave)
- sil164_save_state(priv->duallink_slave,
- priv->saved_slave_state);
-}
-
-static void
-sil164_encoder_restore(struct drm_encoder *encoder)
-{
- struct sil164_priv *priv = to_sil164_priv(encoder);
-
- sil164_restore_state(drm_i2c_encoder_get_client(encoder),
- priv->saved_state);
-
- if (priv->duallink_slave)
- sil164_restore_state(priv->duallink_slave,
- priv->saved_slave_state);
-}
-
-static int
-sil164_encoder_mode_valid(struct drm_encoder *encoder,
- struct drm_display_mode *mode)
-{
- struct sil164_priv *priv = to_sil164_priv(encoder);
-
- if (mode->clock < 32000)
- return MODE_CLOCK_LOW;
-
- if (mode->clock > 330000 ||
- (mode->clock > 165000 && !priv->duallink_slave))
- return MODE_CLOCK_HIGH;
-
- return MODE_OK;
-}
-
-static void
-sil164_encoder_mode_set(struct drm_encoder *encoder,
- struct drm_display_mode *mode,
- struct drm_display_mode *adjusted_mode)
-{
- struct sil164_priv *priv = to_sil164_priv(encoder);
- bool duallink = adjusted_mode->clock > 165000;
-
- sil164_init_state(drm_i2c_encoder_get_client(encoder),
- &priv->config, duallink);
-
- if (priv->duallink_slave)
- sil164_init_state(priv->duallink_slave,
- &priv->config, duallink);
-
- sil164_encoder_dpms(encoder, DRM_MODE_DPMS_ON);
-}
-
-static enum drm_connector_status
-sil164_encoder_detect(struct drm_encoder *encoder,
- struct drm_connector *connector)
-{
- struct i2c_client *client = drm_i2c_encoder_get_client(encoder);
-
- if (sil164_read(client, SIL164_DETECT) & SIL164_DETECT_HOTPLUG_STAT)
- return connector_status_connected;
- else
- return connector_status_disconnected;
-}
-
-static int
-sil164_encoder_get_modes(struct drm_encoder *encoder,
- struct drm_connector *connector)
-{
- return 0;
-}
-
-static int
-sil164_encoder_create_resources(struct drm_encoder *encoder,
- struct drm_connector *connector)
-{
- return 0;
-}
-
-static int
-sil164_encoder_set_property(struct drm_encoder *encoder,
- struct drm_connector *connector,
- struct drm_property *property,
- uint64_t val)
-{
- return 0;
-}
-
-static void
-sil164_encoder_destroy(struct drm_encoder *encoder)
-{
- struct sil164_priv *priv = to_sil164_priv(encoder);
-
- i2c_unregister_device(priv->duallink_slave);
-
- kfree(priv);
- drm_i2c_encoder_destroy(encoder);
-}
-
-static const struct drm_encoder_slave_funcs sil164_encoder_funcs = {
- .set_config = sil164_encoder_set_config,
- .destroy = sil164_encoder_destroy,
- .dpms = sil164_encoder_dpms,
- .save = sil164_encoder_save,
- .restore = sil164_encoder_restore,
- .mode_valid = sil164_encoder_mode_valid,
- .mode_set = sil164_encoder_mode_set,
- .detect = sil164_encoder_detect,
- .get_modes = sil164_encoder_get_modes,
- .create_resources = sil164_encoder_create_resources,
- .set_property = sil164_encoder_set_property,
-};
-
-/* I2C driver functions */
-
-static int
-sil164_probe(struct i2c_client *client)
-{
- int vendor = sil164_read(client, SIL164_VENDOR_HI) << 8 |
- sil164_read(client, SIL164_VENDOR_LO);
- int device = sil164_read(client, SIL164_DEVICE_HI) << 8 |
- sil164_read(client, SIL164_DEVICE_LO);
- int rev = sil164_read(client, SIL164_REVISION);
-
- if (vendor != 0x1 || device != 0x6) {
- sil164_dbg(client, "Unknown device %x:%x.%x\n",
- vendor, device, rev);
- return -ENODEV;
- }
-
- sil164_info(client, "Detected device %x:%x.%x\n",
- vendor, device, rev);
-
- return 0;
-}
-
-static struct i2c_client *
-sil164_detect_slave(struct i2c_client *client)
-{
- struct i2c_adapter *adap = client->adapter;
- struct i2c_msg msg = {
- .addr = SIL164_I2C_ADDR_SLAVE,
- .len = 0,
- };
- const struct i2c_board_info info = {
- I2C_BOARD_INFO("sil164", SIL164_I2C_ADDR_SLAVE)
- };
-
- if (i2c_transfer(adap, &msg, 1) != 1) {
- sil164_dbg(adap, "No dual-link slave found.");
- return NULL;
- }
-
- return i2c_new_client_device(adap, &info);
-}
-
-static int
-sil164_encoder_init(struct i2c_client *client,
- struct drm_device *dev,
- struct drm_encoder_slave *encoder)
-{
- struct sil164_priv *priv;
- struct i2c_client *slave_client;
-
- priv = kzalloc(sizeof(*priv), GFP_KERNEL);
- if (!priv)
- return -ENOMEM;
-
- encoder->slave_priv = priv;
- encoder->slave_funcs = &sil164_encoder_funcs;
-
- slave_client = sil164_detect_slave(client);
- if (!IS_ERR(slave_client))
- priv->duallink_slave = slave_client;
-
- return 0;
-}
-
-static const struct i2c_device_id sil164_ids[] = {
- { "sil164", 0 },
- { }
-};
-MODULE_DEVICE_TABLE(i2c, sil164_ids);
-
-static struct drm_i2c_encoder_driver sil164_driver = {
- .i2c_driver = {
- .probe = sil164_probe,
- .driver = {
- .name = "sil164",
- },
- .id_table = sil164_ids,
- },
- .encoder_init = sil164_encoder_init,
-};
-
-/* Module initialization */
-
-static int __init
-sil164_init(void)
-{
- return drm_i2c_encoder_register(THIS_MODULE, &sil164_driver);
-}
-
-static void __exit
-sil164_exit(void)
-{
- drm_i2c_encoder_unregister(&sil164_driver);
-}
-
-MODULE_AUTHOR("Francisco Jerez <currojerez@riseup.net>");
-MODULE_DESCRIPTION("Silicon Image sil164 TMDS transmitter driver");
-MODULE_LICENSE("GPL and additional rights");
-
-module_init(sil164_init);
-module_exit(sil164_exit);
diff --git a/drivers/gpu/drm/i2c/tda9950.c b/drivers/gpu/drm/i2c/tda9950.c
deleted file mode 100644
index 82d618c40dce..000000000000
--- a/drivers/gpu/drm/i2c/tda9950.c
+++ /dev/null
@@ -1,507 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * TDA9950 Consumer Electronics Control driver
- *
- * The NXP TDA9950 implements the HDMI Consumer Electronics Control
- * interface. The host interface is similar to a mailbox: the data
- * registers starting at REG_CDR0 are written to send a command to the
- * internal CPU, and replies are read from these registers.
- *
- * As the data registers represent a mailbox, they must be accessed
- * as a single I2C transaction. See the TDA9950 data sheet for details.
- */
-#include <linux/delay.h>
-#include <linux/i2c.h>
-#include <linux/interrupt.h>
-#include <linux/module.h>
-#include <linux/platform_data/tda9950.h>
-#include <linux/slab.h>
-#include <drm/drm_edid.h>
-#include <media/cec.h>
-#include <media/cec-notifier.h>
-
-enum {
- REG_CSR = 0x00,
- CSR_BUSY = BIT(7),
- CSR_INT = BIT(6),
- CSR_ERR = BIT(5),
-
- REG_CER = 0x01,
-
- REG_CVR = 0x02,
-
- REG_CCR = 0x03,
- CCR_RESET = BIT(7),
- CCR_ON = BIT(6),
-
- REG_ACKH = 0x04,
- REG_ACKL = 0x05,
-
- REG_CCONR = 0x06,
- CCONR_ENABLE_ERROR = BIT(4),
- CCONR_RETRY_MASK = 7,
-
- REG_CDR0 = 0x07,
-
- CDR1_REQ = 0x00,
- CDR1_CNF = 0x01,
- CDR1_IND = 0x81,
- CDR1_ERR = 0x82,
- CDR1_IER = 0x83,
-
- CDR2_CNF_SUCCESS = 0x00,
- CDR2_CNF_OFF_STATE = 0x80,
- CDR2_CNF_BAD_REQ = 0x81,
- CDR2_CNF_CEC_ACCESS = 0x82,
- CDR2_CNF_ARB_ERROR = 0x83,
- CDR2_CNF_BAD_TIMING = 0x84,
- CDR2_CNF_NACK_ADDR = 0x85,
- CDR2_CNF_NACK_DATA = 0x86,
-};
-
-struct tda9950_priv {
- struct i2c_client *client;
- struct device *hdmi;
- struct cec_adapter *adap;
- struct tda9950_glue *glue;
- u16 addresses;
- struct cec_msg rx_msg;
- struct cec_notifier *notify;
- bool open;
-};
-
-static int tda9950_write_range(struct i2c_client *client, u8 addr, u8 *p, int cnt)
-{
- struct i2c_msg msg;
- u8 buf[CEC_MAX_MSG_SIZE + 3];
- int ret;
-
- if (WARN_ON(cnt > sizeof(buf) - 1))
- return -EINVAL;
-
- buf[0] = addr;
- memcpy(buf + 1, p, cnt);
-
- msg.addr = client->addr;
- msg.flags = 0;
- msg.len = cnt + 1;
- msg.buf = buf;
-
- dev_dbg(&client->dev, "wr 0x%02x: %*ph\n", addr, cnt, p);
-
- ret = i2c_transfer(client->adapter, &msg, 1);
- if (ret < 0)
- dev_err(&client->dev, "Error %d writing to cec:0x%x\n", ret, addr);
- return ret < 0 ? ret : 0;
-}
-
-static void tda9950_write(struct i2c_client *client, u8 addr, u8 val)
-{
- tda9950_write_range(client, addr, &val, 1);
-}
-
-static int tda9950_read_range(struct i2c_client *client, u8 addr, u8 *p, int cnt)
-{
- struct i2c_msg msg[2];
- int ret;
-
- msg[0].addr = client->addr;
- msg[0].flags = 0;
- msg[0].len = 1;
- msg[0].buf = &addr;
- msg[1].addr = client->addr;
- msg[1].flags = I2C_M_RD;
- msg[1].len = cnt;
- msg[1].buf = p;
-
- ret = i2c_transfer(client->adapter, msg, 2);
- if (ret < 0)
- dev_err(&client->dev, "Error %d reading from cec:0x%x\n", ret, addr);
-
- dev_dbg(&client->dev, "rd 0x%02x: %*ph\n", addr, cnt, p);
-
- return ret;
-}
-
-static u8 tda9950_read(struct i2c_client *client, u8 addr)
-{
- int ret;
- u8 val;
-
- ret = tda9950_read_range(client, addr, &val, 1);
- if (ret < 0)
- val = 0;
-
- return val;
-}
-
-static irqreturn_t tda9950_irq(int irq, void *data)
-{
- struct tda9950_priv *priv = data;
- unsigned int tx_status;
- u8 csr, cconr, buf[19];
- u8 arb_lost_cnt, nack_cnt, err_cnt;
-
- if (!priv->open)
- return IRQ_NONE;
-
- csr = tda9950_read(priv->client, REG_CSR);
- if (!(csr & CSR_INT))
- return IRQ_NONE;
-
- cconr = tda9950_read(priv->client, REG_CCONR) & CCONR_RETRY_MASK;
-
- tda9950_read_range(priv->client, REG_CDR0, buf, sizeof(buf));
-
- /*
- * This should never happen: the data sheet says that there will
- * always be a valid message if the interrupt line is asserted.
- */
- if (buf[0] == 0) {
- dev_warn(&priv->client->dev, "interrupt pending, but no message?\n");
- return IRQ_NONE;
- }
-
- switch (buf[1]) {
- case CDR1_CNF: /* transmit result */
- arb_lost_cnt = nack_cnt = err_cnt = 0;
- switch (buf[2]) {
- case CDR2_CNF_SUCCESS:
- tx_status = CEC_TX_STATUS_OK;
- break;
-
- case CDR2_CNF_ARB_ERROR:
- tx_status = CEC_TX_STATUS_ARB_LOST;
- arb_lost_cnt = cconr;
- break;
-
- case CDR2_CNF_NACK_ADDR:
- tx_status = CEC_TX_STATUS_NACK;
- nack_cnt = cconr;
- break;
-
- default: /* some other error, refer to TDA9950 docs */
- dev_err(&priv->client->dev, "CNF reply error 0x%02x\n",
- buf[2]);
- tx_status = CEC_TX_STATUS_ERROR;
- err_cnt = cconr;
- break;
- }
- /* TDA9950 executes all retries for us */
- if (tx_status != CEC_TX_STATUS_OK)
- tx_status |= CEC_TX_STATUS_MAX_RETRIES;
- cec_transmit_done(priv->adap, tx_status, arb_lost_cnt,
- nack_cnt, 0, err_cnt);
- break;
-
- case CDR1_IND:
- priv->rx_msg.len = buf[0] - 2;
- if (priv->rx_msg.len > CEC_MAX_MSG_SIZE)
- priv->rx_msg.len = CEC_MAX_MSG_SIZE;
-
- memcpy(priv->rx_msg.msg, buf + 2, priv->rx_msg.len);
- cec_received_msg(priv->adap, &priv->rx_msg);
- break;
-
- default: /* unknown */
- dev_err(&priv->client->dev, "unknown service id 0x%02x\n",
- buf[1]);
- break;
- }
-
- return IRQ_HANDLED;
-}
-
-static int tda9950_cec_transmit(struct cec_adapter *adap, u8 attempts,
- u32 signal_free_time, struct cec_msg *msg)
-{
- struct tda9950_priv *priv = adap->priv;
- u8 buf[CEC_MAX_MSG_SIZE + 2];
-
- buf[0] = 2 + msg->len;
- buf[1] = CDR1_REQ;
- memcpy(buf + 2, msg->msg, msg->len);
-
- if (attempts > 5)
- attempts = 5;
-
- tda9950_write(priv->client, REG_CCONR, attempts);
-
- return tda9950_write_range(priv->client, REG_CDR0, buf, 2 + msg->len);
-}
-
-static int tda9950_cec_adap_log_addr(struct cec_adapter *adap, u8 addr)
-{
- struct tda9950_priv *priv = adap->priv;
- u16 addresses;
- u8 buf[2];
-
- if (addr == CEC_LOG_ADDR_INVALID)
- addresses = priv->addresses = 0;
- else
- addresses = priv->addresses |= BIT(addr);
-
- /* TDA9950 doesn't want address 15 set */
- addresses &= 0x7fff;
- buf[0] = addresses >> 8;
- buf[1] = addresses;
-
- return tda9950_write_range(priv->client, REG_ACKH, buf, 2);
-}
-
-/*
- * When operating as part of the TDA998x, we need additional handling
- * to initialise and shut down the TDA9950 part of the device. These
- * two hooks are provided to allow the TDA998x code to perform those
- * activities.
- */
-static int tda9950_glue_open(struct tda9950_priv *priv)
-{
- int ret = 0;
-
- if (priv->glue && priv->glue->open)
- ret = priv->glue->open(priv->glue->data);
-
- priv->open = true;
-
- return ret;
-}
-
-static void tda9950_glue_release(struct tda9950_priv *priv)
-{
- priv->open = false;
-
- if (priv->glue && priv->glue->release)
- priv->glue->release(priv->glue->data);
-}
-
-static int tda9950_open(struct tda9950_priv *priv)
-{
- struct i2c_client *client = priv->client;
- int ret;
-
- ret = tda9950_glue_open(priv);
- if (ret)
- return ret;
-
- /* Reset the TDA9950, and wait 250ms for it to recover */
- tda9950_write(client, REG_CCR, CCR_RESET);
- msleep(250);
-
- tda9950_cec_adap_log_addr(priv->adap, CEC_LOG_ADDR_INVALID);
-
- /* Start the command processor */
- tda9950_write(client, REG_CCR, CCR_ON);
-
- return 0;
-}
-
-static void tda9950_release(struct tda9950_priv *priv)
-{
- struct i2c_client *client = priv->client;
- int timeout = 50;
- u8 csr;
-
- /* Stop the command processor */
- tda9950_write(client, REG_CCR, 0);
-
- /* Wait up to .5s for it to signal non-busy */
- do {
- csr = tda9950_read(client, REG_CSR);
- if (!(csr & CSR_BUSY) || !--timeout)
- break;
- msleep(10);
- } while (1);
-
- /* Warn the user that their IRQ may die if it's shared. */
- if (csr & CSR_BUSY)
- dev_warn(&client->dev, "command processor failed to stop, irq%d may die (csr=0x%02x)\n",
- client->irq, csr);
-
- tda9950_glue_release(priv);
-}
-
-static int tda9950_cec_adap_enable(struct cec_adapter *adap, bool enable)
-{
- struct tda9950_priv *priv = adap->priv;
-
- if (!enable) {
- tda9950_release(priv);
- return 0;
- } else {
- return tda9950_open(priv);
- }
-}
-
-static const struct cec_adap_ops tda9950_cec_ops = {
- .adap_enable = tda9950_cec_adap_enable,
- .adap_log_addr = tda9950_cec_adap_log_addr,
- .adap_transmit = tda9950_cec_transmit,
-};
-
-/*
- * When operating as part of the TDA998x, we need to claim additional
- * resources. These two hooks permit the management of those resources.
- */
-static void tda9950_devm_glue_exit(void *data)
-{
- struct tda9950_glue *glue = data;
-
- if (glue && glue->exit)
- glue->exit(glue->data);
-}
-
-static int tda9950_devm_glue_init(struct device *dev, struct tda9950_glue *glue)
-{
- int ret;
-
- if (glue && glue->init) {
- ret = glue->init(glue->data);
- if (ret)
- return ret;
- }
-
- ret = devm_add_action(dev, tda9950_devm_glue_exit, glue);
- if (ret)
- tda9950_devm_glue_exit(glue);
-
- return ret;
-}
-
-static void tda9950_cec_del(void *data)
-{
- struct tda9950_priv *priv = data;
-
- cec_delete_adapter(priv->adap);
-}
-
-static int tda9950_probe(struct i2c_client *client)
-{
- struct tda9950_glue *glue = client->dev.platform_data;
- struct device *dev = &client->dev;
- struct tda9950_priv *priv;
- unsigned long irqflags;
- int ret;
- u8 cvr;
-
- /*
- * We must have I2C functionality: our multi-byte accesses
- * must be performed as a single contiguous transaction.
- */
- if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
- dev_err(&client->dev,
- "adapter does not support I2C functionality\n");
- return -ENXIO;
- }
-
- /* We must have an interrupt to be functional. */
- if (client->irq <= 0) {
- dev_err(&client->dev, "driver requires an interrupt\n");
- return -ENXIO;
- }
-
- priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
- if (!priv)
- return -ENOMEM;
-
- priv->client = client;
- priv->glue = glue;
-
- i2c_set_clientdata(client, priv);
-
- /*
- * If we're part of a TDA998x, we want the class devices to be
- * associated with the HDMI Tx so we have a tight relationship
- * between the HDMI interface and the CEC interface.
- */
- priv->hdmi = dev;
- if (glue && glue->parent)
- priv->hdmi = glue->parent;
-
- priv->adap = cec_allocate_adapter(&tda9950_cec_ops, priv, "tda9950",
- CEC_CAP_DEFAULTS |
- CEC_CAP_CONNECTOR_INFO,
- CEC_MAX_LOG_ADDRS);
- if (IS_ERR(priv->adap))
- return PTR_ERR(priv->adap);
-
- ret = devm_add_action(dev, tda9950_cec_del, priv);
- if (ret) {
- cec_delete_adapter(priv->adap);
- return ret;
- }
-
- ret = tda9950_devm_glue_init(dev, glue);
- if (ret)
- return ret;
-
- ret = tda9950_glue_open(priv);
- if (ret)
- return ret;
-
- cvr = tda9950_read(client, REG_CVR);
-
- dev_info(&client->dev,
- "TDA9950 CEC interface, hardware version %u.%u\n",
- cvr >> 4, cvr & 15);
-
- tda9950_glue_release(priv);
-
- irqflags = IRQF_TRIGGER_FALLING;
- if (glue)
- irqflags = glue->irq_flags;
-
- ret = devm_request_threaded_irq(dev, client->irq, NULL, tda9950_irq,
- irqflags | IRQF_SHARED | IRQF_ONESHOT,
- dev_name(&client->dev), priv);
- if (ret < 0)
- return ret;
-
- priv->notify = cec_notifier_cec_adap_register(priv->hdmi, NULL,
- priv->adap);
- if (!priv->notify)
- return -ENOMEM;
-
- ret = cec_register_adapter(priv->adap, priv->hdmi);
- if (ret < 0) {
- cec_notifier_cec_adap_unregister(priv->notify, priv->adap);
- return ret;
- }
-
- /*
- * CEC documentation says we must not call cec_delete_adapter
- * after a successful call to cec_register_adapter().
- */
- devm_remove_action(dev, tda9950_cec_del, priv);
-
- return 0;
-}
-
-static void tda9950_remove(struct i2c_client *client)
-{
- struct tda9950_priv *priv = i2c_get_clientdata(client);
-
- cec_notifier_cec_adap_unregister(priv->notify, priv->adap);
- cec_unregister_adapter(priv->adap);
-}
-
-static struct i2c_device_id tda9950_ids[] = {
- { "tda9950", 0 },
- { },
-};
-MODULE_DEVICE_TABLE(i2c, tda9950_ids);
-
-static struct i2c_driver tda9950_driver = {
- .probe = tda9950_probe,
- .remove = tda9950_remove,
- .driver = {
- .name = "tda9950",
- },
- .id_table = tda9950_ids,
-};
-
-module_i2c_driver(tda9950_driver);
-
-MODULE_AUTHOR("Russell King <rmk+kernel@armlinux.org.uk>");
-MODULE_DESCRIPTION("TDA9950/TDA998x Consumer Electronics Control Driver");
-MODULE_LICENSE("GPL v2");
diff --git a/drivers/gpu/drm/i2c/tda998x_drv.c b/drivers/gpu/drm/i2c/tda998x_drv.c
deleted file mode 100644
index 2160f05bbd16..000000000000
--- a/drivers/gpu/drm/i2c/tda998x_drv.c
+++ /dev/null
@@ -1,2116 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Copyright (C) 2012 Texas Instruments
- * Author: Rob Clark <robdclark@gmail.com>
- */
-
-#include <linux/component.h>
-#include <linux/gpio/consumer.h>
-#include <linux/hdmi.h>
-#include <linux/i2c.h>
-#include <linux/module.h>
-#include <linux/platform_data/tda9950.h>
-#include <linux/irq.h>
-#include <sound/asoundef.h>
-#include <sound/hdmi-codec.h>
-
-#include <drm/drm_atomic_helper.h>
-#include <drm/drm_bridge.h>
-#include <drm/drm_edid.h>
-#include <drm/drm_of.h>
-#include <drm/drm_print.h>
-#include <drm/drm_probe_helper.h>
-#include <drm/drm_simple_kms_helper.h>
-#include <drm/i2c/tda998x.h>
-
-#include <media/cec-notifier.h>
-
-#define DBG(fmt, ...) DRM_DEBUG(fmt"\n", ##__VA_ARGS__)
-
-enum {
- AUDIO_ROUTE_I2S,
- AUDIO_ROUTE_SPDIF,
- AUDIO_ROUTE_NUM
-};
-
-struct tda998x_audio_route {
- u8 ena_aclk;
- u8 mux_ap;
- u8 aip_clksel;
-};
-
-struct tda998x_audio_settings {
- const struct tda998x_audio_route *route;
- struct hdmi_audio_infoframe cea;
- unsigned int sample_rate;
- u8 status[5];
- u8 ena_ap;
- u8 i2s_format;
- u8 cts_n;
-};
-
-struct tda998x_priv {
- struct i2c_client *cec;
- struct i2c_client *hdmi;
- struct mutex mutex;
- u16 rev;
- u8 cec_addr;
- u8 current_page;
- bool is_on;
- bool supports_infoframes;
- bool sink_has_audio;
- enum hdmi_quantization_range rgb_quant_range;
- u8 vip_cntrl_0;
- u8 vip_cntrl_1;
- u8 vip_cntrl_2;
- unsigned long tmds_clock;
- struct tda998x_audio_settings audio;
-
- struct platform_device *audio_pdev;
- struct mutex audio_mutex;
-
- struct mutex edid_mutex;
- wait_queue_head_t wq_edid;
- volatile int wq_edid_wait;
-
- struct work_struct detect_work;
- struct timer_list edid_delay_timer;
- wait_queue_head_t edid_delay_waitq;
- bool edid_delay_active;
-
- struct drm_encoder encoder;
- struct drm_bridge bridge;
- struct drm_connector connector;
-
- u8 audio_port_enable[AUDIO_ROUTE_NUM];
- struct tda9950_glue cec_glue;
- struct gpio_desc *calib;
- struct cec_notifier *cec_notify;
-};
-
-#define conn_to_tda998x_priv(x) \
- container_of(x, struct tda998x_priv, connector)
-#define enc_to_tda998x_priv(x) \
- container_of(x, struct tda998x_priv, encoder)
-#define bridge_to_tda998x_priv(x) \
- container_of(x, struct tda998x_priv, bridge)
-
-/* The TDA9988 series of devices use a paged register scheme.. to simplify
- * things we encode the page # in upper bits of the register #. To read/
- * write a given register, we need to make sure CURPAGE register is set
- * appropriately. Which implies reads/writes are not atomic. Fun!
- */
-
-#define REG(page, addr) (((page) << 8) | (addr))
-#define REG2ADDR(reg) ((reg) & 0xff)
-#define REG2PAGE(reg) (((reg) >> 8) & 0xff)
-
-#define REG_CURPAGE 0xff /* write */
-
-
-/* Page 00h: General Control */
-#define REG_VERSION_LSB REG(0x00, 0x00) /* read */
-#define REG_MAIN_CNTRL0 REG(0x00, 0x01) /* read/write */
-# define MAIN_CNTRL0_SR (1 << 0)
-# define MAIN_CNTRL0_DECS (1 << 1)
-# define MAIN_CNTRL0_DEHS (1 << 2)
-# define MAIN_CNTRL0_CECS (1 << 3)
-# define MAIN_CNTRL0_CEHS (1 << 4)
-# define MAIN_CNTRL0_SCALER (1 << 7)
-#define REG_VERSION_MSB REG(0x00, 0x02) /* read */
-#define REG_SOFTRESET REG(0x00, 0x0a) /* write */
-# define SOFTRESET_AUDIO (1 << 0)
-# define SOFTRESET_I2C_MASTER (1 << 1)
-#define REG_DDC_DISABLE REG(0x00, 0x0b) /* read/write */
-#define REG_CCLK_ON REG(0x00, 0x0c) /* read/write */
-#define REG_I2C_MASTER REG(0x00, 0x0d) /* read/write */
-# define I2C_MASTER_DIS_MM (1 << 0)
-# define I2C_MASTER_DIS_FILT (1 << 1)
-# define I2C_MASTER_APP_STRT_LAT (1 << 2)
-#define REG_FEAT_POWERDOWN REG(0x00, 0x0e) /* read/write */
-# define FEAT_POWERDOWN_PREFILT BIT(0)
-# define FEAT_POWERDOWN_CSC BIT(1)
-# define FEAT_POWERDOWN_SPDIF (1 << 3)
-#define REG_INT_FLAGS_0 REG(0x00, 0x0f) /* read/write */
-#define REG_INT_FLAGS_1 REG(0x00, 0x10) /* read/write */
-#define REG_INT_FLAGS_2 REG(0x00, 0x11) /* read/write */
-# define INT_FLAGS_2_EDID_BLK_RD (1 << 1)
-#define REG_ENA_ACLK REG(0x00, 0x16) /* read/write */
-#define REG_ENA_VP_0 REG(0x00, 0x18) /* read/write */
-#define REG_ENA_VP_1 REG(0x00, 0x19) /* read/write */
-#define REG_ENA_VP_2 REG(0x00, 0x1a) /* read/write */
-#define REG_ENA_AP REG(0x00, 0x1e) /* read/write */
-#define REG_VIP_CNTRL_0 REG(0x00, 0x20) /* write */
-# define VIP_CNTRL_0_MIRR_A (1 << 7)
-# define VIP_CNTRL_0_SWAP_A(x) (((x) & 7) << 4)
-# define VIP_CNTRL_0_MIRR_B (1 << 3)
-# define VIP_CNTRL_0_SWAP_B(x) (((x) & 7) << 0)
-#define REG_VIP_CNTRL_1 REG(0x00, 0x21) /* write */
-# define VIP_CNTRL_1_MIRR_C (1 << 7)
-# define VIP_CNTRL_1_SWAP_C(x) (((x) & 7) << 4)
-# define VIP_CNTRL_1_MIRR_D (1 << 3)
-# define VIP_CNTRL_1_SWAP_D(x) (((x) & 7) << 0)
-#define REG_VIP_CNTRL_2 REG(0x00, 0x22) /* write */
-# define VIP_CNTRL_2_MIRR_E (1 << 7)
-# define VIP_CNTRL_2_SWAP_E(x) (((x) & 7) << 4)
-# define VIP_CNTRL_2_MIRR_F (1 << 3)
-# define VIP_CNTRL_2_SWAP_F(x) (((x) & 7) << 0)
-#define REG_VIP_CNTRL_3 REG(0x00, 0x23) /* write */
-# define VIP_CNTRL_3_X_TGL (1 << 0)
-# define VIP_CNTRL_3_H_TGL (1 << 1)
-# define VIP_CNTRL_3_V_TGL (1 << 2)
-# define VIP_CNTRL_3_EMB (1 << 3)
-# define VIP_CNTRL_3_SYNC_DE (1 << 4)
-# define VIP_CNTRL_3_SYNC_HS (1 << 5)
-# define VIP_CNTRL_3_DE_INT (1 << 6)
-# define VIP_CNTRL_3_EDGE (1 << 7)
-#define REG_VIP_CNTRL_4 REG(0x00, 0x24) /* write */
-# define VIP_CNTRL_4_BLC(x) (((x) & 3) << 0)
-# define VIP_CNTRL_4_BLANKIT(x) (((x) & 3) << 2)
-# define VIP_CNTRL_4_CCIR656 (1 << 4)
-# define VIP_CNTRL_4_656_ALT (1 << 5)
-# define VIP_CNTRL_4_TST_656 (1 << 6)
-# define VIP_CNTRL_4_TST_PAT (1 << 7)
-#define REG_VIP_CNTRL_5 REG(0x00, 0x25) /* write */
-# define VIP_CNTRL_5_CKCASE (1 << 0)
-# define VIP_CNTRL_5_SP_CNT(x) (((x) & 3) << 1)
-#define REG_MUX_AP REG(0x00, 0x26) /* read/write */
-# define MUX_AP_SELECT_I2S 0x64
-# define MUX_AP_SELECT_SPDIF 0x40
-#define REG_MUX_VP_VIP_OUT REG(0x00, 0x27) /* read/write */
-#define REG_MAT_CONTRL REG(0x00, 0x80) /* write */
-# define MAT_CONTRL_MAT_SC(x) (((x) & 3) << 0)
-# define MAT_CONTRL_MAT_BP (1 << 2)
-#define REG_VIDFORMAT REG(0x00, 0xa0) /* write */
-#define REG_REFPIX_MSB REG(0x00, 0xa1) /* write */
-#define REG_REFPIX_LSB REG(0x00, 0xa2) /* write */
-#define REG_REFLINE_MSB REG(0x00, 0xa3) /* write */
-#define REG_REFLINE_LSB REG(0x00, 0xa4) /* write */
-#define REG_NPIX_MSB REG(0x00, 0xa5) /* write */
-#define REG_NPIX_LSB REG(0x00, 0xa6) /* write */
-#define REG_NLINE_MSB REG(0x00, 0xa7) /* write */
-#define REG_NLINE_LSB REG(0x00, 0xa8) /* write */
-#define REG_VS_LINE_STRT_1_MSB REG(0x00, 0xa9) /* write */
-#define REG_VS_LINE_STRT_1_LSB REG(0x00, 0xaa) /* write */
-#define REG_VS_PIX_STRT_1_MSB REG(0x00, 0xab) /* write */
-#define REG_VS_PIX_STRT_1_LSB REG(0x00, 0xac) /* write */
-#define REG_VS_LINE_END_1_MSB REG(0x00, 0xad) /* write */
-#define REG_VS_LINE_END_1_LSB REG(0x00, 0xae) /* write */
-#define REG_VS_PIX_END_1_MSB REG(0x00, 0xaf) /* write */
-#define REG_VS_PIX_END_1_LSB REG(0x00, 0xb0) /* write */
-#define REG_VS_LINE_STRT_2_MSB REG(0x00, 0xb1) /* write */
-#define REG_VS_LINE_STRT_2_LSB REG(0x00, 0xb2) /* write */
-#define REG_VS_PIX_STRT_2_MSB REG(0x00, 0xb3) /* write */
-#define REG_VS_PIX_STRT_2_LSB REG(0x00, 0xb4) /* write */
-#define REG_VS_LINE_END_2_MSB REG(0x00, 0xb5) /* write */
-#define REG_VS_LINE_END_2_LSB REG(0x00, 0xb6) /* write */
-#define REG_VS_PIX_END_2_MSB REG(0x00, 0xb7) /* write */
-#define REG_VS_PIX_END_2_LSB REG(0x00, 0xb8) /* write */
-#define REG_HS_PIX_START_MSB REG(0x00, 0xb9) /* write */
-#define REG_HS_PIX_START_LSB REG(0x00, 0xba) /* write */
-#define REG_HS_PIX_STOP_MSB REG(0x00, 0xbb) /* write */
-#define REG_HS_PIX_STOP_LSB REG(0x00, 0xbc) /* write */
-#define REG_VWIN_START_1_MSB REG(0x00, 0xbd) /* write */
-#define REG_VWIN_START_1_LSB REG(0x00, 0xbe) /* write */
-#define REG_VWIN_END_1_MSB REG(0x00, 0xbf) /* write */
-#define REG_VWIN_END_1_LSB REG(0x00, 0xc0) /* write */
-#define REG_VWIN_START_2_MSB REG(0x00, 0xc1) /* write */
-#define REG_VWIN_START_2_LSB REG(0x00, 0xc2) /* write */
-#define REG_VWIN_END_2_MSB REG(0x00, 0xc3) /* write */
-#define REG_VWIN_END_2_LSB REG(0x00, 0xc4) /* write */
-#define REG_DE_START_MSB REG(0x00, 0xc5) /* write */
-#define REG_DE_START_LSB REG(0x00, 0xc6) /* write */
-#define REG_DE_STOP_MSB REG(0x00, 0xc7) /* write */
-#define REG_DE_STOP_LSB REG(0x00, 0xc8) /* write */
-#define REG_TBG_CNTRL_0 REG(0x00, 0xca) /* write */
-# define TBG_CNTRL_0_TOP_TGL (1 << 0)
-# define TBG_CNTRL_0_TOP_SEL (1 << 1)
-# define TBG_CNTRL_0_DE_EXT (1 << 2)
-# define TBG_CNTRL_0_TOP_EXT (1 << 3)
-# define TBG_CNTRL_0_FRAME_DIS (1 << 5)
-# define TBG_CNTRL_0_SYNC_MTHD (1 << 6)
-# define TBG_CNTRL_0_SYNC_ONCE (1 << 7)
-#define REG_TBG_CNTRL_1 REG(0x00, 0xcb) /* write */
-# define TBG_CNTRL_1_H_TGL (1 << 0)
-# define TBG_CNTRL_1_V_TGL (1 << 1)
-# define TBG_CNTRL_1_TGL_EN (1 << 2)
-# define TBG_CNTRL_1_X_EXT (1 << 3)
-# define TBG_CNTRL_1_H_EXT (1 << 4)
-# define TBG_CNTRL_1_V_EXT (1 << 5)
-# define TBG_CNTRL_1_DWIN_DIS (1 << 6)
-#define REG_ENABLE_SPACE REG(0x00, 0xd6) /* write */
-#define REG_HVF_CNTRL_0 REG(0x00, 0xe4) /* write */
-# define HVF_CNTRL_0_SM (1 << 7)
-# define HVF_CNTRL_0_RWB (1 << 6)
-# define HVF_CNTRL_0_PREFIL(x) (((x) & 3) << 2)
-# define HVF_CNTRL_0_INTPOL(x) (((x) & 3) << 0)
-#define REG_HVF_CNTRL_1 REG(0x00, 0xe5) /* write */
-# define HVF_CNTRL_1_FOR (1 << 0)
-# define HVF_CNTRL_1_YUVBLK (1 << 1)
-# define HVF_CNTRL_1_VQR(x) (((x) & 3) << 2)
-# define HVF_CNTRL_1_PAD(x) (((x) & 3) << 4)
-# define HVF_CNTRL_1_SEMI_PLANAR (1 << 6)
-#define REG_RPT_CNTRL REG(0x00, 0xf0) /* write */
-# define RPT_CNTRL_REPEAT(x) ((x) & 15)
-#define REG_I2S_FORMAT REG(0x00, 0xfc) /* read/write */
-# define I2S_FORMAT_PHILIPS (0 << 0)
-# define I2S_FORMAT_LEFT_J (2 << 0)
-# define I2S_FORMAT_RIGHT_J (3 << 0)
-#define REG_AIP_CLKSEL REG(0x00, 0xfd) /* write */
-# define AIP_CLKSEL_AIP_SPDIF (0 << 3)
-# define AIP_CLKSEL_AIP_I2S (1 << 3)
-# define AIP_CLKSEL_FS_ACLK (0 << 0)
-# define AIP_CLKSEL_FS_MCLK (1 << 0)
-# define AIP_CLKSEL_FS_FS64SPDIF (2 << 0)
-
-/* Page 02h: PLL settings */
-#define REG_PLL_SERIAL_1 REG(0x02, 0x00) /* read/write */
-# define PLL_SERIAL_1_SRL_FDN (1 << 0)
-# define PLL_SERIAL_1_SRL_IZ(x) (((x) & 3) << 1)
-# define PLL_SERIAL_1_SRL_MAN_IZ (1 << 6)
-#define REG_PLL_SERIAL_2 REG(0x02, 0x01) /* read/write */
-# define PLL_SERIAL_2_SRL_NOSC(x) ((x) << 0)
-# define PLL_SERIAL_2_SRL_PR(x) (((x) & 0xf) << 4)
-#define REG_PLL_SERIAL_3 REG(0x02, 0x02) /* read/write */
-# define PLL_SERIAL_3_SRL_CCIR (1 << 0)
-# define PLL_SERIAL_3_SRL_DE (1 << 2)
-# define PLL_SERIAL_3_SRL_PXIN_SEL (1 << 4)
-#define REG_SERIALIZER REG(0x02, 0x03) /* read/write */
-#define REG_BUFFER_OUT REG(0x02, 0x04) /* read/write */
-#define REG_PLL_SCG1 REG(0x02, 0x05) /* read/write */
-#define REG_PLL_SCG2 REG(0x02, 0x06) /* read/write */
-#define REG_PLL_SCGN1 REG(0x02, 0x07) /* read/write */
-#define REG_PLL_SCGN2 REG(0x02, 0x08) /* read/write */
-#define REG_PLL_SCGR1 REG(0x02, 0x09) /* read/write */
-#define REG_PLL_SCGR2 REG(0x02, 0x0a) /* read/write */
-#define REG_AUDIO_DIV REG(0x02, 0x0e) /* read/write */
-# define AUDIO_DIV_SERCLK_1 0
-# define AUDIO_DIV_SERCLK_2 1
-# define AUDIO_DIV_SERCLK_4 2
-# define AUDIO_DIV_SERCLK_8 3
-# define AUDIO_DIV_SERCLK_16 4
-# define AUDIO_DIV_SERCLK_32 5
-#define REG_SEL_CLK REG(0x02, 0x11) /* read/write */
-# define SEL_CLK_SEL_CLK1 (1 << 0)
-# define SEL_CLK_SEL_VRF_CLK(x) (((x) & 3) << 1)
-# define SEL_CLK_ENA_SC_CLK (1 << 3)
-#define REG_ANA_GENERAL REG(0x02, 0x12) /* read/write */
-
-
-/* Page 09h: EDID Control */
-#define REG_EDID_DATA_0 REG(0x09, 0x00) /* read */
-/* next 127 successive registers are the EDID block */
-#define REG_EDID_CTRL REG(0x09, 0xfa) /* read/write */
-#define REG_DDC_ADDR REG(0x09, 0xfb) /* read/write */
-#define REG_DDC_OFFS REG(0x09, 0xfc) /* read/write */
-#define REG_DDC_SEGM_ADDR REG(0x09, 0xfd) /* read/write */
-#define REG_DDC_SEGM REG(0x09, 0xfe) /* read/write */
-
-
-/* Page 10h: information frames and packets */
-#define REG_IF1_HB0 REG(0x10, 0x20) /* read/write */
-#define REG_IF2_HB0 REG(0x10, 0x40) /* read/write */
-#define REG_IF3_HB0 REG(0x10, 0x60) /* read/write */
-#define REG_IF4_HB0 REG(0x10, 0x80) /* read/write */
-#define REG_IF5_HB0 REG(0x10, 0xa0) /* read/write */
-
-
-/* Page 11h: audio settings and content info packets */
-#define REG_AIP_CNTRL_0 REG(0x11, 0x00) /* read/write */
-# define AIP_CNTRL_0_RST_FIFO (1 << 0)
-# define AIP_CNTRL_0_SWAP (1 << 1)
-# define AIP_CNTRL_0_LAYOUT (1 << 2)
-# define AIP_CNTRL_0_ACR_MAN (1 << 5)
-# define AIP_CNTRL_0_RST_CTS (1 << 6)
-#define REG_CA_I2S REG(0x11, 0x01) /* read/write */
-# define CA_I2S_CA_I2S(x) (((x) & 31) << 0)
-# define CA_I2S_HBR_CHSTAT (1 << 6)
-#define REG_LATENCY_RD REG(0x11, 0x04) /* read/write */
-#define REG_ACR_CTS_0 REG(0x11, 0x05) /* read/write */
-#define REG_ACR_CTS_1 REG(0x11, 0x06) /* read/write */
-#define REG_ACR_CTS_2 REG(0x11, 0x07) /* read/write */
-#define REG_ACR_N_0 REG(0x11, 0x08) /* read/write */
-#define REG_ACR_N_1 REG(0x11, 0x09) /* read/write */
-#define REG_ACR_N_2 REG(0x11, 0x0a) /* read/write */
-#define REG_CTS_N REG(0x11, 0x0c) /* read/write */
-# define CTS_N_K(x) (((x) & 7) << 0)
-# define CTS_N_M(x) (((x) & 3) << 4)
-#define REG_ENC_CNTRL REG(0x11, 0x0d) /* read/write */
-# define ENC_CNTRL_RST_ENC (1 << 0)
-# define ENC_CNTRL_RST_SEL (1 << 1)
-# define ENC_CNTRL_CTL_CODE(x) (((x) & 3) << 2)
-#define REG_DIP_FLAGS REG(0x11, 0x0e) /* read/write */
-# define DIP_FLAGS_ACR (1 << 0)
-# define DIP_FLAGS_GC (1 << 1)
-#define REG_DIP_IF_FLAGS REG(0x11, 0x0f) /* read/write */
-# define DIP_IF_FLAGS_IF1 (1 << 1)
-# define DIP_IF_FLAGS_IF2 (1 << 2)
-# define DIP_IF_FLAGS_IF3 (1 << 3)
-# define DIP_IF_FLAGS_IF4 (1 << 4)
-# define DIP_IF_FLAGS_IF5 (1 << 5)
-#define REG_CH_STAT_B(x) REG(0x11, 0x14 + (x)) /* read/write */
-
-
-/* Page 12h: HDCP and OTP */
-#define REG_TX3 REG(0x12, 0x9a) /* read/write */
-#define REG_TX4 REG(0x12, 0x9b) /* read/write */
-# define TX4_PD_RAM (1 << 1)
-#define REG_TX33 REG(0x12, 0xb8) /* read/write */
-# define TX33_HDMI (1 << 1)
-
-
-/* Page 13h: Gamut related metadata packets */
-
-
-
-/* CEC registers: (not paged)
- */
-#define REG_CEC_INTSTATUS 0xee /* read */
-# define CEC_INTSTATUS_CEC (1 << 0)
-# define CEC_INTSTATUS_HDMI (1 << 1)
-#define REG_CEC_CAL_XOSC_CTRL1 0xf2
-# define CEC_CAL_XOSC_CTRL1_ENA_CAL BIT(0)
-#define REG_CEC_DES_FREQ2 0xf5
-# define CEC_DES_FREQ2_DIS_AUTOCAL BIT(7)
-#define REG_CEC_CLK 0xf6
-# define CEC_CLK_FRO 0x11
-#define REG_CEC_FRO_IM_CLK_CTRL 0xfb /* read/write */
-# define CEC_FRO_IM_CLK_CTRL_GHOST_DIS (1 << 7)
-# define CEC_FRO_IM_CLK_CTRL_ENA_OTP (1 << 6)
-# define CEC_FRO_IM_CLK_CTRL_IMCLK_SEL (1 << 1)
-# define CEC_FRO_IM_CLK_CTRL_FRO_DIV (1 << 0)
-#define REG_CEC_RXSHPDINTENA 0xfc /* read/write */
-#define REG_CEC_RXSHPDINT 0xfd /* read */
-# define CEC_RXSHPDINT_RXSENS BIT(0)
-# define CEC_RXSHPDINT_HPD BIT(1)
-#define REG_CEC_RXSHPDLEV 0xfe /* read */
-# define CEC_RXSHPDLEV_RXSENS (1 << 0)
-# define CEC_RXSHPDLEV_HPD (1 << 1)
-
-#define REG_CEC_ENAMODS 0xff /* read/write */
-# define CEC_ENAMODS_EN_CEC_CLK (1 << 7)
-# define CEC_ENAMODS_DIS_FRO (1 << 6)
-# define CEC_ENAMODS_DIS_CCLK (1 << 5)
-# define CEC_ENAMODS_EN_RXSENS (1 << 2)
-# define CEC_ENAMODS_EN_HDMI (1 << 1)
-# define CEC_ENAMODS_EN_CEC (1 << 0)
-
-
-/* Device versions: */
-#define TDA9989N2 0x0101
-#define TDA19989 0x0201
-#define TDA19989N2 0x0202
-#define TDA19988 0x0301
-
-static void
-cec_write(struct tda998x_priv *priv, u16 addr, u8 val)
-{
- u8 buf[] = {addr, val};
- struct i2c_msg msg = {
- .addr = priv->cec_addr,
- .len = 2,
- .buf = buf,
- };
- int ret;
-
- ret = i2c_transfer(priv->hdmi->adapter, &msg, 1);
- if (ret < 0)
- dev_err(&priv->hdmi->dev, "Error %d writing to cec:0x%x\n",
- ret, addr);
-}
-
-static u8
-cec_read(struct tda998x_priv *priv, u8 addr)
-{
- u8 val;
- struct i2c_msg msg[2] = {
- {
- .addr = priv->cec_addr,
- .len = 1,
- .buf = &addr,
- }, {
- .addr = priv->cec_addr,
- .flags = I2C_M_RD,
- .len = 1,
- .buf = &val,
- },
- };
- int ret;
-
- ret = i2c_transfer(priv->hdmi->adapter, msg, ARRAY_SIZE(msg));
- if (ret < 0) {
- dev_err(&priv->hdmi->dev, "Error %d reading from cec:0x%x\n",
- ret, addr);
- val = 0;
- }
-
- return val;
-}
-
-static void cec_enamods(struct tda998x_priv *priv, u8 mods, bool enable)
-{
- int val = cec_read(priv, REG_CEC_ENAMODS);
-
- if (val < 0)
- return;
-
- if (enable)
- val |= mods;
- else
- val &= ~mods;
-
- cec_write(priv, REG_CEC_ENAMODS, val);
-}
-
-static void tda998x_cec_set_calibration(struct tda998x_priv *priv, bool enable)
-{
- if (enable) {
- u8 val;
-
- cec_write(priv, 0xf3, 0xc0);
- cec_write(priv, 0xf4, 0xd4);
-
- /* Enable automatic calibration mode */
- val = cec_read(priv, REG_CEC_DES_FREQ2);
- val &= ~CEC_DES_FREQ2_DIS_AUTOCAL;
- cec_write(priv, REG_CEC_DES_FREQ2, val);
-
- /* Enable free running oscillator */
- cec_write(priv, REG_CEC_CLK, CEC_CLK_FRO);
- cec_enamods(priv, CEC_ENAMODS_DIS_FRO, false);
-
- cec_write(priv, REG_CEC_CAL_XOSC_CTRL1,
- CEC_CAL_XOSC_CTRL1_ENA_CAL);
- } else {
- cec_write(priv, REG_CEC_CAL_XOSC_CTRL1, 0);
- }
-}
-
-/*
- * Calibration for the internal oscillator: we need to set calibration mode,
- * and then pulse the IRQ line low for a 10ms ± 1% period.
- */
-static void tda998x_cec_calibration(struct tda998x_priv *priv)
-{
- struct gpio_desc *calib = priv->calib;
-
- mutex_lock(&priv->edid_mutex);
- if (priv->hdmi->irq > 0)
- disable_irq(priv->hdmi->irq);
- gpiod_direction_output(calib, 1);
- tda998x_cec_set_calibration(priv, true);
-
- local_irq_disable();
- gpiod_set_value(calib, 0);
- mdelay(10);
- gpiod_set_value(calib, 1);
- local_irq_enable();
-
- tda998x_cec_set_calibration(priv, false);
- gpiod_direction_input(calib);
- if (priv->hdmi->irq > 0)
- enable_irq(priv->hdmi->irq);
- mutex_unlock(&priv->edid_mutex);
-}
-
-static int tda998x_cec_hook_init(void *data)
-{
- struct tda998x_priv *priv = data;
- struct gpio_desc *calib;
-
- calib = gpiod_get(&priv->hdmi->dev, "nxp,calib", GPIOD_ASIS);
- if (IS_ERR(calib)) {
- dev_warn(&priv->hdmi->dev, "failed to get calibration gpio: %ld\n",
- PTR_ERR(calib));
- return PTR_ERR(calib);
- }
-
- priv->calib = calib;
-
- return 0;
-}
-
-static void tda998x_cec_hook_exit(void *data)
-{
- struct tda998x_priv *priv = data;
-
- gpiod_put(priv->calib);
- priv->calib = NULL;
-}
-
-static int tda998x_cec_hook_open(void *data)
-{
- struct tda998x_priv *priv = data;
-
- cec_enamods(priv, CEC_ENAMODS_EN_CEC_CLK | CEC_ENAMODS_EN_CEC, true);
- tda998x_cec_calibration(priv);
-
- return 0;
-}
-
-static void tda998x_cec_hook_release(void *data)
-{
- struct tda998x_priv *priv = data;
-
- cec_enamods(priv, CEC_ENAMODS_EN_CEC_CLK | CEC_ENAMODS_EN_CEC, false);
-}
-
-static int
-set_page(struct tda998x_priv *priv, u16 reg)
-{
- if (REG2PAGE(reg) != priv->current_page) {
- struct i2c_client *client = priv->hdmi;
- u8 buf[] = {
- REG_CURPAGE, REG2PAGE(reg)
- };
- int ret = i2c_master_send(client, buf, sizeof(buf));
- if (ret < 0) {
- dev_err(&client->dev, "%s %04x err %d\n", __func__,
- reg, ret);
- return ret;
- }
-
- priv->current_page = REG2PAGE(reg);
- }
- return 0;
-}
-
-static int
-reg_read_range(struct tda998x_priv *priv, u16 reg, char *buf, int cnt)
-{
- struct i2c_client *client = priv->hdmi;
- u8 addr = REG2ADDR(reg);
- int ret;
-
- mutex_lock(&priv->mutex);
- ret = set_page(priv, reg);
- if (ret < 0)
- goto out;
-
- ret = i2c_master_send(client, &addr, sizeof(addr));
- if (ret < 0)
- goto fail;
-
- ret = i2c_master_recv(client, buf, cnt);
- if (ret < 0)
- goto fail;
-
- goto out;
-
-fail:
- dev_err(&client->dev, "Error %d reading from 0x%x\n", ret, reg);
-out:
- mutex_unlock(&priv->mutex);
- return ret;
-}
-
-#define MAX_WRITE_RANGE_BUF 32
-
-static void
-reg_write_range(struct tda998x_priv *priv, u16 reg, u8 *p, int cnt)
-{
- struct i2c_client *client = priv->hdmi;
- /* This is the maximum size of the buffer passed in */
- u8 buf[MAX_WRITE_RANGE_BUF + 1];
- int ret;
-
- if (cnt > MAX_WRITE_RANGE_BUF) {
- dev_err(&client->dev, "Fixed write buffer too small (%d)\n",
- MAX_WRITE_RANGE_BUF);
- return;
- }
-
- buf[0] = REG2ADDR(reg);
- memcpy(&buf[1], p, cnt);
-
- mutex_lock(&priv->mutex);
- ret = set_page(priv, reg);
- if (ret < 0)
- goto out;
-
- ret = i2c_master_send(client, buf, cnt + 1);
- if (ret < 0)
- dev_err(&client->dev, "Error %d writing to 0x%x\n", ret, reg);
-out:
- mutex_unlock(&priv->mutex);
-}
-
-static int
-reg_read(struct tda998x_priv *priv, u16 reg)
-{
- u8 val = 0;
- int ret;
-
- ret = reg_read_range(priv, reg, &val, sizeof(val));
- if (ret < 0)
- return ret;
- return val;
-}
-
-static void
-reg_write(struct tda998x_priv *priv, u16 reg, u8 val)
-{
- struct i2c_client *client = priv->hdmi;
- u8 buf[] = {REG2ADDR(reg), val};
- int ret;
-
- mutex_lock(&priv->mutex);
- ret = set_page(priv, reg);
- if (ret < 0)
- goto out;
-
- ret = i2c_master_send(client, buf, sizeof(buf));
- if (ret < 0)
- dev_err(&client->dev, "Error %d writing to 0x%x\n", ret, reg);
-out:
- mutex_unlock(&priv->mutex);
-}
-
-static void
-reg_write16(struct tda998x_priv *priv, u16 reg, u16 val)
-{
- struct i2c_client *client = priv->hdmi;
- u8 buf[] = {REG2ADDR(reg), val >> 8, val};
- int ret;
-
- mutex_lock(&priv->mutex);
- ret = set_page(priv, reg);
- if (ret < 0)
- goto out;
-
- ret = i2c_master_send(client, buf, sizeof(buf));
- if (ret < 0)
- dev_err(&client->dev, "Error %d writing to 0x%x\n", ret, reg);
-out:
- mutex_unlock(&priv->mutex);
-}
-
-static void
-reg_set(struct tda998x_priv *priv, u16 reg, u8 val)
-{
- int old_val;
-
- old_val = reg_read(priv, reg);
- if (old_val >= 0)
- reg_write(priv, reg, old_val | val);
-}
-
-static void
-reg_clear(struct tda998x_priv *priv, u16 reg, u8 val)
-{
- int old_val;
-
- old_val = reg_read(priv, reg);
- if (old_val >= 0)
- reg_write(priv, reg, old_val & ~val);
-}
-
-static void
-tda998x_reset(struct tda998x_priv *priv)
-{
- /* reset audio and i2c master: */
- reg_write(priv, REG_SOFTRESET, SOFTRESET_AUDIO | SOFTRESET_I2C_MASTER);
- msleep(50);
- reg_write(priv, REG_SOFTRESET, 0);
- msleep(50);
-
- /* reset transmitter: */
- reg_set(priv, REG_MAIN_CNTRL0, MAIN_CNTRL0_SR);
- reg_clear(priv, REG_MAIN_CNTRL0, MAIN_CNTRL0_SR);
-
- /* PLL registers common configuration */
- reg_write(priv, REG_PLL_SERIAL_1, 0x00);
- reg_write(priv, REG_PLL_SERIAL_2, PLL_SERIAL_2_SRL_NOSC(1));
- reg_write(priv, REG_PLL_SERIAL_3, 0x00);
- reg_write(priv, REG_SERIALIZER, 0x00);
- reg_write(priv, REG_BUFFER_OUT, 0x00);
- reg_write(priv, REG_PLL_SCG1, 0x00);
- reg_write(priv, REG_AUDIO_DIV, AUDIO_DIV_SERCLK_8);
- reg_write(priv, REG_SEL_CLK, SEL_CLK_SEL_CLK1 | SEL_CLK_ENA_SC_CLK);
- reg_write(priv, REG_PLL_SCGN1, 0xfa);
- reg_write(priv, REG_PLL_SCGN2, 0x00);
- reg_write(priv, REG_PLL_SCGR1, 0x5b);
- reg_write(priv, REG_PLL_SCGR2, 0x00);
- reg_write(priv, REG_PLL_SCG2, 0x10);
-
- /* Write the default value MUX register */
- reg_write(priv, REG_MUX_VP_VIP_OUT, 0x24);
-}
-
-/*
- * The TDA998x has a problem when trying to read the EDID close to a
- * HPD assertion: it needs a delay of 100ms to avoid timing out while
- * trying to read EDID data.
- *
- * However, tda998x_connector_get_modes() may be called at any moment
- * after tda998x_connector_detect() indicates that we are connected, so
- * we need to delay probing modes in tda998x_connector_get_modes() after
- * we have seen a HPD inactive->active transition. This code implements
- * that delay.
- */
-static void tda998x_edid_delay_done(struct timer_list *t)
-{
- struct tda998x_priv *priv = from_timer(priv, t, edid_delay_timer);
-
- priv->edid_delay_active = false;
- wake_up(&priv->edid_delay_waitq);
- schedule_work(&priv->detect_work);
-}
-
-static void tda998x_edid_delay_start(struct tda998x_priv *priv)
-{
- priv->edid_delay_active = true;
- mod_timer(&priv->edid_delay_timer, jiffies + HZ/10);
-}
-
-static int tda998x_edid_delay_wait(struct tda998x_priv *priv)
-{
- return wait_event_killable(priv->edid_delay_waitq, !priv->edid_delay_active);
-}
-
-/*
- * We need to run the KMS hotplug event helper outside of our threaded
- * interrupt routine as this can call back into our get_modes method,
- * which will want to make use of interrupts.
- */
-static void tda998x_detect_work(struct work_struct *work)
-{
- struct tda998x_priv *priv =
- container_of(work, struct tda998x_priv, detect_work);
- struct drm_device *dev = priv->connector.dev;
-
- if (dev)
- drm_kms_helper_hotplug_event(dev);
-}
-
-/*
- * only 2 interrupts may occur: screen plug/unplug and EDID read
- */
-static irqreturn_t tda998x_irq_thread(int irq, void *data)
-{
- struct tda998x_priv *priv = data;
- u8 sta, cec, lvl, flag0, flag1, flag2;
- bool handled = false;
-
- sta = cec_read(priv, REG_CEC_INTSTATUS);
- if (sta & CEC_INTSTATUS_HDMI) {
- cec = cec_read(priv, REG_CEC_RXSHPDINT);
- lvl = cec_read(priv, REG_CEC_RXSHPDLEV);
- flag0 = reg_read(priv, REG_INT_FLAGS_0);
- flag1 = reg_read(priv, REG_INT_FLAGS_1);
- flag2 = reg_read(priv, REG_INT_FLAGS_2);
- DRM_DEBUG_DRIVER(
- "tda irq sta %02x cec %02x lvl %02x f0 %02x f1 %02x f2 %02x\n",
- sta, cec, lvl, flag0, flag1, flag2);
-
- if (cec & CEC_RXSHPDINT_HPD) {
- if (lvl & CEC_RXSHPDLEV_HPD) {
- tda998x_edid_delay_start(priv);
- } else {
- schedule_work(&priv->detect_work);
- cec_notifier_phys_addr_invalidate(
- priv->cec_notify);
- }
-
- handled = true;
- }
-
- if ((flag2 & INT_FLAGS_2_EDID_BLK_RD) && priv->wq_edid_wait) {
- priv->wq_edid_wait = 0;
- wake_up(&priv->wq_edid);
- handled = true;
- }
- }
-
- return IRQ_RETVAL(handled);
-}
-
-static void
-tda998x_write_if(struct tda998x_priv *priv, u8 bit, u16 addr,
- union hdmi_infoframe *frame)
-{
- u8 buf[MAX_WRITE_RANGE_BUF];
- ssize_t len;
-
- len = hdmi_infoframe_pack(frame, buf, sizeof(buf));
- if (len < 0) {
- dev_err(&priv->hdmi->dev,
- "hdmi_infoframe_pack() type=0x%02x failed: %zd\n",
- frame->any.type, len);
- return;
- }
-
- reg_clear(priv, REG_DIP_IF_FLAGS, bit);
- reg_write_range(priv, addr, buf, len);
- reg_set(priv, REG_DIP_IF_FLAGS, bit);
-}
-
-static void tda998x_write_aif(struct tda998x_priv *priv,
- const struct hdmi_audio_infoframe *cea)
-{
- union hdmi_infoframe frame;
-
- frame.audio = *cea;
-
- tda998x_write_if(priv, DIP_IF_FLAGS_IF4, REG_IF4_HB0, &frame);
-}
-
-static void
-tda998x_write_avi(struct tda998x_priv *priv, const struct drm_display_mode *mode)
-{
- union hdmi_infoframe frame;
-
- drm_hdmi_avi_infoframe_from_display_mode(&frame.avi,
- &priv->connector, mode);
- frame.avi.quantization_range = HDMI_QUANTIZATION_RANGE_FULL;
- drm_hdmi_avi_infoframe_quant_range(&frame.avi, &priv->connector, mode,
- priv->rgb_quant_range);
-
- tda998x_write_if(priv, DIP_IF_FLAGS_IF2, REG_IF2_HB0, &frame);
-}
-
-static void tda998x_write_vsi(struct tda998x_priv *priv,
- const struct drm_display_mode *mode)
-{
- union hdmi_infoframe frame;
-
- if (drm_hdmi_vendor_infoframe_from_display_mode(&frame.vendor.hdmi,
- &priv->connector,
- mode))
- reg_clear(priv, REG_DIP_IF_FLAGS, DIP_IF_FLAGS_IF1);
- else
- tda998x_write_if(priv, DIP_IF_FLAGS_IF1, REG_IF1_HB0, &frame);
-}
-
-/* Audio support */
-
-static const struct tda998x_audio_route tda998x_audio_route[AUDIO_ROUTE_NUM] = {
- [AUDIO_ROUTE_I2S] = {
- .ena_aclk = 1,
- .mux_ap = MUX_AP_SELECT_I2S,
- .aip_clksel = AIP_CLKSEL_AIP_I2S | AIP_CLKSEL_FS_ACLK,
- },
- [AUDIO_ROUTE_SPDIF] = {
- .ena_aclk = 0,
- .mux_ap = MUX_AP_SELECT_SPDIF,
- .aip_clksel = AIP_CLKSEL_AIP_SPDIF | AIP_CLKSEL_FS_FS64SPDIF,
- },
-};
-
-/* Configure the TDA998x audio data and clock routing. */
-static int tda998x_derive_routing(struct tda998x_priv *priv,
- struct tda998x_audio_settings *s,
- unsigned int route)
-{
- s->route = &tda998x_audio_route[route];
- s->ena_ap = priv->audio_port_enable[route];
- if (s->ena_ap == 0) {
- dev_err(&priv->hdmi->dev, "no audio configuration found\n");
- return -EINVAL;
- }
-
- return 0;
-}
-
-/*
- * The audio clock divisor register controls a divider producing Audio_Clk_Out
- * from SERclk by dividing it by 2^n where 0 <= n <= 5. We don't know what
- * Audio_Clk_Out or SERclk are. We guess SERclk is the same as TMDS clock.
- *
- * It seems that Audio_Clk_Out must be the smallest value that is greater
- * than 128*fs, otherwise audio does not function. There is some suggestion
- * that 126*fs is a better value.
- */
-static u8 tda998x_get_adiv(struct tda998x_priv *priv, unsigned int fs)
-{
- unsigned long min_audio_clk = fs * 128;
- unsigned long ser_clk = priv->tmds_clock * 1000;
- u8 adiv;
-
- for (adiv = AUDIO_DIV_SERCLK_32; adiv != AUDIO_DIV_SERCLK_1; adiv--)
- if (ser_clk > min_audio_clk << adiv)
- break;
-
- dev_dbg(&priv->hdmi->dev,
- "ser_clk=%luHz fs=%uHz min_aclk=%luHz adiv=%d\n",
- ser_clk, fs, min_audio_clk, adiv);
-
- return adiv;
-}
-
-/*
- * In auto-CTS mode, the TDA998x uses a "measured time stamp" counter to
- * generate the CTS value. It appears that the "measured time stamp" is
- * the number of TDMS clock cycles within a number of audio input clock
- * cycles defined by the k and N parameters defined below, in a similar
- * way to that which is set out in the CTS generation in the HDMI spec.
- *
- * tmdsclk ----> mts -> /m ---> CTS
- * ^
- * sclk -> /k -> /N
- *
- * CTS = mts / m, where m is 2^M.
- * /k is a divider based on the K value below, K+1 for K < 4, or 8 for K >= 4
- * /N is a divider based on the HDMI specified N value.
- *
- * This produces the following equation:
- * CTS = tmds_clock * k * N / (sclk * m)
- *
- * When combined with the sink-side equation, and realising that sclk is
- * bclk_ratio * fs, we end up with:
- * k = m * bclk_ratio / 128.
- *
- * Note: S/PDIF always uses a bclk_ratio of 64.
- */
-static int tda998x_derive_cts_n(struct tda998x_priv *priv,
- struct tda998x_audio_settings *settings,
- unsigned int ratio)
-{
- switch (ratio) {
- case 16:
- settings->cts_n = CTS_N_M(3) | CTS_N_K(0);
- break;
- case 32:
- settings->cts_n = CTS_N_M(3) | CTS_N_K(1);
- break;
- case 48:
- settings->cts_n = CTS_N_M(3) | CTS_N_K(2);
- break;
- case 64:
- settings->cts_n = CTS_N_M(3) | CTS_N_K(3);
- break;
- case 128:
- settings->cts_n = CTS_N_M(0) | CTS_N_K(0);
- break;
- default:
- dev_err(&priv->hdmi->dev, "unsupported bclk ratio %ufs\n",
- ratio);
- return -EINVAL;
- }
- return 0;
-}
-
-static void tda998x_audio_mute(struct tda998x_priv *priv, bool on)
-{
- if (on) {
- reg_set(priv, REG_SOFTRESET, SOFTRESET_AUDIO);
- reg_clear(priv, REG_SOFTRESET, SOFTRESET_AUDIO);
- reg_set(priv, REG_AIP_CNTRL_0, AIP_CNTRL_0_RST_FIFO);
- } else {
- reg_clear(priv, REG_AIP_CNTRL_0, AIP_CNTRL_0_RST_FIFO);
- }
-}
-
-static void tda998x_configure_audio(struct tda998x_priv *priv)
-{
- const struct tda998x_audio_settings *settings = &priv->audio;
- u8 buf[6], adiv;
- u32 n;
-
- /* If audio is not configured, there is nothing to do. */
- if (settings->ena_ap == 0)
- return;
-
- adiv = tda998x_get_adiv(priv, settings->sample_rate);
-
- /* Enable audio ports */
- reg_write(priv, REG_ENA_AP, settings->ena_ap);
- reg_write(priv, REG_ENA_ACLK, settings->route->ena_aclk);
- reg_write(priv, REG_MUX_AP, settings->route->mux_ap);
- reg_write(priv, REG_I2S_FORMAT, settings->i2s_format);
- reg_write(priv, REG_AIP_CLKSEL, settings->route->aip_clksel);
- reg_clear(priv, REG_AIP_CNTRL_0, AIP_CNTRL_0_LAYOUT |
- AIP_CNTRL_0_ACR_MAN); /* auto CTS */
- reg_write(priv, REG_CTS_N, settings->cts_n);
- reg_write(priv, REG_AUDIO_DIV, adiv);
-
- /*
- * This is the approximate value of N, which happens to be
- * the recommended values for non-coherent clocks.
- */
- n = 128 * settings->sample_rate / 1000;
-
- /* Write the CTS and N values */
- buf[0] = 0x44;
- buf[1] = 0x42;
- buf[2] = 0x01;
- buf[3] = n;
- buf[4] = n >> 8;
- buf[5] = n >> 16;
- reg_write_range(priv, REG_ACR_CTS_0, buf, 6);
-
- /* Reset CTS generator */
- reg_set(priv, REG_AIP_CNTRL_0, AIP_CNTRL_0_RST_CTS);
- reg_clear(priv, REG_AIP_CNTRL_0, AIP_CNTRL_0_RST_CTS);
-
- /* Write the channel status
- * The REG_CH_STAT_B-registers skip IEC958 AES2 byte, because
- * there is a separate register for each I2S wire.
- */
- buf[0] = settings->status[0];
- buf[1] = settings->status[1];
- buf[2] = settings->status[3];
- buf[3] = settings->status[4];
- reg_write_range(priv, REG_CH_STAT_B(0), buf, 4);
-
- tda998x_audio_mute(priv, true);
- msleep(20);
- tda998x_audio_mute(priv, false);
-
- tda998x_write_aif(priv, &settings->cea);
-}
-
-static int tda998x_audio_hw_params(struct device *dev, void *data,
- struct hdmi_codec_daifmt *daifmt,
- struct hdmi_codec_params *params)
-{
- struct tda998x_priv *priv = dev_get_drvdata(dev);
- unsigned int bclk_ratio;
- bool spdif = daifmt->fmt == HDMI_SPDIF;
- int ret;
- struct tda998x_audio_settings audio = {
- .sample_rate = params->sample_rate,
- .cea = params->cea,
- };
-
- memcpy(audio.status, params->iec.status,
- min(sizeof(audio.status), sizeof(params->iec.status)));
-
- switch (daifmt->fmt) {
- case HDMI_I2S:
- audio.i2s_format = I2S_FORMAT_PHILIPS;
- break;
- case HDMI_LEFT_J:
- audio.i2s_format = I2S_FORMAT_LEFT_J;
- break;
- case HDMI_RIGHT_J:
- audio.i2s_format = I2S_FORMAT_RIGHT_J;
- break;
- case HDMI_SPDIF:
- audio.i2s_format = 0;
- break;
- default:
- dev_err(dev, "%s: Invalid format %d\n", __func__, daifmt->fmt);
- return -EINVAL;
- }
-
- if (!spdif &&
- (daifmt->bit_clk_inv || daifmt->frame_clk_inv ||
- daifmt->bit_clk_provider || daifmt->frame_clk_provider)) {
- dev_err(dev, "%s: Bad flags %d %d %d %d\n", __func__,
- daifmt->bit_clk_inv, daifmt->frame_clk_inv,
- daifmt->bit_clk_provider,
- daifmt->frame_clk_provider);
- return -EINVAL;
- }
-
- ret = tda998x_derive_routing(priv, &audio, AUDIO_ROUTE_I2S + spdif);
- if (ret < 0)
- return ret;
-
- bclk_ratio = spdif ? 64 : params->sample_width * 2;
- ret = tda998x_derive_cts_n(priv, &audio, bclk_ratio);
- if (ret < 0)
- return ret;
-
- mutex_lock(&priv->audio_mutex);
- priv->audio = audio;
- if (priv->supports_infoframes && priv->sink_has_audio)
- tda998x_configure_audio(priv);
- mutex_unlock(&priv->audio_mutex);
-
- return 0;
-}
-
-static void tda998x_audio_shutdown(struct device *dev, void *data)
-{
- struct tda998x_priv *priv = dev_get_drvdata(dev);
-
- mutex_lock(&priv->audio_mutex);
-
- reg_write(priv, REG_ENA_AP, 0);
- priv->audio.ena_ap = 0;
-
- mutex_unlock(&priv->audio_mutex);
-}
-
-static int tda998x_audio_mute_stream(struct device *dev, void *data,
- bool enable, int direction)
-{
- struct tda998x_priv *priv = dev_get_drvdata(dev);
-
- mutex_lock(&priv->audio_mutex);
-
- tda998x_audio_mute(priv, enable);
-
- mutex_unlock(&priv->audio_mutex);
- return 0;
-}
-
-static int tda998x_audio_get_eld(struct device *dev, void *data,
- uint8_t *buf, size_t len)
-{
- struct tda998x_priv *priv = dev_get_drvdata(dev);
-
- mutex_lock(&priv->audio_mutex);
- memcpy(buf, priv->connector.eld,
- min(sizeof(priv->connector.eld), len));
- mutex_unlock(&priv->audio_mutex);
-
- return 0;
-}
-
-static const struct hdmi_codec_ops audio_codec_ops = {
- .hw_params = tda998x_audio_hw_params,
- .audio_shutdown = tda998x_audio_shutdown,
- .mute_stream = tda998x_audio_mute_stream,
- .get_eld = tda998x_audio_get_eld,
- .no_capture_mute = 1,
-};
-
-static int tda998x_audio_codec_init(struct tda998x_priv *priv,
- struct device *dev)
-{
- struct hdmi_codec_pdata codec_data = {
- .ops = &audio_codec_ops,
- .max_i2s_channels = 2,
- .no_i2s_capture = 1,
- .no_spdif_capture = 1,
- };
-
- if (priv->audio_port_enable[AUDIO_ROUTE_I2S])
- codec_data.i2s = 1;
- if (priv->audio_port_enable[AUDIO_ROUTE_SPDIF])
- codec_data.spdif = 1;
-
- priv->audio_pdev = platform_device_register_data(
- dev, HDMI_CODEC_DRV_NAME, PLATFORM_DEVID_AUTO,
- &codec_data, sizeof(codec_data));
-
- return PTR_ERR_OR_ZERO(priv->audio_pdev);
-}
-
-/* DRM connector functions */
-
-static enum drm_connector_status
-tda998x_connector_detect(struct drm_connector *connector, bool force)
-{
- struct tda998x_priv *priv = conn_to_tda998x_priv(connector);
- u8 val = cec_read(priv, REG_CEC_RXSHPDLEV);
-
- return (val & CEC_RXSHPDLEV_HPD) ? connector_status_connected :
- connector_status_disconnected;
-}
-
-static void tda998x_connector_destroy(struct drm_connector *connector)
-{
- drm_connector_cleanup(connector);
-}
-
-static const struct drm_connector_funcs tda998x_connector_funcs = {
- .reset = drm_atomic_helper_connector_reset,
- .fill_modes = drm_helper_probe_single_connector_modes,
- .detect = tda998x_connector_detect,
- .destroy = tda998x_connector_destroy,
- .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
- .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
-};
-
-static int read_edid_block(void *data, u8 *buf, unsigned int blk, size_t length)
-{
- struct tda998x_priv *priv = data;
- u8 offset, segptr;
- int ret, i;
-
- offset = (blk & 1) ? 128 : 0;
- segptr = blk / 2;
-
- mutex_lock(&priv->edid_mutex);
-
- reg_write(priv, REG_DDC_ADDR, 0xa0);
- reg_write(priv, REG_DDC_OFFS, offset);
- reg_write(priv, REG_DDC_SEGM_ADDR, 0x60);
- reg_write(priv, REG_DDC_SEGM, segptr);
-
- /* enable reading EDID: */
- priv->wq_edid_wait = 1;
- reg_write(priv, REG_EDID_CTRL, 0x1);
-
- /* flag must be cleared by sw: */
- reg_write(priv, REG_EDID_CTRL, 0x0);
-
- /* wait for block read to complete: */
- if (priv->hdmi->irq) {
- i = wait_event_timeout(priv->wq_edid,
- !priv->wq_edid_wait,
- msecs_to_jiffies(100));
- if (i < 0) {
- dev_err(&priv->hdmi->dev, "read edid wait err %d\n", i);
- ret = i;
- goto failed;
- }
- } else {
- for (i = 100; i > 0; i--) {
- msleep(1);
- ret = reg_read(priv, REG_INT_FLAGS_2);
- if (ret < 0)
- goto failed;
- if (ret & INT_FLAGS_2_EDID_BLK_RD)
- break;
- }
- }
-
- if (i == 0) {
- dev_err(&priv->hdmi->dev, "read edid timeout\n");
- ret = -ETIMEDOUT;
- goto failed;
- }
-
- ret = reg_read_range(priv, REG_EDID_DATA_0, buf, length);
- if (ret != length) {
- dev_err(&priv->hdmi->dev, "failed to read edid block %d: %d\n",
- blk, ret);
- goto failed;
- }
-
- ret = 0;
-
- failed:
- mutex_unlock(&priv->edid_mutex);
- return ret;
-}
-
-static int tda998x_connector_get_modes(struct drm_connector *connector)
-{
- struct tda998x_priv *priv = conn_to_tda998x_priv(connector);
- const struct drm_edid *drm_edid;
- int n;
-
- /*
- * If we get killed while waiting for the HPD timeout, return
- * no modes found: we are not in a restartable path, so we
- * can't handle signals gracefully.
- */
- if (tda998x_edid_delay_wait(priv))
- return 0;
-
- if (priv->rev == TDA19988)
- reg_clear(priv, REG_TX4, TX4_PD_RAM);
-
- drm_edid = drm_edid_read_custom(connector, read_edid_block, priv);
-
- if (priv->rev == TDA19988)
- reg_set(priv, REG_TX4, TX4_PD_RAM);
-
- drm_edid_connector_update(connector, drm_edid);
- cec_notifier_set_phys_addr(priv->cec_notify,
- connector->display_info.source_physical_address);
-
- if (!drm_edid) {
- dev_warn(&priv->hdmi->dev, "failed to read EDID\n");
- return 0;
- }
-
- mutex_lock(&priv->audio_mutex);
- n = drm_edid_connector_add_modes(connector);
- priv->sink_has_audio = connector->display_info.has_audio;
- mutex_unlock(&priv->audio_mutex);
-
- drm_edid_free(drm_edid);
-
- return n;
-}
-
-static struct drm_encoder *
-tda998x_connector_best_encoder(struct drm_connector *connector)
-{
- struct tda998x_priv *priv = conn_to_tda998x_priv(connector);
-
- return priv->bridge.encoder;
-}
-
-static
-const struct drm_connector_helper_funcs tda998x_connector_helper_funcs = {
- .get_modes = tda998x_connector_get_modes,
- .best_encoder = tda998x_connector_best_encoder,
-};
-
-static int tda998x_connector_init(struct tda998x_priv *priv,
- struct drm_device *drm)
-{
- struct drm_connector *connector = &priv->connector;
- int ret;
-
- connector->interlace_allowed = 1;
-
- if (priv->hdmi->irq)
- connector->polled = DRM_CONNECTOR_POLL_HPD;
- else
- connector->polled = DRM_CONNECTOR_POLL_CONNECT |
- DRM_CONNECTOR_POLL_DISCONNECT;
-
- drm_connector_helper_add(connector, &tda998x_connector_helper_funcs);
- ret = drm_connector_init(drm, connector, &tda998x_connector_funcs,
- DRM_MODE_CONNECTOR_HDMIA);
- if (ret)
- return ret;
-
- drm_connector_attach_encoder(&priv->connector,
- priv->bridge.encoder);
-
- return 0;
-}
-
-/* DRM bridge functions */
-
-static int tda998x_bridge_attach(struct drm_bridge *bridge,
- enum drm_bridge_attach_flags flags)
-{
- struct tda998x_priv *priv = bridge_to_tda998x_priv(bridge);
-
- if (flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR) {
- DRM_ERROR("Fix bridge driver to make connector optional!");
- return -EINVAL;
- }
-
- return tda998x_connector_init(priv, bridge->dev);
-}
-
-static void tda998x_bridge_detach(struct drm_bridge *bridge)
-{
- struct tda998x_priv *priv = bridge_to_tda998x_priv(bridge);
-
- drm_connector_cleanup(&priv->connector);
-}
-
-static enum drm_mode_status tda998x_bridge_mode_valid(struct drm_bridge *bridge,
- const struct drm_display_info *info,
- const struct drm_display_mode *mode)
-{
- /* TDA19988 dotclock can go up to 165MHz */
- struct tda998x_priv *priv = bridge_to_tda998x_priv(bridge);
-
- if (mode->clock > ((priv->rev == TDA19988) ? 165000 : 150000))
- return MODE_CLOCK_HIGH;
- if (mode->htotal >= BIT(13))
- return MODE_BAD_HVALUE;
- if (mode->vtotal >= BIT(11))
- return MODE_BAD_VVALUE;
- return MODE_OK;
-}
-
-static void tda998x_bridge_enable(struct drm_bridge *bridge)
-{
- struct tda998x_priv *priv = bridge_to_tda998x_priv(bridge);
-
- if (!priv->is_on) {
- /* enable video ports, audio will be enabled later */
- reg_write(priv, REG_ENA_VP_0, 0xff);
- reg_write(priv, REG_ENA_VP_1, 0xff);
- reg_write(priv, REG_ENA_VP_2, 0xff);
- /* set muxing after enabling ports: */
- reg_write(priv, REG_VIP_CNTRL_0, priv->vip_cntrl_0);
- reg_write(priv, REG_VIP_CNTRL_1, priv->vip_cntrl_1);
- reg_write(priv, REG_VIP_CNTRL_2, priv->vip_cntrl_2);
-
- priv->is_on = true;
- }
-}
-
-static void tda998x_bridge_disable(struct drm_bridge *bridge)
-{
- struct tda998x_priv *priv = bridge_to_tda998x_priv(bridge);
-
- if (priv->is_on) {
- /* disable video ports */
- reg_write(priv, REG_ENA_VP_0, 0x00);
- reg_write(priv, REG_ENA_VP_1, 0x00);
- reg_write(priv, REG_ENA_VP_2, 0x00);
-
- priv->is_on = false;
- }
-}
-
-static void tda998x_bridge_mode_set(struct drm_bridge *bridge,
- const struct drm_display_mode *mode,
- const struct drm_display_mode *adjusted_mode)
-{
- struct tda998x_priv *priv = bridge_to_tda998x_priv(bridge);
- unsigned long tmds_clock;
- u16 ref_pix, ref_line, n_pix, n_line;
- u16 hs_pix_s, hs_pix_e;
- u16 vs1_pix_s, vs1_pix_e, vs1_line_s, vs1_line_e;
- u16 vs2_pix_s, vs2_pix_e, vs2_line_s, vs2_line_e;
- u16 vwin1_line_s, vwin1_line_e;
- u16 vwin2_line_s, vwin2_line_e;
- u16 de_pix_s, de_pix_e;
- u8 reg, div, rep, sel_clk;
-
- /*
- * Since we are "computer" like, our source invariably produces
- * full-range RGB. If the monitor supports full-range, then use
- * it, otherwise reduce to limited-range.
- */
- priv->rgb_quant_range =
- priv->connector.display_info.rgb_quant_range_selectable ?
- HDMI_QUANTIZATION_RANGE_FULL :
- drm_default_rgb_quant_range(adjusted_mode);
-
- /*
- * Internally TDA998x is using ITU-R BT.656 style sync but
- * we get VESA style sync. TDA998x is using a reference pixel
- * relative to ITU to sync to the input frame and for output
- * sync generation. Currently, we are using reference detection
- * from HS/VS, i.e. REFPIX/REFLINE denote frame start sync point
- * which is position of rising VS with coincident rising HS.
- *
- * Now there is some issues to take care of:
- * - HDMI data islands require sync-before-active
- * - TDA998x register values must be > 0 to be enabled
- * - REFLINE needs an additional offset of +1
- * - REFPIX needs an addtional offset of +1 for UYUV and +3 for RGB
- *
- * So we add +1 to all horizontal and vertical register values,
- * plus an additional +3 for REFPIX as we are using RGB input only.
- */
- n_pix = mode->htotal;
- n_line = mode->vtotal;
-
- hs_pix_e = mode->hsync_end - mode->hdisplay;
- hs_pix_s = mode->hsync_start - mode->hdisplay;
- de_pix_e = mode->htotal;
- de_pix_s = mode->htotal - mode->hdisplay;
- ref_pix = 3 + hs_pix_s;
-
- /*
- * Attached LCD controllers may generate broken sync. Allow
- * those to adjust the position of the rising VS edge by adding
- * HSKEW to ref_pix.
- */
- if (adjusted_mode->flags & DRM_MODE_FLAG_HSKEW)
- ref_pix += adjusted_mode->hskew;
-
- if ((mode->flags & DRM_MODE_FLAG_INTERLACE) == 0) {
- ref_line = 1 + mode->vsync_start - mode->vdisplay;
- vwin1_line_s = mode->vtotal - mode->vdisplay - 1;
- vwin1_line_e = vwin1_line_s + mode->vdisplay;
- vs1_pix_s = vs1_pix_e = hs_pix_s;
- vs1_line_s = mode->vsync_start - mode->vdisplay;
- vs1_line_e = vs1_line_s +
- mode->vsync_end - mode->vsync_start;
- vwin2_line_s = vwin2_line_e = 0;
- vs2_pix_s = vs2_pix_e = 0;
- vs2_line_s = vs2_line_e = 0;
- } else {
- ref_line = 1 + (mode->vsync_start - mode->vdisplay)/2;
- vwin1_line_s = (mode->vtotal - mode->vdisplay)/2;
- vwin1_line_e = vwin1_line_s + mode->vdisplay/2;
- vs1_pix_s = vs1_pix_e = hs_pix_s;
- vs1_line_s = (mode->vsync_start - mode->vdisplay)/2;
- vs1_line_e = vs1_line_s +
- (mode->vsync_end - mode->vsync_start)/2;
- vwin2_line_s = vwin1_line_s + mode->vtotal/2;
- vwin2_line_e = vwin2_line_s + mode->vdisplay/2;
- vs2_pix_s = vs2_pix_e = hs_pix_s + mode->htotal/2;
- vs2_line_s = vs1_line_s + mode->vtotal/2 ;
- vs2_line_e = vs2_line_s +
- (mode->vsync_end - mode->vsync_start)/2;
- }
-
- /*
- * Select pixel repeat depending on the double-clock flag
- * (which means we have to repeat each pixel once.)
- */
- rep = mode->flags & DRM_MODE_FLAG_DBLCLK ? 1 : 0;
- sel_clk = SEL_CLK_ENA_SC_CLK | SEL_CLK_SEL_CLK1 |
- SEL_CLK_SEL_VRF_CLK(rep ? 2 : 0);
-
- /* the TMDS clock is scaled up by the pixel repeat */
- tmds_clock = mode->clock * (1 + rep);
-
- /*
- * The divisor is power-of-2. The TDA9983B datasheet gives
- * this as ranges of Msample/s, which is 10x the TMDS clock:
- * 0 - 800 to 1500 Msample/s
- * 1 - 400 to 800 Msample/s
- * 2 - 200 to 400 Msample/s
- * 3 - as 2 above
- */
- for (div = 0; div < 3; div++)
- if (80000 >> div <= tmds_clock)
- break;
-
- mutex_lock(&priv->audio_mutex);
-
- priv->tmds_clock = tmds_clock;
-
- /* mute the audio FIFO: */
- reg_set(priv, REG_AIP_CNTRL_0, AIP_CNTRL_0_RST_FIFO);
-
- /* set HDMI HDCP mode off: */
- reg_write(priv, REG_TBG_CNTRL_1, TBG_CNTRL_1_DWIN_DIS);
- reg_clear(priv, REG_TX33, TX33_HDMI);
- reg_write(priv, REG_ENC_CNTRL, ENC_CNTRL_CTL_CODE(0));
-
- /* no pre-filter or interpolator: */
- reg_write(priv, REG_HVF_CNTRL_0, HVF_CNTRL_0_PREFIL(0) |
- HVF_CNTRL_0_INTPOL(0));
- reg_set(priv, REG_FEAT_POWERDOWN, FEAT_POWERDOWN_PREFILT);
- reg_write(priv, REG_VIP_CNTRL_5, VIP_CNTRL_5_SP_CNT(0));
- reg_write(priv, REG_VIP_CNTRL_4, VIP_CNTRL_4_BLANKIT(0) |
- VIP_CNTRL_4_BLC(0));
-
- reg_clear(priv, REG_PLL_SERIAL_1, PLL_SERIAL_1_SRL_MAN_IZ);
- reg_clear(priv, REG_PLL_SERIAL_3, PLL_SERIAL_3_SRL_CCIR |
- PLL_SERIAL_3_SRL_DE);
- reg_write(priv, REG_SERIALIZER, 0);
- reg_write(priv, REG_HVF_CNTRL_1, HVF_CNTRL_1_VQR(0));
-
- reg_write(priv, REG_RPT_CNTRL, RPT_CNTRL_REPEAT(rep));
- reg_write(priv, REG_SEL_CLK, sel_clk);
- reg_write(priv, REG_PLL_SERIAL_2, PLL_SERIAL_2_SRL_NOSC(div) |
- PLL_SERIAL_2_SRL_PR(rep));
-
- /* set color matrix according to output rgb quant range */
- if (priv->rgb_quant_range == HDMI_QUANTIZATION_RANGE_LIMITED) {
- static u8 tda998x_full_to_limited_range[] = {
- MAT_CONTRL_MAT_SC(2),
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x03, 0x6f, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x03, 0x6f, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x03, 0x6f,
- 0x00, 0x40, 0x00, 0x40, 0x00, 0x40
- };
- reg_clear(priv, REG_FEAT_POWERDOWN, FEAT_POWERDOWN_CSC);
- reg_write_range(priv, REG_MAT_CONTRL,
- tda998x_full_to_limited_range,
- sizeof(tda998x_full_to_limited_range));
- } else {
- reg_write(priv, REG_MAT_CONTRL, MAT_CONTRL_MAT_BP |
- MAT_CONTRL_MAT_SC(1));
- reg_set(priv, REG_FEAT_POWERDOWN, FEAT_POWERDOWN_CSC);
- }
-
- /* set BIAS tmds value: */
- reg_write(priv, REG_ANA_GENERAL, 0x09);
-
- /*
- * Sync on rising HSYNC/VSYNC
- */
- reg = VIP_CNTRL_3_SYNC_HS;
-
- /*
- * TDA19988 requires high-active sync at input stage,
- * so invert low-active sync provided by master encoder here
- */
- if (mode->flags & DRM_MODE_FLAG_NHSYNC)
- reg |= VIP_CNTRL_3_H_TGL;
- if (mode->flags & DRM_MODE_FLAG_NVSYNC)
- reg |= VIP_CNTRL_3_V_TGL;
- reg_write(priv, REG_VIP_CNTRL_3, reg);
-
- reg_write(priv, REG_VIDFORMAT, 0x00);
- reg_write16(priv, REG_REFPIX_MSB, ref_pix);
- reg_write16(priv, REG_REFLINE_MSB, ref_line);
- reg_write16(priv, REG_NPIX_MSB, n_pix);
- reg_write16(priv, REG_NLINE_MSB, n_line);
- reg_write16(priv, REG_VS_LINE_STRT_1_MSB, vs1_line_s);
- reg_write16(priv, REG_VS_PIX_STRT_1_MSB, vs1_pix_s);
- reg_write16(priv, REG_VS_LINE_END_1_MSB, vs1_line_e);
- reg_write16(priv, REG_VS_PIX_END_1_MSB, vs1_pix_e);
- reg_write16(priv, REG_VS_LINE_STRT_2_MSB, vs2_line_s);
- reg_write16(priv, REG_VS_PIX_STRT_2_MSB, vs2_pix_s);
- reg_write16(priv, REG_VS_LINE_END_2_MSB, vs2_line_e);
- reg_write16(priv, REG_VS_PIX_END_2_MSB, vs2_pix_e);
- reg_write16(priv, REG_HS_PIX_START_MSB, hs_pix_s);
- reg_write16(priv, REG_HS_PIX_STOP_MSB, hs_pix_e);
- reg_write16(priv, REG_VWIN_START_1_MSB, vwin1_line_s);
- reg_write16(priv, REG_VWIN_END_1_MSB, vwin1_line_e);
- reg_write16(priv, REG_VWIN_START_2_MSB, vwin2_line_s);
- reg_write16(priv, REG_VWIN_END_2_MSB, vwin2_line_e);
- reg_write16(priv, REG_DE_START_MSB, de_pix_s);
- reg_write16(priv, REG_DE_STOP_MSB, de_pix_e);
-
- if (priv->rev == TDA19988) {
- /* let incoming pixels fill the active space (if any) */
- reg_write(priv, REG_ENABLE_SPACE, 0x00);
- }
-
- /*
- * Always generate sync polarity relative to input sync and
- * revert input stage toggled sync at output stage
- */
- reg = TBG_CNTRL_1_DWIN_DIS | TBG_CNTRL_1_TGL_EN;
- if (mode->flags & DRM_MODE_FLAG_NHSYNC)
- reg |= TBG_CNTRL_1_H_TGL;
- if (mode->flags & DRM_MODE_FLAG_NVSYNC)
- reg |= TBG_CNTRL_1_V_TGL;
- reg_write(priv, REG_TBG_CNTRL_1, reg);
-
- /* must be last register set: */
- reg_write(priv, REG_TBG_CNTRL_0, 0);
-
- /* CEA-861B section 6 says that:
- * CEA version 1 (CEA-861) has no support for infoframes.
- * CEA version 2 (CEA-861A) supports version 1 AVI infoframes,
- * and optional basic audio.
- * CEA version 3 (CEA-861B) supports version 1 and 2 AVI infoframes,
- * and optional digital audio, with audio infoframes.
- *
- * Since we only support generation of version 2 AVI infoframes,
- * ignore CEA version 2 and below (iow, behave as if we're a
- * CEA-861 source.)
- */
- priv->supports_infoframes = priv->connector.display_info.cea_rev >= 3;
-
- if (priv->supports_infoframes) {
- /* We need to turn HDMI HDCP stuff on to get audio through */
- reg &= ~TBG_CNTRL_1_DWIN_DIS;
- reg_write(priv, REG_TBG_CNTRL_1, reg);
- reg_write(priv, REG_ENC_CNTRL, ENC_CNTRL_CTL_CODE(1));
- reg_set(priv, REG_TX33, TX33_HDMI);
-
- tda998x_write_avi(priv, adjusted_mode);
- tda998x_write_vsi(priv, adjusted_mode);
-
- if (priv->sink_has_audio)
- tda998x_configure_audio(priv);
- }
-
- mutex_unlock(&priv->audio_mutex);
-}
-
-static const struct drm_bridge_funcs tda998x_bridge_funcs = {
- .attach = tda998x_bridge_attach,
- .detach = tda998x_bridge_detach,
- .mode_valid = tda998x_bridge_mode_valid,
- .disable = tda998x_bridge_disable,
- .mode_set = tda998x_bridge_mode_set,
- .enable = tda998x_bridge_enable,
-};
-
-/* I2C driver functions */
-
-static int tda998x_get_audio_ports(struct tda998x_priv *priv,
- struct device_node *np)
-{
- const u32 *port_data;
- u32 size;
- int i;
-
- port_data = of_get_property(np, "audio-ports", &size);
- if (!port_data)
- return 0;
-
- size /= sizeof(u32);
- if (size > 2 * ARRAY_SIZE(priv->audio_port_enable) || size % 2 != 0) {
- dev_err(&priv->hdmi->dev,
- "Bad number of elements in audio-ports dt-property\n");
- return -EINVAL;
- }
-
- size /= 2;
-
- for (i = 0; i < size; i++) {
- unsigned int route;
- u8 afmt = be32_to_cpup(&port_data[2*i]);
- u8 ena_ap = be32_to_cpup(&port_data[2*i+1]);
-
- switch (afmt) {
- case AFMT_I2S:
- route = AUDIO_ROUTE_I2S;
- break;
- case AFMT_SPDIF:
- route = AUDIO_ROUTE_SPDIF;
- break;
- default:
- dev_err(&priv->hdmi->dev,
- "Bad audio format %u\n", afmt);
- return -EINVAL;
- }
-
- if (!ena_ap) {
- dev_err(&priv->hdmi->dev, "invalid zero port config\n");
- continue;
- }
-
- if (priv->audio_port_enable[route]) {
- dev_err(&priv->hdmi->dev,
- "%s format already configured\n",
- route == AUDIO_ROUTE_SPDIF ? "SPDIF" : "I2S");
- return -EINVAL;
- }
-
- priv->audio_port_enable[route] = ena_ap;
- }
- return 0;
-}
-
-static int tda998x_set_config(struct tda998x_priv *priv,
- const struct tda998x_encoder_params *p)
-{
- priv->vip_cntrl_0 = VIP_CNTRL_0_SWAP_A(p->swap_a) |
- (p->mirr_a ? VIP_CNTRL_0_MIRR_A : 0) |
- VIP_CNTRL_0_SWAP_B(p->swap_b) |
- (p->mirr_b ? VIP_CNTRL_0_MIRR_B : 0);
- priv->vip_cntrl_1 = VIP_CNTRL_1_SWAP_C(p->swap_c) |
- (p->mirr_c ? VIP_CNTRL_1_MIRR_C : 0) |
- VIP_CNTRL_1_SWAP_D(p->swap_d) |
- (p->mirr_d ? VIP_CNTRL_1_MIRR_D : 0);
- priv->vip_cntrl_2 = VIP_CNTRL_2_SWAP_E(p->swap_e) |
- (p->mirr_e ? VIP_CNTRL_2_MIRR_E : 0) |
- VIP_CNTRL_2_SWAP_F(p->swap_f) |
- (p->mirr_f ? VIP_CNTRL_2_MIRR_F : 0);
-
- if (p->audio_params.format != AFMT_UNUSED) {
- unsigned int ratio, route;
- bool spdif = p->audio_params.format == AFMT_SPDIF;
-
- route = AUDIO_ROUTE_I2S + spdif;
-
- priv->audio.route = &tda998x_audio_route[route];
- priv->audio.cea = p->audio_params.cea;
- priv->audio.sample_rate = p->audio_params.sample_rate;
- memcpy(priv->audio.status, p->audio_params.status,
- min(sizeof(priv->audio.status),
- sizeof(p->audio_params.status)));
- priv->audio.ena_ap = p->audio_params.config;
- priv->audio.i2s_format = I2S_FORMAT_PHILIPS;
-
- ratio = spdif ? 64 : p->audio_params.sample_width * 2;
- return tda998x_derive_cts_n(priv, &priv->audio, ratio);
- }
-
- return 0;
-}
-
-static void tda998x_destroy(struct device *dev)
-{
- struct tda998x_priv *priv = dev_get_drvdata(dev);
-
- drm_bridge_remove(&priv->bridge);
-
- /* disable all IRQs and free the IRQ handler */
- cec_write(priv, REG_CEC_RXSHPDINTENA, 0);
- reg_clear(priv, REG_INT_FLAGS_2, INT_FLAGS_2_EDID_BLK_RD);
-
- if (priv->audio_pdev)
- platform_device_unregister(priv->audio_pdev);
-
- if (priv->hdmi->irq)
- free_irq(priv->hdmi->irq, priv);
-
- del_timer_sync(&priv->edid_delay_timer);
- cancel_work_sync(&priv->detect_work);
-
- i2c_unregister_device(priv->cec);
-
- cec_notifier_conn_unregister(priv->cec_notify);
-}
-
-static int tda998x_create(struct device *dev)
-{
- struct i2c_client *client = to_i2c_client(dev);
- struct device_node *np = client->dev.of_node;
- struct i2c_board_info cec_info;
- struct tda998x_priv *priv;
- u32 video;
- int rev_lo, rev_hi, ret;
-
- priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
- if (!priv)
- return -ENOMEM;
-
- dev_set_drvdata(dev, priv);
-
- mutex_init(&priv->mutex); /* protect the page access */
- mutex_init(&priv->audio_mutex); /* protect access from audio thread */
- mutex_init(&priv->edid_mutex);
- INIT_LIST_HEAD(&priv->bridge.list);
- init_waitqueue_head(&priv->edid_delay_waitq);
- timer_setup(&priv->edid_delay_timer, tda998x_edid_delay_done, 0);
- INIT_WORK(&priv->detect_work, tda998x_detect_work);
-
- priv->vip_cntrl_0 = VIP_CNTRL_0_SWAP_A(2) | VIP_CNTRL_0_SWAP_B(3);
- priv->vip_cntrl_1 = VIP_CNTRL_1_SWAP_C(0) | VIP_CNTRL_1_SWAP_D(1);
- priv->vip_cntrl_2 = VIP_CNTRL_2_SWAP_E(4) | VIP_CNTRL_2_SWAP_F(5);
-
- /* CEC I2C address bound to TDA998x I2C addr by configuration pins */
- priv->cec_addr = 0x34 + (client->addr & 0x03);
- priv->current_page = 0xff;
- priv->hdmi = client;
-
- /* wake up the device: */
- cec_write(priv, REG_CEC_ENAMODS,
- CEC_ENAMODS_EN_RXSENS | CEC_ENAMODS_EN_HDMI);
-
- tda998x_reset(priv);
-
- /* read version: */
- rev_lo = reg_read(priv, REG_VERSION_LSB);
- if (rev_lo < 0) {
- dev_err(dev, "failed to read version: %d\n", rev_lo);
- return rev_lo;
- }
-
- rev_hi = reg_read(priv, REG_VERSION_MSB);
- if (rev_hi < 0) {
- dev_err(dev, "failed to read version: %d\n", rev_hi);
- return rev_hi;
- }
-
- priv->rev = rev_lo | rev_hi << 8;
-
- /* mask off feature bits: */
- priv->rev &= ~0x30; /* not-hdcp and not-scalar bit */
-
- switch (priv->rev) {
- case TDA9989N2:
- dev_info(dev, "found TDA9989 n2");
- break;
- case TDA19989:
- dev_info(dev, "found TDA19989");
- break;
- case TDA19989N2:
- dev_info(dev, "found TDA19989 n2");
- break;
- case TDA19988:
- dev_info(dev, "found TDA19988");
- break;
- default:
- dev_err(dev, "found unsupported device: %04x\n", priv->rev);
- return -ENXIO;
- }
-
- /* after reset, enable DDC: */
- reg_write(priv, REG_DDC_DISABLE, 0x00);
-
- /* set clock on DDC channel: */
- reg_write(priv, REG_TX3, 39);
-
- /* if necessary, disable multi-master: */
- if (priv->rev == TDA19989)
- reg_set(priv, REG_I2C_MASTER, I2C_MASTER_DIS_MM);
-
- cec_write(priv, REG_CEC_FRO_IM_CLK_CTRL,
- CEC_FRO_IM_CLK_CTRL_GHOST_DIS | CEC_FRO_IM_CLK_CTRL_IMCLK_SEL);
-
- /* ensure interrupts are disabled */
- cec_write(priv, REG_CEC_RXSHPDINTENA, 0);
-
- /* clear pending interrupts */
- cec_read(priv, REG_CEC_RXSHPDINT);
- reg_read(priv, REG_INT_FLAGS_0);
- reg_read(priv, REG_INT_FLAGS_1);
- reg_read(priv, REG_INT_FLAGS_2);
-
- /* initialize the optional IRQ */
- if (client->irq) {
- unsigned long irq_flags;
-
- /* init read EDID waitqueue and HDP work */
- init_waitqueue_head(&priv->wq_edid);
-
- irq_flags =
- irqd_get_trigger_type(irq_get_irq_data(client->irq));
-
- priv->cec_glue.irq_flags = irq_flags;
-
- irq_flags |= IRQF_SHARED | IRQF_ONESHOT;
- ret = request_threaded_irq(client->irq, NULL,
- tda998x_irq_thread, irq_flags,
- "tda998x", priv);
- if (ret) {
- dev_err(dev, "failed to request IRQ#%u: %d\n",
- client->irq, ret);
- goto err_irq;
- }
-
- /* enable HPD irq */
- cec_write(priv, REG_CEC_RXSHPDINTENA, CEC_RXSHPDLEV_HPD);
- }
-
- priv->cec_notify = cec_notifier_conn_register(dev, NULL, NULL);
- if (!priv->cec_notify) {
- ret = -ENOMEM;
- goto fail;
- }
-
- priv->cec_glue.parent = dev;
- priv->cec_glue.data = priv;
- priv->cec_glue.init = tda998x_cec_hook_init;
- priv->cec_glue.exit = tda998x_cec_hook_exit;
- priv->cec_glue.open = tda998x_cec_hook_open;
- priv->cec_glue.release = tda998x_cec_hook_release;
-
- /*
- * Some TDA998x are actually two I2C devices merged onto one piece
- * of silicon: TDA9989 and TDA19989 combine the HDMI transmitter
- * with a slightly modified TDA9950 CEC device. The CEC device
- * is at the TDA9950 address, with the address pins strapped across
- * to the TDA998x address pins. Hence, it always has the same
- * offset.
- */
- memset(&cec_info, 0, sizeof(cec_info));
- strscpy(cec_info.type, "tda9950", sizeof(cec_info.type));
- cec_info.addr = priv->cec_addr;
- cec_info.platform_data = &priv->cec_glue;
- cec_info.irq = client->irq;
-
- priv->cec = i2c_new_client_device(client->adapter, &cec_info);
- if (IS_ERR(priv->cec)) {
- ret = PTR_ERR(priv->cec);
- goto fail;
- }
-
- /* enable EDID read irq: */
- reg_set(priv, REG_INT_FLAGS_2, INT_FLAGS_2_EDID_BLK_RD);
-
- if (np) {
- /* get the device tree parameters */
- ret = of_property_read_u32(np, "video-ports", &video);
- if (ret == 0) {
- priv->vip_cntrl_0 = video >> 16;
- priv->vip_cntrl_1 = video >> 8;
- priv->vip_cntrl_2 = video;
- }
-
- ret = tda998x_get_audio_ports(priv, np);
- if (ret)
- goto fail;
-
- if (priv->audio_port_enable[AUDIO_ROUTE_I2S] ||
- priv->audio_port_enable[AUDIO_ROUTE_SPDIF])
- tda998x_audio_codec_init(priv, &client->dev);
- } else if (dev->platform_data) {
- ret = tda998x_set_config(priv, dev->platform_data);
- if (ret)
- goto fail;
- }
-
- priv->bridge.funcs = &tda998x_bridge_funcs;
-#ifdef CONFIG_OF
- priv->bridge.of_node = dev->of_node;
-#endif
-
- drm_bridge_add(&priv->bridge);
-
- return 0;
-
-fail:
- tda998x_destroy(dev);
-err_irq:
- return ret;
-}
-
-/* DRM encoder functions */
-
-static int tda998x_encoder_init(struct device *dev, struct drm_device *drm)
-{
- struct tda998x_priv *priv = dev_get_drvdata(dev);
- u32 crtcs = 0;
- int ret;
-
- if (dev->of_node)
- crtcs = drm_of_find_possible_crtcs(drm, dev->of_node);
-
- /* If no CRTCs were found, fall back to our old behaviour */
- if (crtcs == 0) {
- dev_warn(dev, "Falling back to first CRTC\n");
- crtcs = 1 << 0;
- }
-
- priv->encoder.possible_crtcs = crtcs;
-
- ret = drm_simple_encoder_init(drm, &priv->encoder,
- DRM_MODE_ENCODER_TMDS);
- if (ret)
- goto err_encoder;
-
- ret = drm_bridge_attach(&priv->encoder, &priv->bridge, NULL, 0);
- if (ret)
- goto err_bridge;
-
- return 0;
-
-err_bridge:
- drm_encoder_cleanup(&priv->encoder);
-err_encoder:
- return ret;
-}
-
-static int tda998x_bind(struct device *dev, struct device *master, void *data)
-{
- struct drm_device *drm = data;
-
- return tda998x_encoder_init(dev, drm);
-}
-
-static void tda998x_unbind(struct device *dev, struct device *master,
- void *data)
-{
- struct tda998x_priv *priv = dev_get_drvdata(dev);
-
- drm_encoder_cleanup(&priv->encoder);
-}
-
-static const struct component_ops tda998x_ops = {
- .bind = tda998x_bind,
- .unbind = tda998x_unbind,
-};
-
-static int
-tda998x_probe(struct i2c_client *client)
-{
- int ret;
-
- if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
- dev_warn(&client->dev, "adapter does not support I2C\n");
- return -EIO;
- }
-
- ret = tda998x_create(&client->dev);
- if (ret)
- return ret;
-
- ret = component_add(&client->dev, &tda998x_ops);
- if (ret)
- tda998x_destroy(&client->dev);
- return ret;
-}
-
-static void tda998x_remove(struct i2c_client *client)
-{
- component_del(&client->dev, &tda998x_ops);
- tda998x_destroy(&client->dev);
-}
-
-#ifdef CONFIG_OF
-static const struct of_device_id tda998x_dt_ids[] = {
- { .compatible = "nxp,tda998x", },
- { }
-};
-MODULE_DEVICE_TABLE(of, tda998x_dt_ids);
-#endif
-
-static const struct i2c_device_id tda998x_ids[] = {
- { "tda998x", 0 },
- { }
-};
-MODULE_DEVICE_TABLE(i2c, tda998x_ids);
-
-static struct i2c_driver tda998x_driver = {
- .probe = tda998x_probe,
- .remove = tda998x_remove,
- .driver = {
- .name = "tda998x",
- .of_match_table = of_match_ptr(tda998x_dt_ids),
- },
- .id_table = tda998x_ids,
-};
-
-module_i2c_driver(tda998x_driver);
-
-MODULE_AUTHOR("Rob Clark <robdclark@gmail.com");
-MODULE_DESCRIPTION("NXP Semiconductors TDA998X HDMI Encoder");
-MODULE_LICENSE("GPL");