static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);

#endif

#define KVM_EXIT_HYPERCALL_VALID_MASK (1 << KVM_HC_MAP_GPA_RANGE)

#define KVM_CAP_PMU_VALID_MASK KVM_PMU_CAP_DISABLE

if (vcpu->arch.xcr0 != kvm_host.xcr0)

xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);

vcpu->arch.ia32_xss != kvm_host.xss)

wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);

}

vcpu->arch.pkru != vcpu->arch.host_pkru &&

((vcpu->arch.xcr0 & XFEATURE_MASK_PKRU) ||

kvm_is_cr4_bit_set(vcpu, X86_CR4_PKE)))

}

EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);

kvm_is_cr4_bit_set(vcpu, X86_CR4_PKE))) {

vcpu->arch.pkru = rdpkru();

if (vcpu->arch.pkru != vcpu->arch.host_pkru)

}

if (kvm_is_cr4_bit_set(vcpu, X86_CR4_OSXSAVE)) {

if (vcpu->arch.xcr0 != kvm_host.xcr0)

xsetbv(XCR_XFEATURE_ENABLED_MASK, kvm_host.xcr0);

vcpu->arch.ia32_xss != kvm_host.xss)

wrmsrl(MSR_IA32_XSS, kvm_host.xss);

}

}

EXPORT_SYMBOL_GPL(kvm_emulate_xsetbv);

static bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)

{

return __kvm_is_valid_cr4(vcpu, cr4) &&

{

u64 fixed = DR6_FIXED_1;

fixed |= DR6_RTM;

fixed |= DR6_BUS_LOCK;

return fixed;

}

static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)

{

return false;

return false;

return false;

if (efer & (EFER_LME | EFER_LMA) &&

return false;

return false;

return true;

return 1;

if (!host_initiated &&

return 1;

/*

return 1;

if (!host_initiated &&

return 1;

break;

}

static int kvm_emulate_monitor_mwait(struct kvm_vcpu *vcpu, const char *insn)

{

if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MWAIT_NEVER_UD_FAULTS) &&

return kvm_handle_invalid_op(vcpu);

pr_warn_once("%s instruction emulated as NOP!\n", insn);

break;

case MSR_IA32_ARCH_CAPABILITIES:

if (!msr_info->host_initiated ||

return KVM_MSR_RET_UNSUPPORTED;

vcpu->arch.arch_capabilities = data;

break;

case MSR_IA32_PERF_CAPABILITIES:

if (!msr_info->host_initiated ||

return KVM_MSR_RET_UNSUPPORTED;

if (data & ~kvm_caps.supported_perf_cap)

if ((!guest_has_pred_cmd_msr(vcpu)))

return 1;

reserved_bits |= PRED_CMD_IBPB;

reserved_bits |= PRED_CMD_SBPB;

}

}

case MSR_IA32_FLUSH_CMD:

if (!msr_info->host_initiated &&

return 1;

if (!boot_cpu_has(X86_FEATURE_FLUSH_L1D) || (data & ~L1D_FLUSH))

kvm_set_lapic_tscdeadline_msr(vcpu, data);

break;

case MSR_IA32_TSC_ADJUST:

if (!msr_info->host_initiated) {

s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;

adjust_tsc_offset_guest(vcpu, adj);

if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&

((old_val ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {

return 1;

vcpu->arch.ia32_misc_enable_msr = data;

kvm_update_cpuid_runtime(vcpu);

kvm_pr_unimpl_wrmsr(vcpu, msr, data);

break;

case MSR_AMD64_OSVW_ID_LENGTH:

return 1;

vcpu->arch.osvw.length = data;

break;

case MSR_AMD64_OSVW_STATUS:

return 1;

vcpu->arch.osvw.status = data;

break;

#ifdef CONFIG_X86_64

case MSR_IA32_XFD:

if (!msr_info->host_initiated &&

return 1;

if (data & ~kvm_guest_supported_xfd(vcpu))

break;

case MSR_IA32_XFD_ERR:

if (!msr_info->host_initiated &&

return 1;

if (data & ~kvm_guest_supported_xfd(vcpu))

msr_info->data = vcpu->arch.microcode_version;

break;

case MSR_IA32_ARCH_CAPABILITIES:

return KVM_MSR_RET_UNSUPPORTED;

msr_info->data = vcpu->arch.arch_capabilities;

break;

case MSR_IA32_PERF_CAPABILITIES:

return KVM_MSR_RET_UNSUPPORTED;

msr_info->data = vcpu->arch.perf_capabilities;

break;

msr_info->data = 0xbe702111;

break;

case MSR_AMD64_OSVW_ID_LENGTH:

return 1;

msr_info->data = vcpu->arch.osvw.length;

break;

case MSR_AMD64_OSVW_STATUS:

return 1;

msr_info->data = vcpu->arch.osvw.status;

break;

#ifdef CONFIG_X86_64

case MSR_IA32_XFD:

if (!msr_info->host_initiated &&

return 1;

msr_info->data = vcpu->arch.guest_fpu.fpstate->xfd;

break;

case MSR_IA32_XFD_ERR:

if (!msr_info->host_initiated &&

return 1;

msr_info->data = vcpu->arch.guest_fpu.xfd_err;

boot_cpu_has(X86_FEATURE_ARAT);

}

#ifdef CONFIG_KVM_HYPERV

static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu *vcpu,

struct kvm_cpuid2 __user *cpuid_arg)

r = KVM_CLOCK_VALID_FLAGS;

break;

case KVM_CAP_X86_DISABLE_EXITS:

break;

case KVM_CAP_X86_SMM:

if (!IS_ENABLED(CONFIG_KVM_SMM))

case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:

vcpu->arch.pv_cpuid.enforce = cap->args[0];

return 0;

default:

return -EINVAL;

break;

case KVM_CAP_X86_DISABLE_EXITS:

r = -EINVAL;

break;

#define SMT_RSB_MSG "This processor is affected by the Cross-Thread Return Predictions vulnerability. " \

"KVM_CAP_X86_DISABLE_EXITS should only be used with SMT disabled or trusted guests."

r = 0;

break;

case KVM_CAP_MSR_PLATFORM_INFO:

kvm->arch.guest_can_read_msr_platform_info = cap->args[0];

static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)

{

}

static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)

{

}

static bool emulator_guest_has_rdpid(struct x86_emulate_ctxt *ctxt)

{

}

static bool emulator_guest_cpuid_is_intel_compatible(struct x86_emulate_ctxt *ctxt)

}

EXPORT_SYMBOL_GPL(kvm_prepare_emulation_failure_exit);

static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)

{

struct kvm *kvm = vcpu->kvm;

if (r == X86EMUL_RETRY_INSTR || r == X86EMUL_PROPAGATE_FAULT)

return 1;

WARN_ON_ONCE(r != X86EMUL_UNHANDLEABLE);

return handle_emulation_failure(vcpu, emulation_type);

}

if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))

kvm_caps.supported_xss = 0;

if (kvm_caps.has_tsc_control) {

/*

* Make sure the user can only configure tsc_khz values that

if (!is_64_bit_hypercall(vcpu))

ret = (u32)ret;

kvm_rax_write(vcpu, ret);

return kvm_skip_emulated_instruction(vcpu);

}

{

unsigned long ret;

trace_kvm_hypercall(nr, a0, a1, a2, a3);

if (!op_64_bit) {

u64 gpa = a0, npages = a1, attrs = a2;

ret = -KVM_ENOSYS;

break;

if (!PAGE_ALIGNED(gpa) || !npages ||

vcpu->run->exit_reason = KVM_EXIT_HYPERCALL;

vcpu->run->hypercall.nr = KVM_HC_MAP_GPA_RANGE;

vcpu->run->hypercall.args[0] = gpa;

vcpu->run->hypercall.args[1] = npages;

vcpu->run->hypercall.args[2] = attrs;

vcpu->run->hypercall.flags |= KVM_EXIT_HYPERCALL_LONG_MODE;

WARN_ON_ONCE(vcpu->run->hypercall.flags & KVM_EXIT_HYPERCALL_MBZ);

return 0;

}

default:

}

out:

}

int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)

{

if (kvm_xen_hypercall_enabled(vcpu->kvm))

return kvm_xen_hypercall(vcpu);

if (kvm_hv_hypercall_enabled(vcpu))

return kvm_hv_hypercall(vcpu);

}

EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);

set_debugreg(vcpu->arch.eff_db[1], 1);

set_debugreg(vcpu->arch.eff_db[2], 2);

set_debugreg(vcpu->arch.eff_db[3], 3);

} else if (unlikely(hw_breakpoint_active())) {

set_debugreg(0, 7);

}

guest_timing_enter_irqoff();

for (;;) {

struct kvm_run *kvm_run = vcpu->run;

int r;

vcpu_load(vcpu);

kvm_sigset_activate(vcpu);

kvm_run->flags = 0;

goto free_emulate_ctxt;

}

kvm_async_pf_hash_reset(vcpu);

if (kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_STUFF_FEATURE_MSRS)) {

kvm_xen_init_vcpu(vcpu);

vcpu_load(vcpu);

kvm_set_tsc_khz(vcpu, vcpu->kvm->arch.default_tsc_khz);

kvm_vcpu_reset(vcpu, false);

kvm_init_mmu(vcpu);

"does not run without ignore_msrs=1, please report it to kvm@vger.kernel.org.\n");

}

return 0;

out_uninit_mmu:

return ret;

}

static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)

{

vcpu_load(vcpu);

struct kvm_memslots *slots = kvm_memslots(kvm);

struct kvm_memory_slot *slot;

if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))

return ERR_PTR_USR(-EINVAL);

m.guest_phys_addr = gpa;

m.userspace_addr = hva;

m.memory_size = size;

if (r < 0)

return ERR_PTR_USR(r);

}

mutex_unlock(&kvm->slots_lock);

}

kvm_unload_vcpu_mmus(kvm);

kvm_x86_call(vm_destroy)(kvm);

kvm_free_msr_filter(srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1));

kvm_pic_destroy(kvm);

kvm_ioapic_destroy(kvm);

kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));

kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));

kvm_mmu_uninit_vm(kvm);

/*

* Clear out the previous array pointers for the KVM_MR_MOVE case. The

* the new memslot is successful.

*/

memset(&slot->arch, 0, sizeof(slot->arch));

if ((new->base_gfn + new->npages - 1) > kvm_mmu_max_gfn())

return -EINVAL;

return kvm_alloc_memslot_metadata(kvm, new);

}