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Diffstat (limited to 'arch/loongarch/include/asm/cacheflush.h')
-rw-r--r--arch/loongarch/include/asm/cacheflush.h16
1 files changed, 15 insertions, 1 deletions
diff --git a/arch/loongarch/include/asm/cacheflush.h b/arch/loongarch/include/asm/cacheflush.h
index f8754d08a31a..190651be9546 100644
--- a/arch/loongarch/include/asm/cacheflush.h
+++ b/arch/loongarch/include/asm/cacheflush.h
@@ -32,8 +32,22 @@ static inline unsigned int cpu_last_level_cache_line_size(void)
}
asmlinkage void __flush_cache_all(void);
-void local_flush_icache_range(unsigned long start, unsigned long end);
+/*
+ * LoongArch maintains ICache/DCache coherency by hardware,
+ * we just need "ibar" to avoid instruction hazard here.
+ */
+static inline void local_flush_icache_all(void)
+{
+ asm volatile ("ibar\t0\n"::);
+}
+
+static inline void local_flush_icache_range(unsigned long start, unsigned long end)
+{
+ asm volatile ("ibar\t0\n"::);
+}
+
+#define flush_icache_all local_flush_icache_all
#define flush_icache_range local_flush_icache_range
#define flush_icache_user_range local_flush_icache_range