diff options
Diffstat (limited to 'arch/arm64/boot/dts')
-rw-r--r-- | arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 2 | ||||
-rw-r--r-- | arch/arm64/boot/dts/mediatek/mt6797.dtsi | 2 | ||||
-rw-r--r-- | arch/arm64/boot/dts/mediatek/mt7622.dtsi | 2 | ||||
-rw-r--r-- | arch/arm64/boot/dts/mediatek/mt8173.dtsi | 2 |
4 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi index 43307bad3f0d..a00c5caa1915 100644 --- a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi @@ -278,7 +278,7 @@ interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; }; - scpsys: scpsys@10006000 { + scpsys: power-controller@10006000 { compatible = "mediatek,mt2712-scpsys", "syscon"; #power-domain-cells = <1>; reg = <0 0x10006000 0 0x1000>; diff --git a/arch/arm64/boot/dts/mediatek/mt6797.dtsi b/arch/arm64/boot/dts/mediatek/mt6797.dtsi index 2b2a69c7567f..136ef9527a0d 100644 --- a/arch/arm64/boot/dts/mediatek/mt6797.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt6797.dtsi @@ -157,7 +157,7 @@ }; }; - scpsys: scpsys@10006000 { + scpsys: power-controller@10006000 { compatible = "mediatek,mt6797-scpsys"; #power-domain-cells = <1>; reg = <0 0x10006000 0 0x1000>; diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/arch/arm64/boot/dts/mediatek/mt7622.dtsi index dac51e98204c..339dc9f88f43 100644 --- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi @@ -230,7 +230,7 @@ #reset-cells = <1>; }; - scpsys: scpsys@10006000 { + scpsys: power-controller@10006000 { compatible = "mediatek,mt7622-scpsys", "syscon"; #power-domain-cells = <1>; diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi index 1a9ad90bd7a6..ccb8e88a60c5 100644 --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi @@ -437,7 +437,7 @@ }; }; - scpsys: scpsys@10006000 { + scpsys: power-controller@10006000 { compatible = "mediatek,mt8173-scpsys"; #power-domain-cells = <1>; reg = <0 0x10006000 0 0x1000>; |