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Diffstat (limited to 'arch/arm64/boot/dts/renesas/r8a77951.dtsi')
-rw-r--r--arch/arm64/boot/dts/renesas/r8a77951.dtsi117
1 files changed, 77 insertions, 40 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a77951.dtsi b/arch/arm64/boot/dts/renesas/r8a77951.dtsi
index 96f3b5fe7e92..59a0f2e1479d 100644
--- a/arch/arm64/boot/dts/renesas/r8a77951.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77951.dtsi
@@ -18,6 +18,7 @@
compatible = "renesas,r8a7795";
#address-cells = <2>;
#size-cells = <2>;
+ interrupt-parent = <&gic>;
/*
* The external audio clocks are configured as 0 Hz fixed frequency
@@ -292,6 +293,7 @@
#clock-cells = <0>;
/* This value must be overridden by the board */
clock-frequency = <0>;
+ bootph-all;
};
extalr_clk: extalr {
@@ -299,6 +301,7 @@
#clock-cells = <0>;
/* This value must be overridden by the board */
clock-frequency = <0>;
+ bootph-all;
};
/* External PCIe clock - can be overridden by the board */
@@ -310,10 +313,10 @@
pmu_a53 {
compatible = "arm,cortex-a53-pmu";
- interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
- <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
- <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
- <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&a53_0>,
<&a53_1>,
<&a53_2>,
@@ -322,10 +325,10 @@
pmu_a57 {
compatible = "arm,cortex-a57-pmu";
- interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
- <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
- <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
- <&gic GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&a57_0>,
<&a57_1>,
<&a57_2>,
@@ -346,7 +349,7 @@
soc: soc {
compatible = "simple-bus";
- interrupt-parent = <&gic>;
+ bootph-all;
#address-cells = <2>;
#size-cells = <2>;
@@ -362,6 +365,16 @@
status = "disabled";
};
+ swdt: watchdog@e6030000 {
+ compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt";
+ reg = <0 0xe6030000 0 0x0c>;
+ interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_CORE R8A7795_CLK_OSC>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 401>;
+ status = "disabled";
+ };
+
gpio0: gpio@e6050000 {
compatible = "renesas,gpio-r8a7795",
"renesas,rcar-gen3-gpio";
@@ -485,6 +498,7 @@
pfc: pinctrl@e6060000 {
compatible = "renesas,pfc-r8a7795";
reg = <0 0xe6060000 0 0x50c>;
+ bootph-all;
};
cmt0: timer@e60f0000 {
@@ -565,11 +579,13 @@
#clock-cells = <2>;
#power-domain-cells = <0>;
#reset-cells = <1>;
+ bootph-all;
};
rst: reset-controller@e6160000 {
compatible = "renesas,r8a7795-rst";
reg = <0 0xe6160000 0 0x0200>;
+ bootph-all;
};
sysc: system-controller@e6180000 {
@@ -1367,7 +1383,7 @@
<&can_clk>;
clock-names = "fck", "canfd", "can_clk";
assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
- assigned-clock-rates = <40000000>;
+ assigned-clock-rates = <80000000>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
resets = <&cpg 914>;
status = "disabled";
@@ -2160,7 +2176,7 @@
dma-names = "rx", "tx";
};
ssiu04: ssiu-4 {
- dmas = <&audma0 0x3F>, <&audma1 0x40>;
+ dmas = <&audma0 0x3f>, <&audma1 0x40>;
dma-names = "rx", "tx";
};
ssiu05: ssiu-5 {
@@ -2168,7 +2184,7 @@
dma-names = "rx", "tx";
};
ssiu06: ssiu-6 {
- dmas = <&audma0 0x4F>, <&audma1 0x50>;
+ dmas = <&audma0 0x4f>, <&audma1 0x50>;
dma-names = "rx", "tx";
};
ssiu07: ssiu-7 {
@@ -2180,7 +2196,7 @@
dma-names = "rx", "tx";
};
ssiu11: ssiu-9 {
- dmas = <&audma0 0x4B>, <&audma1 0x4C>;
+ dmas = <&audma0 0x4b>, <&audma1 0x4c>;
dma-names = "rx", "tx";
};
ssiu12: ssiu-10 {
@@ -2188,23 +2204,23 @@
dma-names = "rx", "tx";
};
ssiu13: ssiu-11 {
- dmas = <&audma0 0x59>, <&audma1 0x5A>;
+ dmas = <&audma0 0x59>, <&audma1 0x5a>;
dma-names = "rx", "tx";
};
ssiu14: ssiu-12 {
- dmas = <&audma0 0x5F>, <&audma1 0x60>;
+ dmas = <&audma0 0x5f>, <&audma1 0x60>;
dma-names = "rx", "tx";
};
ssiu15: ssiu-13 {
- dmas = <&audma0 0xC3>, <&audma1 0xC4>;
+ dmas = <&audma0 0xc3>, <&audma1 0xc4>;
dma-names = "rx", "tx";
};
ssiu16: ssiu-14 {
- dmas = <&audma0 0xC7>, <&audma1 0xC8>;
+ dmas = <&audma0 0xc7>, <&audma1 0xc8>;
dma-names = "rx", "tx";
};
ssiu17: ssiu-15 {
- dmas = <&audma0 0xCB>, <&audma1 0xCC>;
+ dmas = <&audma0 0xcb>, <&audma1 0xcc>;
dma-names = "rx", "tx";
};
ssiu20: ssiu-16 {
@@ -2216,27 +2232,27 @@
dma-names = "rx", "tx";
};
ssiu22: ssiu-18 {
- dmas = <&audma0 0x6B>, <&audma1 0x6C>;
+ dmas = <&audma0 0x6b>, <&audma1 0x6c>;
dma-names = "rx", "tx";
};
ssiu23: ssiu-19 {
- dmas = <&audma0 0x6D>, <&audma1 0x6E>;
+ dmas = <&audma0 0x6d>, <&audma1 0x6e>;
dma-names = "rx", "tx";
};
ssiu24: ssiu-20 {
- dmas = <&audma0 0xCF>, <&audma1 0xCE>;
+ dmas = <&audma0 0xcf>, <&audma1 0xce>;
dma-names = "rx", "tx";
};
ssiu25: ssiu-21 {
- dmas = <&audma0 0xEB>, <&audma1 0xEC>;
+ dmas = <&audma0 0xeb>, <&audma1 0xec>;
dma-names = "rx", "tx";
};
ssiu26: ssiu-22 {
- dmas = <&audma0 0xED>, <&audma1 0xEE>;
+ dmas = <&audma0 0xed>, <&audma1 0xee>;
dma-names = "rx", "tx";
};
ssiu27: ssiu-23 {
- dmas = <&audma0 0xEF>, <&audma1 0xF0>;
+ dmas = <&audma0 0xef>, <&audma1 0xf0>;
dma-names = "rx", "tx";
};
ssiu30: ssiu-24 {
@@ -2260,15 +2276,15 @@
dma-names = "rx", "tx";
};
ssiu35: ssiu-29 {
- dmas = <&audma0 0x29>, <&audma1 0x2A>;
+ dmas = <&audma0 0x29>, <&audma1 0x2a>;
dma-names = "rx", "tx";
};
ssiu36: ssiu-30 {
- dmas = <&audma0 0x2B>, <&audma1 0x2C>;
+ dmas = <&audma0 0x2b>, <&audma1 0x2c>;
dma-names = "rx", "tx";
};
ssiu37: ssiu-31 {
- dmas = <&audma0 0x2D>, <&audma1 0x2E>;
+ dmas = <&audma0 0x2d>, <&audma1 0x2e>;
dma-names = "rx", "tx";
};
ssiu40: ssiu-32 {
@@ -2280,19 +2296,19 @@
dma-names = "rx", "tx";
};
ssiu42: ssiu-34 {
- dmas = <&audma0 0x19>, <&audma1 0x1A>;
+ dmas = <&audma0 0x19>, <&audma1 0x1a>;
dma-names = "rx", "tx";
};
ssiu43: ssiu-35 {
- dmas = <&audma0 0x1B>, <&audma1 0x1C>;
+ dmas = <&audma0 0x1b>, <&audma1 0x1c>;
dma-names = "rx", "tx";
};
ssiu44: ssiu-36 {
- dmas = <&audma0 0x1D>, <&audma1 0x1E>;
+ dmas = <&audma0 0x1d>, <&audma1 0x1e>;
dma-names = "rx", "tx";
};
ssiu45: ssiu-37 {
- dmas = <&audma0 0x1F>, <&audma1 0x20>;
+ dmas = <&audma0 0x1f>, <&audma1 0x20>;
dma-names = "rx", "tx";
};
ssiu46: ssiu-38 {
@@ -2324,7 +2340,7 @@
dma-names = "rx", "tx";
};
ssiu91: ssiu-45 {
- dmas = <&audma0 0x7F>, <&audma1 0x80>;
+ dmas = <&audma0 0x7f>, <&audma1 0x80>;
dma-names = "rx", "tx";
};
ssiu92: ssiu-46 {
@@ -2336,19 +2352,19 @@
dma-names = "rx", "tx";
};
ssiu94: ssiu-48 {
- dmas = <&audma0 0xA3>, <&audma1 0xA4>;
+ dmas = <&audma0 0xa3>, <&audma1 0xa4>;
dma-names = "rx", "tx";
};
ssiu95: ssiu-49 {
- dmas = <&audma0 0xA5>, <&audma1 0xA6>;
+ dmas = <&audma0 0xa5>, <&audma1 0xa6>;
dma-names = "rx", "tx";
};
ssiu96: ssiu-50 {
- dmas = <&audma0 0xA7>, <&audma1 0xA8>;
+ dmas = <&audma0 0xa7>, <&audma1 0xa8>;
dma-names = "rx", "tx";
};
ssiu97: ssiu-51 {
- dmas = <&audma0 0xA9>, <&audma1 0xAA>;
+ dmas = <&audma0 0xa9>, <&audma1 0xaa>;
dma-names = "rx", "tx";
};
};
@@ -2798,6 +2814,16 @@
iommu-map = <0 &ipmmu_hc 0 1>;
iommu-map-mask = <0>;
status = "disabled";
+
+ /* PCIe bridge, Root Port */
+ pciec0_rp: pci@0,0 {
+ #address-cells = <3>;
+ #size-cells = <2>;
+ reg = <0x0 0x0 0x0 0x0 0x0>;
+ compatible = "pciclass,0604";
+ device_type = "pci";
+ ranges;
+ };
};
pciec1: pcie@ee800000 {
@@ -2827,6 +2853,16 @@
iommu-map = <0 &ipmmu_hc 1 1>;
iommu-map-mask = <0>;
status = "disabled";
+
+ /* PCIe bridge, Root Port */
+ pciec1_rp: pci@0,0 {
+ #address-cells = <3>;
+ #size-cells = <2>;
+ reg = <0x0 0x0 0x0 0x0 0x0>;
+ compatible = "pciclass,0604";
+ device_type = "pci";
+ ranges;
+ };
};
pciec0_ep: pcie-ep@fe000000 {
@@ -3398,6 +3434,7 @@
prr: chipid@fff00044 {
compatible = "renesas,prr";
reg = <0 0xfff00044 0 4>;
+ bootph-all;
};
};
@@ -3469,10 +3506,10 @@
timer {
compatible = "arm,armv8-timer";
- interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
- <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
- <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
- <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
interrupt-names = "sec-phys", "phys", "virt", "hyp-phys";
};