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author | Andre Przywara <andre.przywara@arm.com> | 2015-12-01 14:34:02 +0000 |
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committer | Christoffer Dall <christoffer.dall@linaro.org> | 2016-05-20 15:39:53 +0200 |
commit | 055658bf48fcc6afdf90810e7e8f4e98f486c0d2 (patch) | |
tree | b1d8fe657ecbf820c1687ae4316a205e77670b1a /virt/kvm/arm/vgic/vgic-mmio-v2.c | |
parent | 69b6fe0c6e7f560165d655bbb127f8d69b7358ea (diff) | |
download | lwn-055658bf48fcc6afdf90810e7e8f4e98f486c0d2.tar.gz lwn-055658bf48fcc6afdf90810e7e8f4e98f486c0d2.zip |
KVM: arm/arm64: vgic-new: Add PRIORITY registers handlers
The priority register handlers are shared between the v2 and v3
emulation, so their implementation goes into vgic-mmio.c, to be
easily referenced from the v3 emulation as well later.
There is a corner case when we change the priority of a pending
interrupt which we don't handle at the moment.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Diffstat (limited to 'virt/kvm/arm/vgic/vgic-mmio-v2.c')
-rw-r--r-- | virt/kvm/arm/vgic/vgic-mmio-v2.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/virt/kvm/arm/vgic/vgic-mmio-v2.c b/virt/kvm/arm/vgic/vgic-mmio-v2.c index 12e101b8fd52..d564a3068fcd 100644 --- a/virt/kvm/arm/vgic/vgic-mmio-v2.c +++ b/virt/kvm/arm/vgic/vgic-mmio-v2.c @@ -90,7 +90,7 @@ static const struct vgic_register_region vgic_v2_dist_registers[] = { vgic_mmio_read_active, vgic_mmio_write_cactive, 1, VGIC_ACCESS_32bit), REGISTER_DESC_WITH_BITS_PER_IRQ(GIC_DIST_PRI, - vgic_mmio_read_raz, vgic_mmio_write_wi, 8, + vgic_mmio_read_priority, vgic_mmio_write_priority, 8, VGIC_ACCESS_32bit | VGIC_ACCESS_8bit), REGISTER_DESC_WITH_BITS_PER_IRQ(GIC_DIST_TARGET, vgic_mmio_read_raz, vgic_mmio_write_wi, 8, |