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author | Jonathan Cameron <Jonathan.Cameron@huawei.com> | 2023-05-26 10:58:22 +0100 |
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committer | Dan Williams <dan.j.williams@intel.com> | 2023-05-30 11:20:35 -0700 |
commit | 1ad3f701c3999904d0c6cdea299df16c6cd9878d (patch) | |
tree | 7c33090738ab6fb1e3a6ad656585ba3089d5d128 /tools/testing/cxl | |
parent | d717d7f3df18494baafd9595fb4bcb9c380d7389 (diff) | |
download | lwn-1ad3f701c3999904d0c6cdea299df16c6cd9878d.tar.gz lwn-1ad3f701c3999904d0c6cdea299df16c6cd9878d.zip |
cxl/pci: Find and register CXL PMU devices
CXL PMU devices can be found from entries in the Register
Locator DVSEC.
Reviewed-by: Dan Williams <dan.j.williams@intel.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/20230526095824.16336-4-Jonathan.Cameron@huawei.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'tools/testing/cxl')
-rw-r--r-- | tools/testing/cxl/Kbuild | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/tools/testing/cxl/Kbuild b/tools/testing/cxl/Kbuild index 6f9347ade82c..aa0ca7095a64 100644 --- a/tools/testing/cxl/Kbuild +++ b/tools/testing/cxl/Kbuild @@ -57,6 +57,7 @@ cxl_core-y += $(CXL_CORE_SRC)/memdev.o cxl_core-y += $(CXL_CORE_SRC)/mbox.o cxl_core-y += $(CXL_CORE_SRC)/pci.o cxl_core-y += $(CXL_CORE_SRC)/hdm.o +cxl_core-y += $(CXL_CORE_SRC)/pmu.o cxl_core-$(CONFIG_TRACING) += $(CXL_CORE_SRC)/trace.o cxl_core-$(CONFIG_CXL_REGION) += $(CXL_CORE_SRC)/region.o cxl_core-y += config_check.o |