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authorThierry Reding <treding@nvidia.com>2017-08-15 15:41:09 +0200
committerThierry Reding <treding@nvidia.com>2017-08-17 17:57:14 +0200
commit5c5f13016d2f4d5144418bec57a75490c5f9fc96 (patch)
treea1f95cbcd0ad4fc0830095ea3dd3188db27d6eb5 /samples/hidraw
parent7efe20cf11655e860ae2852ebefebff244ddabb6 (diff)
downloadlwn-5c5f13016d2f4d5144418bec57a75490c5f9fc96.tar.gz
lwn-5c5f13016d2f4d5144418bec57a75490c5f9fc96.zip
drm/tegra: sor: Use unsigned int for register offsets
Register offsets are usually fairly small numbers, so an unsigned int is more than enough to represent them. Signed-off-by: Thierry Reding <treding@nvidia.com>
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