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authorAndy Lutomirski <luto@amacapital.net>2014-10-15 10:12:07 -0700
committerJiri Slaby <jslaby@suse.cz>2014-11-13 19:03:02 +0100
commit4d54f12db93cc3ec3aaedd767b676f10ed237c98 (patch)
tree10dabe7334c7dceb533dfb5af9082e43d2451222 /mm
parent5bc8c3bd8e5784110da1e8c8aaff086672107a1d (diff)
downloadlwn-4d54f12db93cc3ec3aaedd767b676f10ed237c98.tar.gz
lwn-4d54f12db93cc3ec3aaedd767b676f10ed237c98.zip
x86, apic: Handle a bad TSC more gracefully
commit b47dcbdc5161d3d5756f430191e2840d9b855492 upstream. If the TSC is unusable or disabled, then this patch fixes: - Confusion while trying to clear old APIC interrupts. - Division by zero and incorrect programming of the TSC deadline timer. This fixes boot if the CPU has a TSC deadline timer but a missing or broken TSC. The failure to boot can be observed with qemu using -cpu qemu64,-tsc,+tsc-deadline This also happens to me in nested KVM for unknown reasons. With this patch, I can boot cleanly (although without a TSC). Signed-off-by: Andy Lutomirski <luto@amacapital.net> Cc: Bandan Das <bsd@redhat.com> Link: http://lkml.kernel.org/r/e2fa274e498c33988efac0ba8b7e3120f7f92d78.1413393027.git.luto@amacapital.net Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Jiri Slaby <jslaby@suse.cz>
Diffstat (limited to 'mm')
0 files changed, 0 insertions, 0 deletions