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authorMichael Ellerman <mpe@ellerman.id.au>2018-03-21 17:10:24 +0530
committerMichael Ellerman <mpe@ellerman.id.au>2018-03-27 19:25:08 +1100
commite1ebd0e5b9d0a10ba65e63a3514b6da8c6a5a819 (patch)
treef2248af034b1f505776639b4da52efd0d424a6c5 /lib/debugobjects.c
parentdbfcf3cb9c681aa0c5d0bb46068f98d5b1823dd3 (diff)
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powerpc/perf: Fix kernel address leak via sampling registers
Current code in power_pmu_disable() does not clear the sampling registers like Sampling Instruction Address Register (SIAR) and Sampling Data Address Register (SDAR) after disabling the PMU. Since these are userspace readable and could contain kernel addresses, add code to explicitly clear the content of these registers. Also add a "context synchronizing instruction" to enforce no further updates to these registers as suggested by Power ISA v3.0B. From section 9.4, on page 1108: "If an mtspr instruction is executed that changes the value of a Performance Monitor register other than SIAR, SDAR, and SIER, the change is not guaranteed to have taken effect until after a subsequent context synchronizing instruction has been executed (see Chapter 11. "Synchronization Requirements for Context Alterations" on page 1133)." Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> [mpe: Massage change log and add ISA reference] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'lib/debugobjects.c')
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