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| author | Ingo Molnar <mingo@kernel.org> | 2022-11-21 22:54:36 +0100 |
|---|---|---|
| committer | Ingo Molnar <mingo@kernel.org> | 2022-11-21 23:01:51 +0100 |
| commit | 0ce096db719ebaf46d4faf93e1ed1341c1853919 (patch) | |
| tree | 41c8826034eb5b430adf97d43fb0f2dce78325ba /include/soc/at91/sama7-ddr.h | |
| parent | 2d08a893b87cf9b2f9dbb3afaff60ca4530d55a2 (diff) | |
| parent | eb7081409f94a9a8608593d0fb63a1aa3d6f95d8 (diff) | |
| download | lwn-0ce096db719ebaf46d4faf93e1ed1341c1853919.tar.gz lwn-0ce096db719ebaf46d4faf93e1ed1341c1853919.zip | |
Merge tag 'v6.1-rc6' into x86/core, to resolve conflicts
Resolve conflicts between these commits in arch/x86/kernel/asm-offsets.c:
# upstream:
debc5a1ec0d1 ("KVM: x86: use a separate asm-offsets.c file")
# retbleed work in x86/core:
5d8213864ade ("x86/retbleed: Add SKL return thunk")
... and these commits in include/linux/bpf.h:
# upstram:
18acb7fac22f ("bpf: Revert ("Fix dispatcher patchable function entry to 5 bytes nop")")
# x86/core commits:
931ab63664f0 ("x86/ibt: Implement FineIBT")
bea75b33895f ("x86/Kconfig: Introduce function padding")
The latter two modify BPF_DISPATCHER_ATTRIBUTES(), which was removed upstream.
Conflicts:
arch/x86/kernel/asm-offsets.c
include/linux/bpf.h
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'include/soc/at91/sama7-ddr.h')
| -rw-r--r-- | include/soc/at91/sama7-ddr.h | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/include/soc/at91/sama7-ddr.h b/include/soc/at91/sama7-ddr.h index 6ce3bd22f6c6..5ad7ac2e3a7c 100644 --- a/include/soc/at91/sama7-ddr.h +++ b/include/soc/at91/sama7-ddr.h @@ -26,7 +26,10 @@ #define DDR3PHY_PGSR (0x0C) /* DDR3PHY PHY General Status Register */ #define DDR3PHY_PGSR_IDONE (1 << 0) /* Initialization Done */ -#define DDR3PHY_ACIOCR (0x24) /* DDR3PHY AC I/O Configuration Register */ +#define DDR3PHY_ACDLLCR (0x14) /* DDR3PHY AC DLL Control Register */ +#define DDR3PHY_ACDLLCR_DLLSRST (1 << 30) /* DLL Soft Reset */ + +#define DDR3PHY_ACIOCR (0x24) /* DDR3PHY AC I/O Configuration Register */ #define DDR3PHY_ACIOCR_CSPDD_CS0 (1 << 18) /* CS#[0] Power Down Driver */ #define DDR3PHY_ACIOCR_CKPDD_CK0 (1 << 8) /* CK[0] Power Down Driver */ #define DDR3PHY_ACIORC_ACPDD (1 << 3) /* AC Power Down Driver */ |