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author | Linus Walleij <linus.walleij@linaro.org> | 2015-03-18 01:56:17 +0100 |
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committer | Linus Walleij <linus.walleij@linaro.org> | 2015-03-19 09:45:54 +0100 |
commit | 964cb341882f920a1a1043864178f22def3193e4 (patch) | |
tree | d59a49475e7c5a869f1c5be1c7a673e254847aff /include/linux/gpio | |
parent | 7e9603638ac69696be5bcc2614365c1e8cc892dd (diff) | |
download | lwn-964cb341882f920a1a1043864178f22def3193e4.tar.gz lwn-964cb341882f920a1a1043864178f22def3193e4.zip |
gpio: move pincontrol calls to <linux/gpio/driver.h>
These functions do not belong in <asm-generic/gpio.h> since the
split into separate GPIO headers under <linux/gpio/*>. Move them
to <linux/gpio/driver.h> as is apropriate.
Acked-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'include/linux/gpio')
-rw-r--r-- | include/linux/gpio/driver.h | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h index c497c62889d1..f1b36593ec9f 100644 --- a/include/linux/gpio/driver.h +++ b/include/linux/gpio/driver.h @@ -6,6 +6,7 @@ #include <linux/irq.h> #include <linux/irqchip/chained_irq.h> #include <linux/irqdomain.h> +#include <linux/pinctrl/pinctrl.h> struct device; struct gpio_desc; @@ -173,6 +174,53 @@ int gpiochip_irqchip_add(struct gpio_chip *gpiochip, #endif /* CONFIG_GPIOLIB_IRQCHIP */ +#ifdef CONFIG_PINCTRL + +/** + * struct gpio_pin_range - pin range controlled by a gpio chip + * @head: list for maintaining set of pin ranges, used internally + * @pctldev: pinctrl device which handles corresponding pins + * @range: actual range of pins controlled by a gpio controller + */ + +struct gpio_pin_range { + struct list_head node; + struct pinctrl_dev *pctldev; + struct pinctrl_gpio_range range; +}; + +int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name, + unsigned int gpio_offset, unsigned int pin_offset, + unsigned int npins); +int gpiochip_add_pingroup_range(struct gpio_chip *chip, + struct pinctrl_dev *pctldev, + unsigned int gpio_offset, const char *pin_group); +void gpiochip_remove_pin_ranges(struct gpio_chip *chip); + +#else + +static inline int +gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name, + unsigned int gpio_offset, unsigned int pin_offset, + unsigned int npins) +{ + return 0; +} +static inline int +gpiochip_add_pingroup_range(struct gpio_chip *chip, + struct pinctrl_dev *pctldev, + unsigned int gpio_offset, const char *pin_group) +{ + return 0; +} + +static inline void +gpiochip_remove_pin_ranges(struct gpio_chip *chip) +{ +} + +#endif /* CONFIG_PINCTRL */ + struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *chip, u16 hwnum, const char *label); void gpiochip_free_own_desc(struct gpio_desc *desc); |