diff options
author | Mike Turquette <mturquette@linaro.org> | 2013-04-11 11:31:36 -0700 |
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committer | Mike Turquette <mturquette@linaro.org> | 2013-04-12 11:22:35 -0700 |
commit | d3a1c7be8361e2fbb6affbdb19de47ca48d6c402 (patch) | |
tree | 2371cf7b528092b13bd8a178f77a9c5aa0a947ad /include/linux/clk-provider.h | |
parent | 9abd5f0555df6cd36130feb742f1def6d99c60fe (diff) | |
download | lwn-d3a1c7be8361e2fbb6affbdb19de47ca48d6c402.tar.gz lwn-d3a1c7be8361e2fbb6affbdb19de47ca48d6c402.zip |
clk: composite: rename 'div' references to 'rate'
Rename all div_hw and div_ops related variables and functions to use
rate_hw, rate_ops, etc. This is to make the rate-change portion of the
composite clk implementation more generic. A patch following this one
will allow for fixed-rate clocks to reuse this infrastructure.
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Tested-by: Emilio López <emilio@elopez.com.ar>
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Diffstat (limited to 'include/linux/clk-provider.h')
-rw-r--r-- | include/linux/clk-provider.h | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index e7b7cbc53815..11860985fecb 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h @@ -354,11 +354,11 @@ struct clk *clk_register_fixed_factor(struct device *dev, const char *name, * struct clk_composite - aggregate clock of mux, divider and gate clocks * * @hw: handle between common and hardware-specific interfaces - * @mux_hw: handle between composite and hardware-specifix mux clock - * @div_hw: handle between composite and hardware-specifix divider clock - * @gate_hw: handle between composite and hardware-specifix gate clock + * @mux_hw: handle between composite and hardware-specific mux clock + * @rate_hw: handle between composite and hardware-specific rate clock + * @gate_hw: handle between composite and hardware-specific gate clock * @mux_ops: clock ops for mux - * @div_ops: clock ops for divider + * @rate_ops: clock ops for rate * @gate_ops: clock ops for gate */ struct clk_composite { @@ -366,18 +366,18 @@ struct clk_composite { struct clk_ops ops; struct clk_hw *mux_hw; - struct clk_hw *div_hw; + struct clk_hw *rate_hw; struct clk_hw *gate_hw; const struct clk_ops *mux_ops; - const struct clk_ops *div_ops; + const struct clk_ops *rate_ops; const struct clk_ops *gate_ops; }; struct clk *clk_register_composite(struct device *dev, const char *name, const char **parent_names, int num_parents, struct clk_hw *mux_hw, const struct clk_ops *mux_ops, - struct clk_hw *div_hw, const struct clk_ops *div_ops, + struct clk_hw *rate_hw, const struct clk_ops *rate_ops, struct clk_hw *gate_hw, const struct clk_ops *gate_ops, unsigned long flags); |