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| author | Marc Zyngier <marc.zyngier@arm.com> | 2018-02-06 17:56:14 +0000 |
|---|---|---|
| committer | Catalin Marinas <catalin.marinas@arm.com> | 2018-02-06 22:54:05 +0000 |
| commit | 6167ec5c9145cdf493722dfd80a5d48bafc4a18a (patch) | |
| tree | cdabac4f0a97488800cf46264d53b3cbbefbd65c /include/linux/arm-smccc.h | |
| parent | a4097b351118e821841941a79ec77d3ce3f1c5d9 (diff) | |
| download | lwn-6167ec5c9145cdf493722dfd80a5d48bafc4a18a.tar.gz lwn-6167ec5c9145cdf493722dfd80a5d48bafc4a18a.zip | |
arm64: KVM: Report SMCCC_ARCH_WORKAROUND_1 BP hardening support
A new feature of SMCCC 1.1 is that it offers firmware-based CPU
workarounds. In particular, SMCCC_ARCH_WORKAROUND_1 provides
BP hardening for CVE-2017-5715.
If the host has some mitigation for this issue, report that
we deal with it using SMCCC_ARCH_WORKAROUND_1, as we apply the
host workaround on every guest exit.
Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'include/linux/arm-smccc.h')
| -rw-r--r-- | include/linux/arm-smccc.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/include/linux/arm-smccc.h b/include/linux/arm-smccc.h index dc68aa5a7261..e1ef944ef1da 100644 --- a/include/linux/arm-smccc.h +++ b/include/linux/arm-smccc.h @@ -73,6 +73,11 @@ ARM_SMCCC_SMC_32, \ 0, 1) +#define ARM_SMCCC_ARCH_WORKAROUND_1 \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_SMC_32, \ + 0, 0x8000) + #ifndef __ASSEMBLY__ #include <linux/linkage.h> |