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| author | Arnd Bergmann <arnd@arndb.de> | 2024-11-12 22:42:35 +0100 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2024-11-12 22:42:35 +0100 |
| commit | 8cd0d9b997a5076f479d82304930cfcc91764bef (patch) | |
| tree | 5b48e36510e728ab1c7f325a4e6353aeda2e954a /include/dt-bindings | |
| parent | dc2fe29c88e20db951d1acf663a19bc58fbcb050 (diff) | |
| parent | 0cd647cd53db0315361e41056e10739a5ee1e668 (diff) | |
| download | lwn-8cd0d9b997a5076f479d82304930cfcc91764bef.tar.gz lwn-8cd0d9b997a5076f479d82304930cfcc91764bef.zip | |
Merge tag 'renesas-dts-for-v6.13-tag2' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DTS updates for v6.13 (take two)
- Add a CPU Operating Performance Points table for the RZ/V2H SoC,
- Add Battery Backup Function (VBATTB) and RTC support for the RZ/G3S
SoC and the RZ/G3S SMARC SoM,
- Add DMAC support for MMC on the RZ/A1H SoC and the Genmai
development board,
- Miscellaneous fixes and improvements.
* tag 'renesas-dts-for-v6.13-tag2' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
arm64: dts: renesas: rzg3s-smarc-som: Enable RTC
arm64: dts: renesas: rzg3s-smarc-som: Enable VBATTB
arm64: dts: renesas: r9a08g045: Add RTC node
arm64: dts: renesas: r9a08g045: Add VBATTB node
arm64: dts: renesas: white-hawk-cpu-common: Add pin control for DSI-eDP IRQ
ARM: dts: renesas: r7s72100: Add DMA support to MMCIF
ARM: dts: renesas: r7s72100: Add DMAC node
arm64: dts: renesas: hihope: Drop #sound-dai-cells
dt-bindings: clock: renesas,r9a08g045-vbattb: Document VBATTB
dt-bindings: clock: r9a08g045-cpg: Add power domain ID for RTC
arm64: dts: renesas: r9a09g057: Add OPP table
Link: https://lore.kernel.org/r/cover.1730726155.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'include/dt-bindings')
| -rw-r--r-- | include/dt-bindings/clock/r9a08g045-cpg.h | 1 | ||||
| -rw-r--r-- | include/dt-bindings/clock/renesas,r9a08g045-vbattb.h | 13 |
2 files changed, 14 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/r9a08g045-cpg.h b/include/dt-bindings/clock/r9a08g045-cpg.h index 8281e9caf3a9..311521fe4b59 100644 --- a/include/dt-bindings/clock/r9a08g045-cpg.h +++ b/include/dt-bindings/clock/r9a08g045-cpg.h @@ -308,5 +308,6 @@ #define R9A08G045_PD_DDR 64 #define R9A08G045_PD_TZCDDR 65 #define R9A08G045_PD_OTFDE_DDR 66 +#define R9A08G045_PD_RTC 67 #endif /* __DT_BINDINGS_CLOCK_R9A08G045_CPG_H__ */ diff --git a/include/dt-bindings/clock/renesas,r9a08g045-vbattb.h b/include/dt-bindings/clock/renesas,r9a08g045-vbattb.h new file mode 100644 index 000000000000..67774eafad06 --- /dev/null +++ b/include/dt-bindings/clock/renesas,r9a08g045-vbattb.h @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) + * + * Copyright (C) 2024 Renesas Electronics Corp. + */ +#ifndef __DT_BINDINGS_CLOCK_R9A08G045_VBATTB_H__ +#define __DT_BINDINGS_CLOCK_R9A08G045_VBATTB_H__ + +#define VBATTB_XC 0 +#define VBATTB_XBYP 1 +#define VBATTB_MUX 2 +#define VBATTB_VBATTCLK 3 + +#endif /* __DT_BINDINGS_CLOCK_R9A08G045_VBATTB_H__ */ |