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author | Lin Huang <hl@rock-chips.com> | 2016-08-22 11:36:18 +0800 |
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committer | Heiko Stuebner <heiko@sntech.de> | 2016-08-31 18:19:03 +0200 |
commit | 7fbdfcd68783679f35fa99df948258cb3e828cd1 (patch) | |
tree | 9c2f1805f1bd51e045011843d00969faa2ed7b31 /include/dt-bindings | |
parent | 29b4817d4018df78086157ea3a55c1d9424a7cfc (diff) | |
download | lwn-7fbdfcd68783679f35fa99df948258cb3e828cd1.tar.gz lwn-7fbdfcd68783679f35fa99df948258cb3e828cd1.zip |
clk: rockchip: add SCLK_DDRC id for rk3399 ddrc
Add the needed id for the ddr clock.
Signed-off-by: Lin Huang <hl@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'include/dt-bindings')
-rw-r--r-- | include/dt-bindings/clock/rk3399-cru.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/rk3399-cru.h b/include/dt-bindings/clock/rk3399-cru.h index 50a44cffb070..ce5f3e99c5f2 100644 --- a/include/dt-bindings/clock/rk3399-cru.h +++ b/include/dt-bindings/clock/rk3399-cru.h @@ -131,6 +131,7 @@ #define SCLK_DPHY_RX0_CFG 165 #define SCLK_RMII_SRC 166 #define SCLK_PCIEPHY_REF100M 167 +#define SCLK_DDRC 168 #define DCLK_VOP0 180 #define DCLK_VOP1 181 |