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| author | Xing Zheng <zhengxing@rock-chips.com> | 2016-04-20 19:06:49 +0800 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2016-04-25 22:47:22 +0200 |
| commit | 55df45843901847f33816f8246ca2538aadd339a (patch) | |
| tree | f374aa683d5986fa42056cd866d4e51c7374f7d2 /include/dt-bindings | |
| parent | 003e6eb71ed3c884d55443cdb95b909374ade7bc (diff) | |
| download | lwn-55df45843901847f33816f8246ca2538aadd339a.tar.gz lwn-55df45843901847f33816f8246ca2538aadd339a.zip | |
clk: rockchip: export some necessary rk3399 clock ids
We export some clock IDs for the reference drivers need them.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'include/dt-bindings')
| -rw-r--r-- | include/dt-bindings/clock/rk3399-cru.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/rk3399-cru.h b/include/dt-bindings/clock/rk3399-cru.h index 91852ee13801..50a44cffb070 100644 --- a/include/dt-bindings/clock/rk3399-cru.h +++ b/include/dt-bindings/clock/rk3399-cru.h @@ -129,6 +129,8 @@ #define SCLK_DPHY_TX0_CFG 163 #define SCLK_DPHY_TX1RX1_CFG 164 #define SCLK_DPHY_RX0_CFG 165 +#define SCLK_RMII_SRC 166 +#define SCLK_PCIEPHY_REF100M 167 #define DCLK_VOP0 180 #define DCLK_VOP1 181 |