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| author | Philipp Zabel <p.zabel@pengutronix.de> | 2015-11-30 22:07:53 +0100 |
|---|---|---|
| committer | Philipp Zabel <p.zabel@pengutronix.de> | 2016-05-06 17:47:40 +0200 |
| commit | 4585945bf1d348d006f7270beea3dae09fee3413 (patch) | |
| tree | b41934ae0bb5a4f9c615f86808abdb5cc2365b01 /include/dt-bindings | |
| parent | 06445994fece2ae458419fbadc1b2107336615d6 (diff) | |
| download | lwn-4585945bf1d348d006f7270beea3dae09fee3413.tar.gz lwn-4585945bf1d348d006f7270beea3dae09fee3413.zip | |
clk: mediatek: Add hdmi_ref HDMI PHY PLL reference clock output
The configurable hdmi_ref output of the PLL block is derived from
the tvdpll_594m clock signal via a configurable PLL post-divider.
It is used as the PLL reference input to the HDMI PHY module.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: James Liao <jamesjj.liao@mediatek.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'include/dt-bindings')
| -rw-r--r-- | include/dt-bindings/clock/mt8173-clk.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/include/dt-bindings/clock/mt8173-clk.h b/include/dt-bindings/clock/mt8173-clk.h index 7956ba1bc974..6094bf7e50ab 100644 --- a/include/dt-bindings/clock/mt8173-clk.h +++ b/include/dt-bindings/clock/mt8173-clk.h @@ -176,7 +176,8 @@ #define CLK_APMIXED_LVDSPLL 13 #define CLK_APMIXED_MSDCPLL2 14 #define CLK_APMIXED_REF2USB_TX 15 -#define CLK_APMIXED_NR_CLK 16 +#define CLK_APMIXED_HDMI_REF 16 +#define CLK_APMIXED_NR_CLK 17 /* INFRA_SYS */ |