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authorPeng Fan <peng.fan@nxp.com>2020-05-07 13:56:12 +0800
committerShawn Guo <shawnguo@kernel.org>2020-05-20 09:26:42 +0800
commitdc6e21da340297604f217bcff016389cf78b2a49 (patch)
tree3116e3232ff26b475573adc67db608e463ee9658 /include/dt-bindings/clock/imx8mp-clock.h
parentcccc46474227eaaa7cd8f5601bba58489e237991 (diff)
downloadlwn-dc6e21da340297604f217bcff016389cf78b2a49.tar.gz
lwn-dc6e21da340297604f217bcff016389cf78b2a49.zip
clk: imx: imx8mp: fix pll mux bit
Same to i.MX8MN/i.MX8MM, pll BYPASS bit should be kept inside pll driver for glitchless freq setting following spec. If exposing the bit, that means pll driver and clk driver has two paths to touch this bit, which is wrong. So use EXT_BYPASS bit here. Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'include/dt-bindings/clock/imx8mp-clock.h')
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