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author | Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> | 2014-12-09 00:40:59 +0200 |
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committer | Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> | 2014-12-23 12:01:51 +0200 |
commit | f67e1e058b722a2a2af4e40fa80936889f128b4c (patch) | |
tree | fef231f7b75144a3e3d020e904f475e5fcd47184 /drivers | |
parent | 1b30dbde8596ca8de2497c2a50d5381dfe62ee8c (diff) | |
download | lwn-f67e1e058b722a2a2af4e40fa80936889f128b4c.tar.gz lwn-f67e1e058b722a2a2af4e40fa80936889f128b4c.zip |
drm: rcar-du: Output HSYNC instead of CSYNC
The DU outputs by default a composite sync signal (XOR of the horizontal
and vertical sync signals) on the HSYNC output pin. As this can confuse
devices and isn't needed by any of the supported encoders, configure the
HSYNC pin to output the horizontal sync signal.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c index ce280bd390a9..25b762b58765 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c @@ -144,7 +144,7 @@ static void rcar_du_crtc_set_display_timing(struct rcar_du_crtc *rcrtc) /* Signal polarities */ value = ((mode->flags & DRM_MODE_FLAG_PVSYNC) ? 0 : DSMR_VSL) | ((mode->flags & DRM_MODE_FLAG_PHSYNC) ? 0 : DSMR_HSL) - | DSMR_DIPM_DE; + | DSMR_DIPM_DE | DSMR_CSPM; rcar_du_crtc_write(rcrtc, DSMR, value); /* Display timings */ |