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| author | Benjamin Gaignard <benjamin.gaignard@collabora.com> | 2022-07-08 17:21:55 +0100 |
|---|---|---|
| committer | Mauro Carvalho Chehab <mchehab@kernel.org> | 2022-07-15 17:36:58 +0100 |
| commit | e7060d9a78c278f41d196d06df8879230038e508 (patch) | |
| tree | 8fd059890ec01f6b336c1841ff3d6f44c812db67 /drivers/staging | |
| parent | 13789e30704908a6bf743d338f663b0468e204c7 (diff) | |
| download | lwn-e7060d9a78c278f41d196d06df8879230038e508.tar.gz lwn-e7060d9a78c278f41d196d06df8879230038e508.zip | |
media: uapi: Change data_bit_offset definition
'F.7.3.6.1 General slice segment header syntax' section of HEVC
specification describes that a slice header always end aligned on
byte boundary, therefore we only need to provide the data offset in bytes.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
Reviewed-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Acked-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
Tested-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
Diffstat (limited to 'drivers/staging')
| -rw-r--r-- | drivers/staging/media/sunxi/cedrus/cedrus_h265.c | 19 | ||||
| -rw-r--r-- | drivers/staging/media/sunxi/cedrus/cedrus_video.c | 1 |
2 files changed, 18 insertions, 2 deletions
diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c index 411601975124..7b67cb4621cf 100644 --- a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c +++ b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c @@ -317,6 +317,8 @@ static void cedrus_h265_setup(struct cedrus_ctx *ctx, u32 chroma_log2_weight_denom; u32 output_pic_list_index; u32 pic_order_cnt[2]; + u8 *padding; + int count; u32 reg; sps = run->h265.sps; @@ -405,7 +407,22 @@ static void cedrus_h265_setup(struct cedrus_ctx *ctx, /* Initialize bitstream access. */ cedrus_write(dev, VE_DEC_H265_TRIGGER, VE_DEC_H265_TRIGGER_INIT_SWDEC); - cedrus_h265_skip_bits(dev, slice_params->data_bit_offset); + /* + * Cedrus expects that bitstream pointer is actually at the end of the slice header + * instead of start of slice data. Padding is 8 bits at most (one bit set to 1 and + * at most seven bits set to 0), so we have to inspect only one byte before slice data. + */ + padding = (u8 *)vb2_plane_vaddr(&run->src->vb2_buf, 0) + + slice_params->data_byte_offset - 1; + + for (count = 0; count < 8; count++) + if (*padding & (1 << count)) + break; + + /* Include the one bit. */ + count++; + + cedrus_h265_skip_bits(dev, slice_params->data_byte_offset * 8 - count); /* Bitstream parameters. */ diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_video.c b/drivers/staging/media/sunxi/cedrus/cedrus_video.c index 33726175d980..66714609b577 100644 --- a/drivers/staging/media/sunxi/cedrus/cedrus_video.c +++ b/drivers/staging/media/sunxi/cedrus/cedrus_video.c @@ -568,7 +568,6 @@ int cedrus_queue_init(void *priv, struct vb2_queue *src_vq, src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT; src_vq->io_modes = VB2_MMAP | VB2_DMABUF; - src_vq->dma_attrs = DMA_ATTR_NO_KERNEL_MAPPING; src_vq->drv_priv = ctx; src_vq->buf_struct_size = sizeof(struct cedrus_buffer); src_vq->ops = &cedrus_qops; |