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authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>2017-11-10 19:55:18 +0200
committerLinus Walleij <linus.walleij@linaro.org>2017-11-29 10:29:40 +0100
commit4bd6683da2e64590bdc27ecf7e61ad8376861768 (patch)
tree1bb9c25903b1c7018e32802b87fc9e9106888f8e /drivers/pinctrl
parent4fbd8d194f06c8a3fd2af1ce560ddb31f7ec8323 (diff)
downloadlwn-4bd6683da2e64590bdc27ecf7e61ad8376861768.tar.gz
lwn-4bd6683da2e64590bdc27ecf7e61ad8376861768.zip
pinctrl: denverton: Fix UART2 RTS pin mode
UART2 RTS is mode 2 of the pin. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl')
-rw-r--r--drivers/pinctrl/intel/pinctrl-denverton.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/pinctrl/intel/pinctrl-denverton.c b/drivers/pinctrl/intel/pinctrl-denverton.c
index 4500880240f2..6572550cfe78 100644
--- a/drivers/pinctrl/intel/pinctrl-denverton.c
+++ b/drivers/pinctrl/intel/pinctrl-denverton.c
@@ -207,7 +207,7 @@ static const unsigned int dnv_uart0_pins[] = { 60, 61, 64, 65 };
static const unsigned int dnv_uart0_modes[] = { 2, 3, 1, 1 };
static const unsigned int dnv_uart1_pins[] = { 94, 95, 96, 97 };
static const unsigned int dnv_uart2_pins[] = { 60, 61, 62, 63 };
-static const unsigned int dnv_uart2_modes[] = { 1, 1, 2, 2 };
+static const unsigned int dnv_uart2_modes[] = { 1, 2, 2, 2 };
static const unsigned int dnv_emmc_pins[] = {
142, 143, 144, 145, 146, 147, 148, 149, 150, 151, 152,
};