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| author | Shiraz Hashim <shiraz.hashim@st.com> | 2012-10-27 14:47:47 +0530 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2012-11-05 12:33:37 +0100 |
| commit | a778005589918c8051c496d8b7c96037776ed239 (patch) | |
| tree | ad65e293d2d9d9e2ab5590eced0a9279db84f943 /drivers/pinctrl/spear/pinctrl-spear320.c | |
| parent | 0b53fa35355725b5130b8e73309995c4d4b4868b (diff) | |
| download | lwn-a778005589918c8051c496d8b7c96037776ed239.tar.gz lwn-a778005589918c8051c496d8b7c96037776ed239.zip | |
pinctrl: SPEAr3xx: correct register space to configure pwm
To have pwm on pad no. 34 we also need to select between pwm and SD_LED
functions. Add this to pwm pin mux register configuration.
Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/spear/pinctrl-spear320.c')
| -rw-r--r-- | drivers/pinctrl/spear/pinctrl-spear320.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/pinctrl/spear/pinctrl-spear320.c b/drivers/pinctrl/spear/pinctrl-spear320.c index 020b1e0bdb3e..4fccf9529541 100644 --- a/drivers/pinctrl/spear/pinctrl-spear320.c +++ b/drivers/pinctrl/spear/pinctrl-spear320.c @@ -2240,6 +2240,10 @@ static struct spear_muxreg pwm2_pin_34_muxreg[] = { .mask = PMX_SSP_CS_MASK, .val = 0, }, { + .reg = MODE_CONFIG_REG, + .mask = PMX_PWM_MASK, + .val = PMX_PWM_MASK, + }, { .reg = IP_SEL_PAD_30_39_REG, .mask = PMX_PL_34_MASK, .val = PMX_PWM2_PL_34_VAL, |