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author | Billy Tsai <billy_tsai@aspeedtech.com> | 2022-08-18 18:18:39 +0800 |
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committer | Linus Walleij <linus.walleij@linaro.org> | 2022-08-31 14:14:31 +0200 |
commit | cf517fef601b9dde151f0afc27164d13bf1fd907 (patch) | |
tree | 0fdbd1f13798c61bb23bf55c4998698f260d0334 /drivers/pinctrl/pinctrl-amd.c | |
parent | 1ebfe7e36182a658819e4ded44d38d4033c8bbfb (diff) | |
download | lwn-cf517fef601b9dde151f0afc27164d13bf1fd907.tar.gz lwn-cf517fef601b9dde151f0afc27164d13bf1fd907.zip |
pinctrl: aspeed: Force to disable the function's signal
When the driver want to disable the signal of the function, it doesn't
need to query the state of the mux function's signal on a pin. The
condition below will miss the disable of the signal:
Ball | Default | P0 Signal | P0 Expression | Other
-----+---------+-----------+-----------------------------+----------
E21 GPIOG0 SD2CLK SCU4B4[16]=1 & SCU450[1]=1 GPIOG0
-----+---------+-----------+-----------------------------+----------
B22 GPIOG1 SD2CMD SCU4B4[17]=1 & SCU450[1]=1 GPIOG1
-----+---------+-----------+-----------------------------+----------
Assume the register status like below:
SCU4B4[16] == 1 & SCU4B4[17] == 1 & SCU450[1]==1
After the driver set the Ball E21 to the GPIOG0:
SCU4B4[16] == 0 & SCU4B4[17] == 1 & SCU450[1]==0
When the driver want to set the Ball B22 to the GPIOG1, the condition of
the SD2CMD will be false causing SCU4B4[17] not to be cleared.
Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
Acked-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20220818101839.28860-1-billy_tsai@aspeedtech.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/pinctrl-amd.c')
0 files changed, 0 insertions, 0 deletions