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| author | Bjorn Helgaas <bhelgaas@google.com> | 2018-08-15 14:59:10 -0500 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2018-08-15 14:59:10 -0500 |
| commit | 37f0e311bca66e9fe74703887c9bb4965914cabf (patch) | |
| tree | 3be9f14dc28fe04e9823cc12d4bc11c9cf2a6af8 /drivers/pci/controller/pcie-cadence.h | |
| parent | ce342a1aa8c61fe3315b782f6cf4f34d5babce13 (diff) | |
| parent | eb1e39f784e83321353314da1b2e8cbb2fceaba9 (diff) | |
| download | lwn-37f0e311bca66e9fe74703887c9bb4965914cabf.tar.gz lwn-37f0e311bca66e9fe74703887c9bb4965914cabf.zip | |
Merge branch 'remotes/lorenzo/pci/cadence'
- Correct the Cadence cdns_pcie_writel() signature (Alan Douglas)
- Add Cadence support for optional generic PHYs (Alan Douglas)
- Add Cadence power management ops (Alan Douglas)
- Remove redundant variable from Cadence driver (Colin Ian King)
* remotes/lorenzo/pci/cadence:
PCI: pcie-cadence-ep: Remove redundant variable mmc
PCI: cadence: Add shutdown callback to host driver
PCI: cadence: Add Power Management ops for host and EP
dt-bindings: PCI: cadence: Add DT bindings for optional PHYs
PCI: cadence: Add generic PHY support to host and EP drivers
PCI: cadence: Update cdns_pcie_writel() function signature
Diffstat (limited to 'drivers/pci/controller/pcie-cadence.h')
| -rw-r--r-- | drivers/pci/controller/pcie-cadence.h | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/drivers/pci/controller/pcie-cadence.h b/drivers/pci/controller/pcie-cadence.h index 4bb27333b05c..ae6bf2a2b3d3 100644 --- a/drivers/pci/controller/pcie-cadence.h +++ b/drivers/pci/controller/pcie-cadence.h @@ -8,6 +8,7 @@ #include <linux/kernel.h> #include <linux/pci.h> +#include <linux/phy/phy.h> /* * Local Management Registers @@ -165,6 +166,9 @@ #define CDNS_PCIE_AT_IB_RP_BAR_ADDR1(bar) \ (CDNS_PCIE_AT_BASE + 0x0804 + (bar) * 0x0008) +/* AXI link down register */ +#define CDNS_PCIE_AT_LINKDOWN (CDNS_PCIE_AT_BASE + 0x0824) + enum cdns_pcie_rp_bar { RP_BAR0, RP_BAR1, @@ -229,6 +233,9 @@ struct cdns_pcie { struct resource *mem_res; bool is_rc; u8 bus; + int phy_count; + struct phy **phy; + struct device_link **link; }; /* Register access */ @@ -279,7 +286,7 @@ static inline void cdns_pcie_ep_fn_writew(struct cdns_pcie *pcie, u8 fn, } static inline void cdns_pcie_ep_fn_writel(struct cdns_pcie *pcie, u8 fn, - u32 reg, u16 value) + u32 reg, u32 value) { writel(value, pcie->reg_base + CDNS_PCIE_EP_FUNC_BASE(fn) + reg); } @@ -307,5 +314,9 @@ void cdns_pcie_set_outbound_region_for_normal_msg(struct cdns_pcie *pcie, u8 fn, u32 r, u64 cpu_addr); void cdns_pcie_reset_outbound_region(struct cdns_pcie *pcie, u32 r); +void cdns_pcie_disable_phy(struct cdns_pcie *pcie); +int cdns_pcie_enable_phy(struct cdns_pcie *pcie); +int cdns_pcie_init_phy(struct device *dev, struct cdns_pcie *pcie); +extern const struct dev_pm_ops cdns_pcie_pm_ops; #endif /* _PCIE_CADENCE_H */ |