diff options
| author | Bjorn Helgaas <bhelgaas@google.com> | 2024-09-19 14:25:30 -0500 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2024-09-19 14:25:30 -0500 |
| commit | d1624da381cb1d9c877e631ec07ee10cb3664bbb (patch) | |
| tree | 962a1651dff50072063272afe26ad14c40bd4af2 /drivers/pci/controller/dwc | |
| parent | f8ca62bff229d5afbbfe275d0931357a9ec04f55 (diff) | |
| parent | c538d40f365b5b6d7433d371710f58e8b266fb19 (diff) | |
| download | lwn-d1624da381cb1d9c877e631ec07ee10cb3664bbb.tar.gz lwn-d1624da381cb1d9c877e631ec07ee10cb3664bbb.zip | |
Merge branch 'pci/controller/j721e'
- Add DT "ti,syscon-acspcie-proxy-ctrl" and driver support to enable the
ACSPCIE module to drive Refclk for the Endpoint (Siddharth Vadapalli)
- Extract the cadence link setup from cdns_pcie_host_setup() so link setup
can be done separately during resume (Thomas Richard)
- Use dev_err_probe() to simplify j721e probe (Thomas Richard)
- Add T_PERST_CLK_US definition for the mandatory delay between Refclk
becoming stable and PERST# being deasserted (Thomas Richard)
- Add j721e suspend and resume support (Théo Lebrun)
* pci/controller/j721e:
PCI: j721e: Add suspend and resume support
PCI: j721e: Use T_PERST_CLK_US macro
PCI: Add T_PERST_CLK_US macro
PCI: j721e: Add reset GPIO to struct j721e_pcie
PCI: j721e: Use dev_err_probe() in the probe() function
PCI: cadence: Set cdns_pcie_host_init() global
PCI: cadence: Extract link setup sequence from cdns_pcie_host_setup()
PCI: j721e: Enable ACSPCIE Refclk if "ti,syscon-acspcie-proxy-ctrl" exists
dt-bindings: PCI: ti,j721e-pci-host: Add ACSPCIE proxy control property
Diffstat (limited to 'drivers/pci/controller/dwc')
0 files changed, 0 insertions, 0 deletions