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| author | Russell King (Oracle) <rmk+kernel@armlinux.org.uk> | 2021-11-16 10:02:01 +0000 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2021-11-17 11:21:42 +0000 |
| commit | ae089a8191764ba39d2867293eab5e7a9627f12c (patch) | |
| tree | 45ee1753f48f81327879167d19512b3cced87a0b /drivers/net/ethernet/microchip/sparx5/sparx5_main.c | |
| parent | d3a410001e670540936a6bac3ea7e36c69dd7158 (diff) | |
| download | lwn-ae089a8191764ba39d2867293eab5e7a9627f12c.tar.gz lwn-ae089a8191764ba39d2867293eab5e7a9627f12c.zip | |
net: sparx5: populate supported_interfaces member
Populate the phy_interface_t bitmap for the Microchip Sparx5 driver
with interfaces modes supported by the MAC.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/microchip/sparx5/sparx5_main.c')
| -rw-r--r-- | drivers/net/ethernet/microchip/sparx5/sparx5_main.c | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_main.c b/drivers/net/ethernet/microchip/sparx5/sparx5_main.c index 4625d4fb4cde..3cb6c1fe43ff 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_main.c +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_main.c @@ -293,6 +293,30 @@ static int sparx5_create_port(struct sparx5 *sparx5, spx5_port->phylink_config.type = PHYLINK_NETDEV; spx5_port->phylink_config.pcs_poll = true; + __set_bit(PHY_INTERFACE_MODE_SGMII, + spx5_port->phylink_config.supported_interfaces); + __set_bit(PHY_INTERFACE_MODE_QSGMII, + spx5_port->phylink_config.supported_interfaces); + __set_bit(PHY_INTERFACE_MODE_1000BASEX, + spx5_port->phylink_config.supported_interfaces); + __set_bit(PHY_INTERFACE_MODE_2500BASEX, + spx5_port->phylink_config.supported_interfaces); + + if (spx5_port->conf.bandwidth == SPEED_5000 || + spx5_port->conf.bandwidth == SPEED_10000 || + spx5_port->conf.bandwidth == SPEED_25000) + __set_bit(PHY_INTERFACE_MODE_5GBASER, + spx5_port->phylink_config.supported_interfaces); + + if (spx5_port->conf.bandwidth == SPEED_10000 || + spx5_port->conf.bandwidth == SPEED_25000) + __set_bit(PHY_INTERFACE_MODE_10GBASER, + spx5_port->phylink_config.supported_interfaces); + + if (spx5_port->conf.bandwidth == SPEED_25000) + __set_bit(PHY_INTERFACE_MODE_25GBASER, + spx5_port->phylink_config.supported_interfaces); + phylink = phylink_create(&spx5_port->phylink_config, of_fwnode_handle(config->node), config->conf.phy_mode, |