diff options
| author | Yochai Hagvi <yochai.hagvi@intel.com> | 2024-08-30 13:07:22 +0200 |
|---|---|---|
| committer | Tony Nguyen <anthony.l.nguyen@intel.com> | 2024-10-01 11:11:38 -0700 |
| commit | ebb2693f8fbdb444e01ac6b6b50282aaabc96e77 (patch) | |
| tree | 877db7e5cb8aae82fe45ea25aeb2e5368b3605b9 /drivers/net/ethernet/intel/ice/ice_adminq_cmd.h | |
| parent | df0b394f1ca79e2f589c5f7ae7cb8095c67bf00c (diff) | |
| download | lwn-ebb2693f8fbdb444e01ac6b6b50282aaabc96e77.tar.gz lwn-ebb2693f8fbdb444e01ac6b6b50282aaabc96e77.zip | |
ice: Read SDP section from NVM for pin definitions
PTP pins assignment and their related SDPs (Software Definable Pins) are
currently hardcoded.
Fix that by reading NVM section instead on products supporting this,
which are E810 products.
If SDP section is not defined in NVM, the driver continues to use the
hardcoded table.
Reviewed-by: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
Signed-off-by: Yochai Hagvi <yochai.hagvi@intel.com>
Co-developed-by: Karol Kolacinski <karol.kolacinski@intel.com>
Signed-off-by: Karol Kolacinski <karol.kolacinski@intel.com>
Reviewed-by: Simon Horman <horms@kernel.org>
Tested-by: Pucha Himasekhar Reddy <himasekharx.reddy.pucha@intel.com> (A Contingent worker at Intel)
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Diffstat (limited to 'drivers/net/ethernet/intel/ice/ice_adminq_cmd.h')
| -rw-r--r-- | drivers/net/ethernet/intel/ice/ice_adminq_cmd.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h index 0be1a98d7cc1..1f01f3501d6b 100644 --- a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h +++ b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h @@ -1742,6 +1742,15 @@ struct ice_aqc_nvm { }; #define ICE_AQC_NVM_START_POINT 0 +#define ICE_AQC_NVM_SECTOR_UNIT 4096 +#define ICE_AQC_NVM_SDP_AC_PTR_OFFSET 0xD8 +#define ICE_AQC_NVM_SDP_AC_PTR_M GENMASK(14, 0) +#define ICE_AQC_NVM_SDP_AC_PTR_INVAL 0x7FFF +#define ICE_AQC_NVM_SDP_AC_PTR_TYPE_M BIT(15) +#define ICE_AQC_NVM_SDP_AC_SDP_NUM_M GENMASK(2, 0) +#define ICE_AQC_NVM_SDP_AC_DIR_M BIT(3) +#define ICE_AQC_NVM_SDP_AC_PIN_M GENMASK(15, 6) +#define ICE_AQC_NVM_SDP_AC_MAX_SIZE 7 #define ICE_AQC_NVM_TX_TOPO_MOD_ID 0x14B |