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| author | Chao Hao <chao.hao@mediatek.com> | 2020-07-03 12:41:19 +0800 |
|---|---|---|
| committer | Joerg Roedel <jroedel@suse.de> | 2020-07-10 16:13:10 +0200 |
| commit | 75eed350877c4cdae2bd9e8410c66292143bd410 (patch) | |
| tree | c9129ab7b56194eda81145a6e55d07d7e3e0c187 /drivers/iommu/mtk_iommu.h | |
| parent | 349b00c9c0a052af6720552919c9812dad9013e7 (diff) | |
| download | lwn-75eed350877c4cdae2bd9e8410c66292143bd410.tar.gz lwn-75eed350877c4cdae2bd9e8410c66292143bd410.zip | |
iommu/mediatek: Rename the register STANDARD_AXI_MODE(0x48) to MISC_CTRL
For iommu offset=0x48 register, only the previous mt8173/mt8183 use the
name STANDARD_AXI_MODE, all the latest SoC extend the register more
feature by different bits, for example: axi_mode, in_order_en, coherent_en
and so on. So rename REG_MMU_MISC_CTRL may be more proper.
This patch only rename the register name, no functional change.
Signed-off-by: Chao Hao <chao.hao@mediatek.com>
Reviewed-by: Yong Wu <yong.wu@mediatek.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Link: https://lore.kernel.org/r/20200703044127.27438-3-chao.hao@mediatek.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'drivers/iommu/mtk_iommu.h')
| -rw-r--r-- | drivers/iommu/mtk_iommu.h | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/iommu/mtk_iommu.h b/drivers/iommu/mtk_iommu.h index ea949a324e33..7212e6fcf982 100644 --- a/drivers/iommu/mtk_iommu.h +++ b/drivers/iommu/mtk_iommu.h @@ -18,7 +18,10 @@ #include <soc/mediatek/smi.h> struct mtk_iommu_suspend_reg { - u32 standard_axi_mode; + union { + u32 standard_axi_mode;/* v1 */ + u32 misc_ctrl;/* v2 */ + }; u32 dcm_dis; u32 ctrl_reg; u32 int_control0; |