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authorManikanta Mylavarapu <quic_mmanikan@quicinc.com>2024-09-30 20:17:09 +0530
committerAndi Shyti <andi.shyti@kernel.org>2024-11-17 11:58:14 +0100
commit506bb2ab00753a59c8a63b02e898098815dc3141 (patch)
tree92d5432b60d4ef3871fce2dd9542877e09c01e66 /drivers/i2c/busses/i2c-scmi.c
parent8284750a182937bf805f703311501730f02eb40e (diff)
downloadlwn-506bb2ab00753a59c8a63b02e898098815dc3141.tar.gz
lwn-506bb2ab00753a59c8a63b02e898098815dc3141.zip
i2c: qcom-geni: Support systems with 32MHz serial engine clock
In existing socs, I2C serial engine is sourced from XO (19.2MHz). Where as in IPQ5424, I2C serial engine is sourced from GPLL0 (32MHz). The existing map table is based on 19.2MHz. This patch incorporates the clock map table to derive the SCL clock from the 32MHz source clock frequency. Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
Diffstat (limited to 'drivers/i2c/busses/i2c-scmi.c')
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