drm/nouveau/pmu: convert to new-style nvkm_subdev

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

1 files changed, 23 insertions, 23 deletions

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
index 350daa3c630c..8f201022377f 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
@@ -1111,7 +1111,7 @@ nva3_chipset = {
 	.mc = g98_mc_new,
 	.mmu = nv50_mmu_new,
 	.mxm = nv50_mxm_new,
-//	.pmu = gt215_pmu_new,
+	.pmu = gt215_pmu_new,
 //	.therm = gt215_therm_new,
 //	.timer = nv04_timer_new,
 //	.volt = nv40_volt_new,
@@ -1144,7 +1144,7 @@ nva5_chipset = {
 	.mc = g98_mc_new,
 	.mmu = nv50_mmu_new,
 	.mxm = nv50_mxm_new,
-//	.pmu = gt215_pmu_new,
+	.pmu = gt215_pmu_new,
 //	.therm = gt215_therm_new,
 //	.timer = nv04_timer_new,
 //	.volt = nv40_volt_new,
@@ -1176,7 +1176,7 @@ nva8_chipset = {
 	.mc = g98_mc_new,
 	.mmu = nv50_mmu_new,
 	.mxm = nv50_mxm_new,
-//	.pmu = gt215_pmu_new,
+	.pmu = gt215_pmu_new,
 //	.therm = gt215_therm_new,
 //	.timer = nv04_timer_new,
 //	.volt = nv40_volt_new,
@@ -1270,7 +1270,7 @@ nvaf_chipset = {
 	.mc = g98_mc_new,
 	.mmu = nv50_mmu_new,
 	.mxm = nv50_mxm_new,
-//	.pmu = gt215_pmu_new,
+	.pmu = gt215_pmu_new,
 //	.therm = gt215_therm_new,
 //	.timer = nv04_timer_new,
 //	.volt = nv40_volt_new,
@@ -1304,7 +1304,7 @@ nvc0_chipset = {
 	.mc = gf100_mc_new,
 	.mmu = gf100_mmu_new,
 	.mxm = nv50_mxm_new,
-//	.pmu = gf100_pmu_new,
+	.pmu = gf100_pmu_new,
 //	.therm = gt215_therm_new,
 //	.timer = nv04_timer_new,
 //	.volt = nv40_volt_new,
@@ -1339,7 +1339,7 @@ nvc1_chipset = {
 	.mc = gf106_mc_new,
 	.mmu = gf100_mmu_new,
 	.mxm = nv50_mxm_new,
-//	.pmu = gf100_pmu_new,
+	.pmu = gf100_pmu_new,
 //	.therm = gt215_therm_new,
 //	.timer = nv04_timer_new,
 //	.volt = nv40_volt_new,
@@ -1373,7 +1373,7 @@ nvc3_chipset = {
 	.mc = gf106_mc_new,
 	.mmu = gf100_mmu_new,
 	.mxm = nv50_mxm_new,
-//	.pmu = gf100_pmu_new,
+	.pmu = gf100_pmu_new,
 //	.therm = gt215_therm_new,
 //	.timer = nv04_timer_new,
 //	.volt = nv40_volt_new,
@@ -1407,7 +1407,7 @@ nvc4_chipset = {
 	.mc = gf100_mc_new,
 	.mmu = gf100_mmu_new,
 	.mxm = nv50_mxm_new,
-//	.pmu = gf100_pmu_new,
+	.pmu = gf100_pmu_new,
 //	.therm = gt215_therm_new,
 //	.timer = nv04_timer_new,
 //	.volt = nv40_volt_new,
@@ -1442,7 +1442,7 @@ nvc8_chipset = {
 	.mc = gf100_mc_new,
 	.mmu = gf100_mmu_new,
 	.mxm = nv50_mxm_new,
-//	.pmu = gf100_pmu_new,
+	.pmu = gf100_pmu_new,
 //	.therm = gt215_therm_new,
 //	.timer = nv04_timer_new,
 //	.volt = nv40_volt_new,
@@ -1477,7 +1477,7 @@ nvce_chipset = {
 	.mc = gf100_mc_new,
 	.mmu = gf100_mmu_new,
 	.mxm = nv50_mxm_new,
-//	.pmu = gf100_pmu_new,
+	.pmu = gf100_pmu_new,
 //	.therm = gt215_therm_new,
 //	.timer = nv04_timer_new,
 //	.volt = nv40_volt_new,
@@ -1512,7 +1512,7 @@ nvcf_chipset = {
 	.mc = gf106_mc_new,
 	.mmu = gf100_mmu_new,
 	.mxm = nv50_mxm_new,
-//	.pmu = gf100_pmu_new,
+	.pmu = gf100_pmu_new,
 //	.therm = gt215_therm_new,
 //	.timer = nv04_timer_new,
 //	.volt = nv40_volt_new,
@@ -1578,7 +1578,7 @@ nvd9_chipset = {
 	.mc = gf106_mc_new,
 	.mmu = gf100_mmu_new,
 	.mxm = nv50_mxm_new,
-//	.pmu = gf110_pmu_new,
+	.pmu = gf119_pmu_new,
 //	.therm = gf110_therm_new,
 //	.timer = nv04_timer_new,
 //	.volt = nv40_volt_new,
@@ -1612,7 +1612,7 @@ nve4_chipset = {
 	.mc = gf106_mc_new,
 	.mmu = gf100_mmu_new,
 	.mxm = nv50_mxm_new,
-//	.pmu = gk104_pmu_new,
+	.pmu = gk104_pmu_new,
 //	.therm = gf110_therm_new,
 //	.timer = nv04_timer_new,
 //	.volt = nv40_volt_new,
@@ -1648,7 +1648,7 @@ nve6_chipset = {
 	.mc = gf106_mc_new,
 	.mmu = gf100_mmu_new,
 	.mxm = nv50_mxm_new,
-//	.pmu = gk104_pmu_new,
+	.pmu = gk104_pmu_new,
 //	.therm = gf110_therm_new,
 //	.timer = nv04_timer_new,
 //	.volt = nv40_volt_new,
@@ -1684,7 +1684,7 @@ nve7_chipset = {
 	.mc = gf106_mc_new,
 	.mmu = gf100_mmu_new,
 	.mxm = nv50_mxm_new,
-//	.pmu = gf110_pmu_new,
+	.pmu = gf119_pmu_new,
 //	.therm = gf110_therm_new,
 //	.timer = nv04_timer_new,
 //	.volt = nv40_volt_new,
@@ -1715,7 +1715,7 @@ nvea_chipset = {
 	.ltc = gk104_ltc_new,
 	.mc = gk20a_mc_new,
 	.mmu = gf100_mmu_new,
-//	.pmu = gk20a_pmu_new,
+	.pmu = gk20a_pmu_new,
 //	.timer = gk20a_timer_new,
 //	.volt = gk20a_volt_new,
 //	.ce[2] = gk104_ce2_new,
@@ -1744,7 +1744,7 @@ nvf0_chipset = {
 	.mc = gf106_mc_new,
 	.mmu = gf100_mmu_new,
 	.mxm = nv50_mxm_new,
-//	.pmu = gk110_pmu_new,
+	.pmu = gk110_pmu_new,
 //	.therm = gf110_therm_new,
 //	.timer = nv04_timer_new,
 //	.volt = nv40_volt_new,
@@ -1780,7 +1780,7 @@ nvf1_chipset = {
 	.mc = gf106_mc_new,
 	.mmu = gf100_mmu_new,
 	.mxm = nv50_mxm_new,
-//	.pmu = gk110_pmu_new,
+	.pmu = gk110_pmu_new,
 //	.therm = gf110_therm_new,
 //	.timer = nv04_timer_new,
 //	.volt = nv40_volt_new,
@@ -1816,7 +1816,7 @@ nv106_chipset = {
 	.mc = gk20a_mc_new,
 	.mmu = gf100_mmu_new,
 	.mxm = nv50_mxm_new,
-//	.pmu = gk208_pmu_new,
+	.pmu = gk208_pmu_new,
 //	.therm = gf110_therm_new,
 //	.timer = nv04_timer_new,
 //	.volt = nv40_volt_new,
@@ -1851,7 +1851,7 @@ nv108_chipset = {
 	.mc = gk20a_mc_new,
 	.mmu = gf100_mmu_new,
 	.mxm = nv50_mxm_new,
-//	.pmu = gk208_pmu_new,
+	.pmu = gk208_pmu_new,
 //	.therm = gf110_therm_new,
 //	.timer = nv04_timer_new,
 //	.volt = nv40_volt_new,
@@ -1886,7 +1886,7 @@ nv117_chipset = {
 	.mc = gk20a_mc_new,
 	.mmu = gf100_mmu_new,
 	.mxm = nv50_mxm_new,
-//	.pmu = gk208_pmu_new,
+	.pmu = gm107_pmu_new,
 //	.therm = gm107_therm_new,
 //	.timer = gk20a_timer_new,
 //	.ce[0] = gk104_ce0_new,
@@ -1915,7 +1915,7 @@ nv124_chipset = {
 	.mc = gk20a_mc_new,
 	.mmu = gf100_mmu_new,
 	.mxm = nv50_mxm_new,
-//	.pmu = gk208_pmu_new,
+	.pmu = gm107_pmu_new,
 //	.timer = gk20a_timer_new,
 //	.ce[0] = gm204_ce0_new,
 //	.ce[1] = gm204_ce1_new,
@@ -1944,7 +1944,7 @@ nv126_chipset = {
 	.mc = gk20a_mc_new,
 	.mmu = gf100_mmu_new,
 	.mxm = nv50_mxm_new,
-//	.pmu = gk208_pmu_new,
+	.pmu = gm107_pmu_new,
 //	.timer = gk20a_timer_new,
 //	.ce[0] = gm204_ce0_new,
 //	.ce[1] = gm204_ce1_new,