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| author | Alexandre Courbot <acourbot@nvidia.com> | 2014-10-27 18:49:19 +0900 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2014-12-02 15:44:00 +1000 |
| commit | b22870ba6a5c7bd4380f224eeabf335b1f8792b3 (patch) | |
| tree | b967fb75ea6f4e9500a02297246bdf95c116f19f /drivers/gpu/drm/nouveau/nouveau_bo.h | |
| parent | a81349a7b27adc66cc318ac0bc0f657b0b73a5af (diff) | |
| download | lwn-b22870ba6a5c7bd4380f224eeabf335b1f8792b3.tar.gz lwn-b22870ba6a5c7bd4380f224eeabf335b1f8792b3.zip | |
drm/nouveau: synchronize BOs when required
On architectures for which access to GPU memory is non-coherent,
caches need to be flushed and invalidated explicitly when BO control
changes between CPU and GPU.
This patch adds buffer synchronization functions which invokes the
correct API (PCI or DMA) to ensure synchronization is effective.
Based on the TTM DMA cache helper patches by Lucas Stach.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_bo.h')
| -rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_bo.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.h b/drivers/gpu/drm/nouveau/nouveau_bo.h index 0f8bbd48a0b9..c827f233e41d 100644 --- a/drivers/gpu/drm/nouveau/nouveau_bo.h +++ b/drivers/gpu/drm/nouveau/nouveau_bo.h @@ -85,6 +85,8 @@ void nouveau_bo_wr32(struct nouveau_bo *, unsigned index, u32 val); void nouveau_bo_fence(struct nouveau_bo *, struct nouveau_fence *, bool exclusive); int nouveau_bo_validate(struct nouveau_bo *, bool interruptible, bool no_wait_gpu); +void nouveau_bo_sync_for_device(struct nouveau_bo *nvbo); +void nouveau_bo_sync_for_cpu(struct nouveau_bo *nvbo); struct nouveau_vma * nouveau_bo_vma_find(struct nouveau_bo *, struct nouveau_vm *); |